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1. 发明申请

US20090327611A1 DOMAIN-BASED CACHE MANAGEMENT, INCLUDING DOMAIN EVENT BASED PRIORITY DEMOTION 有权
标题翻译：基于域的高速缓存管理，包括基于优先级的域名活动
公开(公告)号：US20090327611A1
公开(公告)日：2009-12-31
申请号：US12165350
申请日：2008-06-30
申请人： Zhen Fang , Erik G. Hallnor , Nitin B. Gupte , Steven Zhang
发明人： Zhen Fang , Erik G. Hallnor , Nitin B. Gupte , Steven Zhang
IPC分类号： G06F12/08 , H04N7/12
CPC分类号： G06F12/0864 , G06F12/126 , H04N19/43 , H04N19/433
摘要： Domain-based cache management methods and systems, including domain event based priority demotion (“EPD”). In EPD, priorities of cached data blocks are demoted upon one or more domain events, such as upon encoding of one or more macroblocks of a video frame. New data blocks may be written over lowest priority cached data blocks. New data blocks may initially be assigned a highest priority. Alternatively, or additionally, one or more new data blocks may initially be assigned one of a plurality of higher priorities based on domain-based information, such as a relative position of a requested data block within a video frame, and/or a relative direction associated with a requested data block. Domain-based cache management may be implemented with one or more other cache management techniques, such as least recently used techniques. Domain-based cache management may be implemented in associative caches, including set associative caches and fully associative caches, and may be implemented with indirect indexing.
摘要翻译：基于域的缓存管理方法和系统，包括基于域事件的优先级降级（“EPD”）。在EPD中，缓存的数据块的优先级在一个或多个域事件上降级，诸如在对视频帧的一个或多个宏块进行编码时降级。可以在最低优先级的缓存数据块上写入新的数据块。最初可以分配最新的数据块。或者或附加地，一个或多个新数据块可以基于基于域的信息，诸如在视频帧内的所请求的数据块的相对位置和/或相对方向，最初可被分配多个较高优先级中的一个与所请求的数据块相关联。基于域的高速缓存管理可以利用一个或多个其他高速缓存管理技术来实现，诸如最近最少使用的技术。基于域的缓存管理可以在关联高速缓存中实现，包括集合关联高速缓存和完全关联高速缓存，并且可以用间接索引来实现。

2. 发明授权

US06507530B1 Weighted throttling mechanism with rank based throttling for a memory system 有权
标题翻译：用于内存系统的基于级别的节流的加权节流机制
公开(公告)号：US06507530B1
公开(公告)日：2003-01-14
申请号：US09967642
申请日：2001-09-28
申请人： Michael W. Williams , James M. Dodd , Lloyd L Pollard, II , Nitin B Gupte
发明人： Michael W. Williams , James M. Dodd , Lloyd L Pollard, II , Nitin B Gupte
IPC分类号： G11C700
CPC分类号： G11C11/4078 , G11C7/04
摘要： A memory system includes a plurality of memory device ranks. A memory controller having a connection with the plurality of memory device ranks is adapted to obtain command information being issued to one of the plurality of memory device ranks. The memory controller is also adapted to generate a power weight value based on a command type from the command information. The memory controller increments a power count of the one of the plurality of memory device ranks by the power weight value generated. The memory controller then compares the power count of the one of the plurality of memory device ranks to a threshold value set for the one of the plurality of memory device ranks. If it is determined that the power count exceeds the threshold value, the memory controller is adapted to throttle the one of the plurality of memory device ranks.
摘要翻译：存储器系统包括多个存储器件等级。具有与多个存储器装置等级的连接的存储器控制器适于获得被发布到多个存储器件等级之一的命令信息。存储器控制器还适于基于来自命令信息的命令类型来生成功率权重值。存储器控制器通过生成的功率权重值来增加多个存储器件等级中的一个的功率计数。存储器控制器然后将多个存储器件等级中的一个的功率计数与为多个存储器件等级中的一个设置的阈值进行比较。如果确定功率计数超过阈值，则存储器控制器适于调节多个存储器件等级中的一个。

3. 发明授权

US5590071A Method and apparatus for emulating a high capacity DRAM 失效
标题翻译：用于模拟高容量DRAM的方法和装置
公开(公告)号：US5590071A
公开(公告)日：1996-12-31
申请号：US559321
申请日：1995-11-16
申请人： Daniel J. Kolor , Nitin B. Gupte , Siddharth R. Shah
发明人： Daniel J. Kolor , Nitin B. Gupte , Siddharth R. Shah
IPC分类号： G11C8/00 , G11C8/12 , G11C8/18 , G11C11/24
CPC分类号： G11C8/18 , G11C8/00 , G11C8/12
摘要： A method and apparatus for emulating a high storage capacity DRAM component. The emulation involves the use of a component containing multiple DRAMs, each having a lower storage capacity than that of the emulated DRAM, but having a cumulative storage capacity greater than or equal to that of the DRAM being emulated. Emulation entails the decoding of extra bits in an address signal from a controller for the high capacity DRAM to direct the output of DRAM control signals from a decoder to the multiple DRAM component so as to activate only one of the plurality of lower density DRAMs therein. Advantageously, the invention may be implemented so as to permit migration to a next generation DRAM device without altering wiring on the printed circuit board or changing the memory controller used to access the DRAM component.
摘要翻译：一种用于模拟高存储容量DRAM组件的方法和装置。仿真涉及使用包含多个DRAM的部件，每个DRAM具有比仿真DRAM的存储容量更低的存储容量，但具有大于或等于被仿真的DRAM的累积存储容量。仿真需要对来自用于高容量DRAM的控制器的地址信号中的额外位的解码，以将来自解码器的DRAM控制信号的输出引导到多个DRAM组件，以便仅激活其中的多个低密度DRAM中的一个。有利地，本发明可以被实现为允许向下一代DRAM设备迁移，而不改变印刷电路板上的布线或改变用于访问DRAM组件的存储器控制器。

4. 发明授权

US07050959B1 Dynamic thermal management for integrated circuits 有权
标题翻译：集成电路的动态热管理
公开(公告)号：US07050959B1
公开(公告)日：2006-05-23
申请号：US09471220
申请日：1999-12-23
申请人： Lloyd L. Pollard, II , Nitin B. Gupte
发明人： Lloyd L. Pollard, II , Nitin B. Gupte
IPC分类号： G06F17/50 , G06F13/10 , G05D11/00
CPC分类号： G06F1/3225 , G05D23/1917 , G06F1/206 , G06F1/3275 , Y02D10/14
摘要： The present invention provides for dynamic thermal management of integrated circuits, including memory modules, within a computer system. The thermal management methodology described herein closely couples software operation to hardware operation of the computer system, and allows each system to run at near optimum performance levels without exceeding specified maximum temperature thresholds. In order to achieve such results, the present invention relates physical characteristics of the integrated circuit with physical characteristics of the internal chassis environment, and translates this relationship into a maximum software performance setting. The system monitors and adjusts software performance such that the maximum performance setting is not exceeded.
摘要翻译：本发明提供了在计算机系统内的集成电路（包括存储器模块）的动态热管理。本文所述的热管理方法将软件操作与计算机系统的硬件操作紧密耦合，并且允许每个系统以接近最佳性能水平运行而不超过规定的最大温度阈值。为了实现这样的结果，本发明将集成电路的物理特性与内部机箱环境的物理特性相关联，并且将该关系转换为最大的软件性能设置。系统监视和调整软件性能，以便不超过最大性能设置。

5. 发明申请

US20140204105A1 DRAM COMPRESSION SCHEME TO REDUCE POWER CONSUMPTION IN MOTION COMPENSATION AND DISPLAY REFRESH 有权
标题翻译： DRAM压缩方案，以减少运动补偿和显示刷新消耗电力
公开(公告)号：US20140204105A1
公开(公告)日：2014-07-24
申请号：US13995575
申请日：2011-12-21
申请人： Zhen Fang , Nitin B. Gupte , Xiaowei Jiang
发明人： Zhen Fang , Nitin B. Gupte , Xiaowei Jiang
IPC分类号： G06F13/16 , H04N19/51 , H04N19/44 , G06T1/60 , H04N19/91
CPC分类号： G06F13/1673 , G06T1/60 , H04N9/8042 , H04N19/428 , H04N19/44 , H04N19/91 , Y02D10/14
摘要： Systems and methods of operating a memory controller may provide for receiving a write request from a motion compensation module, wherein the write request includes video data. A compression of the video data may be conducted to obtain compressed data, wherein the compression of the video data is transparent to the motion compensation module. In addition, the compressed data can be stored to one or more memory chips. Moreover, a read request may be received, wherein stored data is retrieved from at least one of the one or more memory chips in response to the request. Additionally, a decompression of the stored data may be conducted to obtain decompressed data.
摘要翻译：操作存储器控制器的系统和方法可以提供从运动补偿模块接收写入请求，其中写入请求包括视频数据。可以进行视频数据的压缩以获得压缩数据，其中视频数据的压缩对运动补偿模块是透明的。此外，压缩数据可以存储到一个或多个存储器芯片。此外，可以接收读取请求，其中响应于该请求从所述一个或多个存储器芯片中的至少一个检索存储的数据。此外，可以进行存储数据的解压缩以获得解压缩的数据。

6. 发明授权

US08316184B2 Domain-based cache management, including domain event based priority demotion 有权
标题翻译：基于域的缓存管理，包括基于域事件的优先级降级
公开(公告)号：US08316184B2
公开(公告)日：2012-11-20
申请号：US12165350
申请日：2008-06-30
申请人： Zhen Fang , Erik G Hallnor , Nitin B Gupte , Steven Zhang
发明人： Zhen Fang , Erik G Hallnor , Nitin B Gupte , Steven Zhang
IPC分类号： G06F13/00 , G06F13/28 , H04N7/12
CPC分类号： G06F12/0864 , G06F12/126 , H04N19/43 , H04N19/433
摘要： Domain-based cache management methods and systems, including domain event based priority demotion (“EPD”). In EPD, priorities of cached data blocks are demoted upon one or more domain events, such as upon encoding of one or more macroblocks of a video frame. New data blocks may be written over lowest priority cached data blocks. New data blocks may initially be assigned a highest priority. Alternatively, or additionally, one or more new data blocks may initially be assigned one of a plurality of higher priorities based on domain-based information, such as a relative position of a requested data block within a video frame, and/or a relative direction associated with a requested data block. Domain-based cache management may be implemented with one or more other cache management techniques, such as least recently used techniques. Domain-based cache management may be implemented in associative caches, including set associative caches and fully associative caches, and may be implemented with indirect indexing.
摘要翻译：基于域的缓存管理方法和系统，包括基于域事件的优先级降级（EPD）。在EPD中，缓存的数据块的优先级在一个或多个域事件上降级，诸如在对视频帧的一个或多个宏块进行编码时降级。可以在最低优先级的缓存数据块上写入新的数据块。最初可以分配最新的数据块。或者或附加地，一个或多个新数据块可以基于基于域的信息，诸如在视频帧内的所请求的数据块的相对位置和/或相对方向，最初可被分配多个较高优先级中的一个与所请求的数据块相关联。基于域的高速缓存管理可以利用一个或多个其他高速缓存管理技术来实现，诸如最近最少使用的技术。基于域的缓存管理可以在关联高速缓存中实现，包括集合关联高速缓存和完全关联高速缓存，并且可以用间接索引来实现。

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