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1. 发明授权

US08022772B2 Cascode amplifier with protection circuitry 有权
标题翻译：带保护电路的串联放大器
公开(公告)号：US08022772B2
公开(公告)日：2011-09-20
申请号：US12407729
申请日：2009-03-19
申请人： Marco Cassia , Gurkanwal Singh Sahota
发明人： Marco Cassia , Gurkanwal Singh Sahota
IPC分类号： H03F1/22
CPC分类号： H03F1/223 , H03F1/523 , H03F3/211 , H03F3/72 , H03F2200/27 , H03F2200/294 , H03F2203/7206 , H03F2203/7215 , H03F2203/7236 , H03G1/0088
摘要： A cascode amplifier with protection circuitry is described. In one exemplary design, the amplifier includes multiple branches coupled in parallel, with at least one branch being switchable between “on” and “off” states. Each switchable branch includes a gain transistor coupled to a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and does not amplify the input signal in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state. The output signal swing may be split between the gain transistor and the cascode transistor in both the on and off states with the protection circuitry. Each transistor may then observe a fraction of the voltage swing. The voltage splitting in the off state may be achieved by floating the gain transistor and shorting the gate and source of the cascode transistor.
摘要翻译：描述了具有保护电路的共源共栅放大器。在一个示例性设计中，放大器包括并联耦合的多个分支，至少一个分支可在“开”和“关”状态之间切换。每个可切换分支包括耦合到共源共栅晶体管的增益晶体管。增益晶体管放大输入信号，并将放大的信号提供为导通状态，并且不将输入信号放大在关闭状态。共源共栅晶体管缓冲放大的信号，并提供处于导通状态的输出信号。在保护电路中，输出信号摆幅可以在开关状态和断开状态之间在增益晶体管和共源共栅晶体管之间分开。然后，每个晶体管可以观察电压摆幅的一小部分。断开状态下的分压可以通过使增益晶体管浮置并使共源共栅晶体管的栅极和源极短路来实现。

2. 发明申请

US20100291888A1 MULTI-MODE MULTI-BAND POWER AMPLIFIER MODULE 有权
标题翻译：多模多功率放大器模块
公开(公告)号：US20100291888A1
公开(公告)日：2010-11-18
申请号：US12575414
申请日：2009-10-07
申请人： Aristotele Hadjichristos , Puay Hoe See , Babak Nejati , Guy Klemens , Norman Frederick, JR. , Gurkanwal Singh Sahota , Marco Cassia , Nathan Pletcher , Yu Zhao , Thomas Myers
发明人： Aristotele Hadjichristos , Puay Hoe See , Babak Nejati , Guy Klemens , Norman Frederick, JR. , Gurkanwal Singh Sahota , Marco Cassia , Nathan Pletcher , Yu Zhao , Thomas Myers
IPC分类号： H04B1/04
CPC分类号： H04B1/0458 , H03F1/0277 , H03F3/24 , H03F3/72 , H03F2203/7236 , H04B1/0483
摘要： A multi-mode multi-band power amplifier (PA) module is described. In an exemplary design, the PA module includes multiple power amplifiers, multiple matching circuits, and a set of switches. Each power amplifier provides power amplification for its input signal when selected. Each matching circuit provides impedance matching and filtering for its power amplifier and provides a respective output signal. The switches configure the power amplifiers to support multiple modes, with each mode being for a particular radio technology. Each power amplifier supports at least two modes. The PA module may further include a driver amplifier and an additional matching circuit. The driver amplifier amplifies an input signal and provides an amplified signal to the power amplifiers. The additional matching circuit combines the outputs of other matching circuits and provides an output signal with higher output power. The driver amplifier and the power amplifiers can support multiple output power levels.
摘要翻译：描述了多模式多频带功率放大器（PA）模块。在示例性设计中，PA模块包括多个功率放大器，多个匹配电路和一组开关。每个功率放大器在选择时为其输入信号提供功率放大。每个匹配电路为其功率放大器提供阻抗匹配和滤波，并提供相应的输出信号。这些开关配置功率放大器以支持多种模式，每种模式都适用于特定的无线电技术。每个功率放大器至少支持两种模式。 PA模块还可以包括驱动器放大器和附加匹配电路。驱动器放大器放大输入信号并向功率放大器提供放大的信号。附加匹配电路组合其他匹配电路的输出，并提供具有较高输出功率的输出信号。驱动器放大器和功率放大器可以支持多个输出功率电平。

3. 发明申请

US20100237945A1 CASCODE AMPLIFIER WITH PROTECTION CIRCUITRY 有权
标题翻译：带保护电路的CASCODE放大器
公开(公告)号：US20100237945A1
公开(公告)日：2010-09-23
申请号：US12407729
申请日：2009-03-19
申请人： Marco Cassia , Gurkanwal Singh Sahota
发明人： Marco Cassia , Gurkanwal Singh Sahota
IPC分类号： H03F3/16
CPC分类号： H03F1/223 , H03F1/523 , H03F3/211 , H03F3/72 , H03F2200/27 , H03F2200/294 , H03F2203/7206 , H03F2203/7215 , H03F2203/7236 , H03G1/0088
摘要： A cascode amplifier with protection circuitry is described. In one exemplary design, the amplifier includes multiple branches coupled in parallel, with at least one branch being switchable between “on” and “off” states. Each switchable branch includes a gain transistor coupled to a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and does not amplify the input signal in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state. The output signal swing may be split between the gain transistor and the cascode transistor in both the on and off states with the protection circuitry. Each transistor may then observe a fraction of the voltage swing. The voltage splitting in the off state may be achieved by floating the gain transistor and shorting the gate and source of the cascode transistor.
摘要翻译：描述了具有保护电路的共源共栅放大器。在一个示例性设计中，放大器包括并联耦合的多个分支，至少一个分支可在“开”和“关”状态之间切换。每个可切换分支包括耦合到共源共栅晶体管的增益晶体管。增益晶体管放大输入信号，并将放大的信号提供为导通状态，并且不将输入信号放大在关闭状态。共源共栅晶体管缓冲放大的信号，并提供处于导通状态的输出信号。在保护电路中，输出信号摆幅可以在开关状态和断开状态之间在增益晶体管和共源共栅晶体管之间分开。然后，每个晶体管可以观察电压摆幅的一小部分。断开状态下的分压可以通过使增益晶体管浮置并使共源共栅晶体管的栅极和源极短路来实现。

4. 发明授权

US08150339B2 Switchable-level voltage supplies for multimode communications 有权
标题翻译：用于多模通信的可切换电平电压源
公开(公告)号：US08150339B2
公开(公告)日：2012-04-03
申请号：US11935200
申请日：2007-11-05
申请人： Marco Cassia , Aristotele Hadjichristos
发明人： Marco Cassia , Aristotele Hadjichristos
IPC分类号： H04B1/04 , H04M1/00
CPC分类号： H04B1/0475 , H03F1/02 , H03F1/0244 , H03F3/24 , H03F3/45475 , H03F2203/45731 , H04B1/0057 , H04B1/406 , H04B2001/045
摘要： Switchable voltage level supplies for circuitry in a multi-mode communications chipset are disclosed. In an embodiment, a first voltage level is supplied to TX circuitry operating in a first mode having a first set of linearity and/or noise requirements. A second voltage level lower than the first voltage level is supplied to TX circuitry operating in a second mode having a second set of linearity and/or noise requirements looser than the first set of requirements. The first mode may be operation according to the GSM standard, and the second mode may be operation according to the W-CDMA standard.
摘要翻译：公开了一种用于多模式通信芯片组中的电路的可切换电压电平。在一个实施例中，向具有第一组线性和/或噪声要求的第一模式工作的TX电路提供第一电压电平。低于第一电压电平的第二电压电平被提供给具有比第一组要求松动的第二组线性和/或噪声要求的第二模式工作的TX电路。第一模式可以是根据GSM标准的操作，并且第二模式可以是根据W-CDMA标准的操作。

5. 发明授权

US08195119B2 Switchable input pair operational amplifiers 有权
标题翻译：可切换输入对运算放大器
公开(公告)号：US08195119B2
公开(公告)日：2012-06-05
申请号：US12465553
申请日：2009-05-13
申请人： Marco Cassia , Aleksandar M. Tasic
发明人： Marco Cassia , Aleksandar M. Tasic
IPC分类号： H04B1/18
CPC分类号： H03F3/72 , H03F3/19 , H03F3/211 , H03F3/45183 , H03F2200/111 , H03F2200/294 , H03F2200/429 , H03F2200/451 , H03F2203/21136 , H03F2203/21178 , H03F2203/45318 , H03F2203/45352 , H03F2203/45616 , H03F2203/45702 , H03F2203/7209 , H03F2203/7215 , H03F2203/7236 , H03F2203/7239
摘要： Techniques for designing a switchable amplifier are described. In one aspect, a switchable amplifier including a core amplifier circuit configured to selectively enable one or more parallel input transistor pairs is described. The core amplifier circuit comprises a permanently enabled input transistor pair. In another aspect, a device operable between a first mode of operation and a second mode of operation comprising a receiver logic circuit for selectably enabling and disabling a plurality of input transistor pairs within a switchable amplifier is described where the switchable amplifier also includes a core amplifier circuit coupled to the receiver logic circuit for selectably enabling and disabling a transistor pair therein. The described switchable amplifiers result in the ability to provide varying amplifier performance characteristics based upon the current mode of operation of the device.
摘要翻译：描述了用于设计可切换放大器的技术。在一个方面，描述了一种可切换放大器，其包括被配置为选择性地启用一个或多个并行输入晶体管对的核心放大器电路。核心放大器电路包括永久使能的输入晶体管对。在另一方面，描述了在第一操作模式和第二操作模式之间操作的装置，其包括用于可切换地启用和禁用可切换放大器内的多个输入晶体管对的接收器逻辑电路，其中可切换放大器还包括芯放大器耦合到接收器逻辑电路的电路，用于可选地启用和禁用其中的晶体管对。所描述的可切换放大器导致基于设备的当前操作模式来提供变化的放大器性能特征的能力。

6. 发明申请

US20110025404A1 SWITCHES WITH VARIABLE CONTROL VOLTAGES 审中-公开
标题翻译：具有可变控制电压的开关
公开(公告)号：US20110025404A1
公开(公告)日：2011-02-03
申请号：US12623232
申请日：2009-11-20
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03K17/687
CPC分类号： H03K17/693 , H03K17/08122 , H03K17/102 , H03K2017/066 , H03K2217/0054
摘要： Switches with variable control voltages and having improved reliability and performance are described. In an exemplary design, an apparatus includes a switch, a peak voltage detector, and a control voltage generator. The switch may be implemented with stacked transistors. The peak voltage detector detects a peak voltage of an input signal provided to the switch. In an exemplary design, the control voltage generator generates a variable control voltage to turn off the switch based on the detected peak voltage. In another exemplary design, the control voltage generator generates a variable control voltage to turn on the switch based on the detected peak voltage. In yet another exemplary design, the control voltage generator generates a control voltage to turn on the switch and attenuate the input signal when the peak voltage exceeds a high threshold.
摘要翻译：描述了具有可变控制电压并具有改进的可靠性和性能的开关。在示例性设计中，装置包括开关，峰值电压检测器和控制电压发生器。开关可以用堆叠晶体管来实现。峰值电压检测器检测提供给开关的输入信号的峰值电压。在示例性设计中，控制电压发生器产生可变控制电压，以基于检测到的峰值电压来关断开关。在另一示例性设计中，控制电压发生器产生可变控制电压，以基于检测到的峰值电压来接通开关。在另一示例性设计中，当峰值电压超过高阈值时，控制电压发生器产生控制电压以接通开关并衰减输入信号。

7. 发明申请

US20110018583A1 HIGH VOLTAGE LOGIC CIRCUITS 有权
标题翻译：高电压逻辑电路
公开(公告)号：US20110018583A1
公开(公告)日：2011-01-27
申请号：US12619562
申请日：2009-11-16
申请人： Marco Cassia
发明人： Marco Cassia
IPC分类号： H03K19/0175
CPC分类号： H03K19/018521 , H03K19/0013 , H03K19/00315
摘要： High voltage logic circuits that can handle digital input and output signals having a larger voltage range are described. In an exemplary design, a high voltage logic circuit includes an input stage, a second stage, and an output stage. The input stage receives at least one input signal and provides (i) at least one first intermediate signal having a first voltage range and (ii) at least one second intermediate signal having a second voltage range. The second stage receives and processes the first and second intermediate signals based on a logic function and provides (i) a first drive signal having the first voltage range and (ii) a second drive signal having the second voltage range. The output stage receives the first and second drive signals and provides an output signal having a third voltage range, which may be larger than each of the first and second voltage ranges.
摘要翻译：描述了可以处理具有较大电压范围的数字输入和输出信号的高电压逻辑电路。在示例性设计中，高压逻辑电路包括输入级，第二级和输出级。输入级接收至少一个输入信号，并提供（i）具有第一电压范围的至少一个第一中间信号和（ii）具有第二电压范围的至少一个第二中间信号。第二级基于逻辑功能接收和处理第一和第二中间信号，并提供（i）具有第一电压范围的第一驱动信号和（ii）具有第二电压范围的第二驱动信号。输出级接收第一和第二驱动信号，并提供具有第三电压范围的输出信号，其可以大于第一和第二电压范围中的每一个。

8. 发明申请

US20100289579A1 SWITCHABLE INPUT PAIR OPERATIONAL AMPLIFIERS 有权
标题翻译：可切换输入对运行放大器
公开(公告)号：US20100289579A1
公开(公告)日：2010-11-18
申请号：US12465553
申请日：2009-05-13
申请人： Marco Cassia , Aleksandar M. Tasic
发明人： Marco Cassia , Aleksandar M. Tasic
IPC分类号： H03F3/217
CPC分类号： H03F3/72 , H03F3/19 , H03F3/211 , H03F3/45183 , H03F2200/111 , H03F2200/294 , H03F2200/429 , H03F2200/451 , H03F2203/21136 , H03F2203/21178 , H03F2203/45318 , H03F2203/45352 , H03F2203/45616 , H03F2203/45702 , H03F2203/7209 , H03F2203/7215 , H03F2203/7236 , H03F2203/7239
摘要： Techniques for designing a switchable amplifier are described. In one aspect, a switchable amplifier including a core amplifier circuit configured to selectively enable one or more parallel input transistor pairs is described. The core amplifier circuit comprises a permanently enabled input transistor pair. In another aspect, a device operable between a first mode of operation and a second mode of operation comprising a receiver logic circuit for selectably enabling and disabling a plurality of input transistor pairs within a switchable amplifier is described where the switchable amplifier also includes a core amplifier circuit coupled to the receiver logic circuit for selectably enabling and disabling a transistor pair therein. The described switchable amplifiers result in the ability to provide varying amplifier performance characteristics based upon the current mode of operation of the device.
摘要翻译：描述了用于设计可切换放大器的技术。在一个方面，描述了一种可切换放大器，其包括被配置为选择性地启用一个或多个并行输入晶体管对的核心放大器电路。核心放大器电路包括永久使能的输入晶体管对。在另一方面，描述了在第一操作模式和第二操作模式之间操作的装置，其包括用于可切换地启用和禁用可切换放大器内的多个输入晶体管对的接收器逻辑电路，其中可切换放大器还包括芯放大器耦合到接收器逻辑电路的电路，用于可选地启用和禁用其中的晶体管对。所描述的可切换放大器导致基于设备的当前操作模式来提供变化的放大器性能特征的能力。

9. 发明申请

US20100022206A1 TRANSMISSION NOISE CANCELLATION 有权
标题翻译：传输噪声消除
公开(公告)号：US20100022206A1
公开(公告)日：2010-01-28
申请号：US12180350
申请日：2008-07-25
申请人： Vladimir Aparin , Aristotele Hadjichristos , Marco Cassia
发明人： Vladimir Aparin , Aristotele Hadjichristos , Marco Cassia
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03F1/34 , H03F3/24 , H04B2001/0433
摘要： Exemplary embodiments of the disclosure are directed to down-converting an RF signal of a transmitter to baseband, filtering the down-converted signal, and generating a composite signal based on the filtered down-converted signal and a transmission based-band signal.
摘要翻译：本公开的示例性实施例涉及将发射机的RF信号下变频到基带，对下变频信号进行滤波，并且基于滤波的下变频信号和基于传输的频带信号来生成复合信号。

10. 发明授权

US08395435B2 Switches with bias resistors for even voltage distribution 有权
标题翻译：具有偏置电阻的开关，用于均匀的电压分配
公开(公告)号：US08395435B2
公开(公告)日：2013-03-12
申请号：US12615107
申请日：2009-11-09
申请人： Marco Cassia , Jeremy D. Dunworth
发明人： Marco Cassia , Jeremy D. Dunworth
IPC分类号： H03K17/687
CPC分类号： H03K17/102 , H03F3/72 , H03K17/693 , H03K2217/0018
摘要： Switches with connected bulk for improved switching performance and bias resistors for even voltage distribution to improve reliability are described. In an exemplary design, a switch may include a plurality of transistors coupled in a stack and at least one resistor coupled to at least one intermediate node in the stack. The transistors may have (i) a first voltage applied to a first transistor in the stack and (ii) a second voltage that is lower than the first voltage applied to bulk nodes of the transistors. The resistor(s) may maintain matching bias conditions for the transistors when they are turned off. In one exemplary design, one resistor may be coupled between the source and drain of each transistor. In another exemplary design, one resistor may be coupled between each intermediate node and the first voltage. The resistor(s) may maintain the source of each transistor at the first voltage.
摘要翻译：描述了具有连接体积的开关，用于提高开关性能和用于均匀电压分配的偏置电阻器以提高可靠性在示例性设计中，开关可以包括耦合在堆叠中的多个晶体管和耦合到堆叠中的至少一个中间节点的至少一个电阻器。晶体管可以具有（i）施加到堆叠中的第一晶体管的第一电压和（ii）低于施加到晶体管的体节点的第一电压的第二电压。当晶体管关断时，电阻可以保持晶体管的匹配偏置条件。在一个示例性设计中，一个电阻器可以耦合在每个晶体管的源极和漏极之间。在另一示例性设计中，一个电阻器可以耦合在每个中间节点和第一电压之间。电阻器可以将每个晶体管的源极保持在第一电压。

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