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1. 发明申请

US20160218027A1 SINGLE AND DUAL STAGE WAFER CUSHION AND WAFER SEPARATOR 审中-公开
标题翻译：单级和双级水平垫片和水平分离器
公开(公告)号：US20160218027A1
公开(公告)日：2016-07-28
申请号：US14983101
申请日：2015-12-29
申请人： James D. Pylant , Christopher R. Mack , Alan L. Waber , David A. Miller
发明人： James D. Pylant , Christopher R. Mack , Alan L. Waber , David A. Miller
IPC分类号： H01L21/673
CPC分类号： H01L21/67369 , H01L21/67346 , H01L21/67366 , H01L21/67379 , H01L21/67389
摘要： Improvements in a single and dual stage wafer cushion is disclosed where the wafer cushion can use an edge hinge as a single first stage cushion and a second mid span hinge for the dual stage wafer cushion. This dual stage design gives two distinctly different cushioning forces as opposed to using a single stage design where the force is linear with the amount of compression that is being applied to the outer surfaces of the wafer cushion. The outside edge of the ring provides the greatest expansion such that only the outer edge of the ring makes contact with the outer edge of a wafer. The wafer cushion is a material that flexes and absorbs shocks before the shock is transferred to the wafer stack. The material minimizes debris or contaminants from embedding into the wafer cushion and also prevents sheading of material from the wafer cushion.
摘要翻译：公开了一种单级和双级晶片衬垫的改进，其中晶片衬垫可以使用作为单级第一级衬垫的边缘铰链和用于双级晶片衬垫的第二中间跨接铰链。这种双级设计提供了两种明显不同的缓冲力，而不是使用单级设计，其中力与施加到晶片垫的外表面的压缩量成线性关系。环的外边缘提供最大的膨胀，使得只有环的外边缘与晶片的外边缘接触。晶片垫是在冲击传递到晶片堆栈之前弯曲和吸收冲击的材料。该材料使碎片或污染物最小化，从而嵌入到晶片衬垫中，并且还防止材料从晶片衬垫的剪切。

2. 外观设计

USD685245S1 Drill 有权
公开(公告)号：USD685245S1
公开(公告)日：2013-07-02
申请号：US29427509
申请日：2012-07-19
申请人： James C. Tirone , David A. Miller , John Burnie , Robert B. Schoch
设计人： James C. Tirone , David A. Miller , John Burnie , Robert B. Schoch

3. 发明授权

US5870602A Multi-processor system with system wide reset and partial system reset capabilities 失效
标题翻译：具有系统复位和部分系统复位功能的多处理器系统
公开(公告)号：US5870602A
公开(公告)日：1999-02-09
申请号：US14369
申请日：1998-01-27
申请人： David A. Miller , Kenneth A. Jansen , Paul R. Culley , Mark Taylor , Javier F. Izquierdo
发明人： David A. Miller , Kenneth A. Jansen , Paul R. Culley , Mark Taylor , Javier F. Izquierdo
IPC分类号： G06F1/24 , G06F9/00
CPC分类号： G06F1/24
摘要： A multiprocessor system includes first and second processing units. Each of these processing units includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. Each processing unit is reset in response to a system reset signal but only selected portions of the processing units are reset in response to a partial-reset signal. The system can also include a number other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.
摘要翻译：多处理器系统包括第一和第二处理单元。这些处理单元中的每一个至少包括处理器，优选地还包括高速缓冲存储器，高速缓冲存储器控制器和数字协处理器。每个处理单元响应于系统复位信号被复位，但只响应于部分复位信号来复位处理单元的选定部分。该系统还可以包括许多其他组件，例如视频电路，硬盘驱动器，总线接口电路，扬声器，键盘控制器和键盘。

4. 发明授权

US5813984A Forensic skull and soft tissue database and on-line facial reconstruction of victims and age progession portrait rendering of missing children through utilization of advance diagnostic radiologic modalities 失效
标题翻译：法医头骨和软组织数据库和在线面部重建的受害者和年龄进展肖像呈现失踪的儿童通过利用先进的诊断放射学模式
公开(公告)号：US5813984A
公开(公告)日：1998-09-29
申请号：US812528
申请日：1997-03-07
申请人： John R. Haaga , David A. Miller , Joseph P. Molter , Jeffrey L. Duerk , Jonathan S. Lewin
发明人： John R. Haaga , David A. Miller , Joseph P. Molter , Jeffrey L. Duerk , Jonathan S. Lewin
IPC分类号： G06T7/60 , G06T15/00 , A61B6/00
CPC分类号： G06T15/00 , G06T7/60
摘要： A method and device for generating a forensic skull and soft tissue database used for the on-line facial reconstruction of victims and age progression portrait rendering of missing children through utilization of advance diagnostic radiologic modalities.
摘要翻译：一种用于产生法医头骨和软组织数据库的方法和装置，用于通过利用先进的诊断放射学模式对受害者的在线面部重建和失踪儿童的年龄进展肖像呈现。

5. 发明授权

US5596759A Method for initializing a multiple processor computer system using a common ROM 失效
标题翻译：使用公共ROM初始化多处理器计算机系统的方法
公开(公告)号：US5596759A
公开(公告)日：1997-01-21
申请号：US538779
申请日：1995-10-03
申请人： David A. Miller , Kenneth A. Jansen , Montgomery C. McGraw , Darren J. Cepulis
发明人： David A. Miller , Kenneth A. Jansen , Montgomery C. McGraw , Darren J. Cepulis
IPC分类号： G06F9/445 , G06F11/14 , G06F11/20 , G06F11/22 , G06F1/24 , G06F15/167
CPC分类号： G06F11/1417 , G06F11/22 , G06F11/2284 , G06F15/177 , G06F9/4403 , G06F9/4405 , G06F11/2038 , G06F11/2043 , G06F9/4416
摘要： Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used. The second technique is more specifically oriented to a particular system, and includes the use of an identity register to differentiate between primary and secondary processors.
摘要翻译：公开了允许使用单个ROM启动多个处理器的两种设计变型。在每个设计中，允许单个主处理器执行完整的POST，而剩余的辅助处理器在其POST过程中被引导以执行更有限的初始化序列。上电时，主处理器开始正常POST，而辅助处理器保持，直到向量放置到重定向向量位置。然后，使用其位于由重定向向量指示的地址处的自己的初始化代码随后启动每个二级处理器。第一种技术适用于一般的多处理器系统，因为该设计的实现可以从外部软件或从使用它的特定机器的操作系统的添加运行。第二种技术更具体地针对特定系统，并且包括使用身份寄存器来区分主处理器和辅助处理器。

6. 发明授权

US08628029B2 Paint sprayer 有权
公开(公告)号：US08628029B2
公开(公告)日：2014-01-14
申请号：US12946146
申请日：2010-11-15
申请人： Jamie S. Munn , James D. Marshall , Stacey Black , David A. Miller , Steven R. Wiezorek , SuHu Zhou , GenZhang Ye
发明人： Jamie S. Munn , James D. Marshall , Stacey Black , David A. Miller , Steven R. Wiezorek , SuHu Zhou , GenZhang Ye
IPC分类号： B05B1/28 , A62C5/02 , F23D11/24 , B05B7/04 , A01G25/14
CPC分类号： B05B7/0815 , B05B7/066 , B05B7/1209 , B05B7/2408 , B05B7/241 , B05B7/2416 , B05B7/2432 , B05B12/002
摘要： A sprayer for spraying a fluid can include a sprayer body, a trigger assembly, a flow adjustment mechanism and a fluid reservoir. The sprayer body can include a handle portion and a nozzle portion, the nozzle portion defining a fluid outlet and including a fluid conduit in communication with the fluid outlet. The trigger assembly can be coupled to the nozzle portion and be configured to open the fluid outlet. The flow adjustment mechanism can be coupled to the trigger assembly and be configured to adjust a flow rate of the sprayer. The fluid reservoir can be coupled to the sprayer body and be in communication with the fluid outlet and fluid conduit. The fluid reservoir can include a cap and first and second necks, the first neck being coupled to the sprayer body and the cap being removably coupled to the second neck.

7. 发明申请

US20110266014A1 TWIST-HANDLED POWER TOOL WITH LOCKING SYSTEM 有权
标题翻译：带锁定系统的双绞电动工具
公开(公告)号：US20110266014A1
公开(公告)日：2011-11-03
申请号：US12783850
申请日：2010-05-20
申请人： Jason C. McRoberts , Ashok S. Baskar , David A. Miller
发明人： Jason C. McRoberts , Ashok S. Baskar , David A. Miller
IPC分类号： B25F5/02
CPC分类号： B25F5/02
摘要： A power tool with first and second housing portions, a powertrain, a mounting hub and a lock bar. The powertrain has an output member that extends from the second housing portion and which is movable relative to an output member axis. The mounting hub is fixedly coupled to one of the first and second housing portions. The lock bar is movably mounted to the other one of the first and second housing portions between a locked position and a first unlocked position. The lock bar cooperates with the mounting hub in the locked position to inhibit relative rotation between the first and second housing portions. Placement of the lock bar in the first unlocked position permits relative rotation between the first and second housing portions.
摘要翻译：具有第一和第二壳体部分的动力工具，动力系，安装轮毂和锁杆。动力系具有从第二壳体部分延伸并且可相对于输出构件轴线移动的输出构件。安装毂固定地联接到第一和第二壳体部分中的一个。锁定杆在锁定位置和第一解锁位置之间可移动地安装到第一和第二壳体部分中的另一个。锁定杆在锁定位置与安装毂配合以阻止第一和第二壳体部分之间的相对旋转。锁定杆在第一解锁位置的放置允许第一和第二壳体部分之间的相对旋转。

8. 发明授权

US07110818B2 Method and system for programming an implantable cardiac device 有权
公开(公告)号：US07110818B2
公开(公告)日：2006-09-19
申请号：US10012886
申请日：2001-11-04
申请人： Thomas N. Anderson , Vickie L. Conley , David A. Miller , Mark Schwartz , C. Denise Thompson
发明人： Thomas N. Anderson , Vickie L. Conley , David A. Miller , Mark Schwartz , C. Denise Thompson
IPC分类号： A61N1/37
CPC分类号： A61N1/37235 , A61N1/37247
摘要： Systems and methods for providing a medical device parameter profile to a programmer that is remote from where the parameter profile was created is described. The system includes a first programmer creating a parameter profile for a specific classification. The classes are defined by therapy or patient status. A communication system for communicating the parameter profile to at least one additional programmer that is remote from the first programmer.

9. 发明授权

US5867703A Common reset ROM 失效
标题翻译：普通复位ROM
公开(公告)号：US5867703A
公开(公告)日：1999-02-02
申请号：US14154
申请日：1998-01-27
申请人： David A. Miller , Kenneth A. Jansen , Montgomery C. McGraw , Darren J. Cepulis
发明人： David A. Miller , Kenneth A. Jansen , Montgomery C. McGraw , Darren J. Cepulis
IPC分类号： G06F9/445 , G06F11/14 , G06F11/20 , G06F11/22 , G06F9/06
CPC分类号： G06F11/1417 , G06F11/22 , G06F11/2284 , G06F15/177 , G06F9/4403 , G06F9/4405 , G06F11/2038 , G06F11/2043 , G06F9/4416
摘要： Two design variations which allow multiple processors to start up using a single ROM are disclosed. In each design, a single, primary processor is allowed to perform a complete POST while the remaining, secondary processors are directed in the course of their POST to perform a more limited initialization sequence. At power on, the primary processor begins a normal POST, while the secondary processors are held until a vector is placed into a redirection vector location. Each secondary processor is then subsequently started, using its own initialization code located at the address indicated by the redirection vector. The first technique is applicable to general multiprocessor systems because the implementation of this design can be run either from external software or from an addition to the operating system of the particular machine on which it is being used. The second technique is more specifically oriented to a particular system, and includes the use of an identity register to differentiate between primary and secondary processors.
摘要翻译：公开了允许使用单个ROM启动多个处理器的两种设计变型。在每个设计中，允许单个主处理器执行完整的POST，而剩余的辅助处理器在其POST过程中被引导以执行更有限的初始化序列。上电时，主处理器开始正常POST，而辅助处理器保持，直到向量放置到重定向向量位置。然后，使用其位于由重定向向量指示的地址处的自己的初始化代码随后启动每个二级处理器。第一种技术适用于一般的多处理器系统，因为这种设计的实现可以从外部软件运行，也可以从添加到正在使用它的特定机器的操作系统运行。第二种技术更具体地针对特定系统，并且包括使用身份寄存器来区分主处理器和辅助处理器。

10. 发明授权

US5822106A Synchronization of digital systems using optical pulses and mdoulators 失效
标题翻译：数字系统使用光脉冲和调制器的同步
公开(公告)号：US5822106A
公开(公告)日：1998-10-13
申请号：US774551
申请日：1996-12-30
申请人： Wayne H. Knox , David A. Miller
发明人： Wayne H. Knox , David A. Miller
IPC分类号： G06F1/10 , H04L7/00 , H04L7/033 , G02F1/03
CPC分类号： H04L7/0075 , G06F1/105 , H04L7/0337
摘要： The present invention provides synchronization of logic signals in a digital system using optical pulses generated from optical modulators. In one embodiment of the present invention, electrically driven optical modulators are positioned at electrical outputs of interest, and the modulators are read out in accordance with synchronized optical pulses produced from a timing source, where the optical pulse lengths are relatively short compared to the electrical output pulse length. The resulting modulated optical pulses output from the optical modulators are then all once more synchronous, with the skew in the original electrical signals having been removed. These optical pulses can then be communicated over optical channels, such as fiber or free space, with well controlled delay, thereby also reducing problems of variable delay in electrical connections. The optical signals can then be read by photodetectors at the inputs to further stages of digital processing, giving inputs that are synchronized once more despite the different delays or skews in the original electrical signals.
摘要翻译：本发明提供使用从光学调制器产生的光脉冲的数字系统中的逻辑信号的同步。在本发明的一个实施例中，电驱动光调制器位于感兴趣的电输出处，并且根据从定时源产生的同步光脉冲读出调制器，其中光脉冲长度相对于电输出脉冲长度。然后，从光调制器输出的所得到的调制光脉冲全部再次同步，原始电信号中的偏斜已被去除。然后，这些光脉冲可以通过诸如光纤或自由空间的光信道进行传输，具有良好控制的延迟，从而也减少电连接中可变延迟的问题。然后光信号可以在数字处理的进一步的输入处由光电探测器读取，给出即使在原始电信号中出现不同延迟或偏斜的情况下一次同步的输入。

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