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    • 4. 发明专利
    • Packet relay device and packet relay control method
    • 分组继电器和分组继电器控制方法
    • JP2010109737A
    • 2010-05-13
    • JP2008280127
    • 2008-10-30
    • Iwatsu Electric Co LtdNippon Telegraph & Telephone East CorpNippon Telegraph & Telephone West Corp岩崎通信機株式会社東日本電信電話株式会社西日本電信電話株式会社
    • AOKI SATORUYAMAWAKI KOZOOHATA HIROYOSHI
    • H04L29/02H04L12/70H04L12/711H04L12/935H04L12/937H04M1/253
    • PROBLEM TO BE SOLVED: To obtain a packet relay device enabling packet transmission reception only with a single CPU interface in performing relay control of packets for a plurality of network devices. SOLUTION: The packet relay device includes: a plurality of network devices for transmitting and receiving packets, a single CPU interface, a RAM and a CPU. The RAM 150 includes a plurality writing regions in which one unit is a set of a packet buffer section to which a reception packet is transferred and a memory pool identifier writing section. The CPU interface 113 has a function of identifying a network device of a transmission source and writing a device identifier corresponding to the network device of the transmission source, and a function of transferring the reception packet to the packet buffer section. The CPU 120 has a driver means 121 for performing reception and transmission processings of packets for the network device via the CPU interface 113, and a network stack 123 for searching a transfer destination of the packet. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了获得一个分组中继设备,使得仅在单个CPU接口上进行分组传输接收才能对多个网络设备进行分组的中继控制。 解决方案:分组中继设备包括:用于发送和接收分组的多个网络设备,单个CPU接口,RAM和CPU。 RAM 150包括多个写入区域,其中一个单元是传送接收分组的分组缓冲器部分的集合和存储器池标识符写入部分。 CPU接口113具有识别发送源的网络装置和写入与发送源的网络装置对应的装置标识符的功能,以及将接收包转送到分组缓冲部的功能。 CPU120具有用于经由CPU接口113执行网络设备的分组的接收和发送处理的驱动器装置121和用于搜索分组的传送目的地的网络栈123。 版权所有(C)2010,JPO&INPIT