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    • 3. 发明授权
    • Multilevel imprint lithography
    • 多层压印光刻
    • US07256435B1
    • 2007-08-14
    • US10453329
    • 2003-06-02
    • Pavel KornilovichYong ChenDuncan StewartR. Stanley WilliamsPhilip J. KuekesMehmet Fatih Yanik
    • Pavel KornilovichYong ChenDuncan StewartR. Stanley WilliamsPhilip J. KuekesMehmet Fatih Yanik
    • H01L27/10
    • H01L21/76838B81C99/009B81C2201/0153B82Y10/00B82Y40/00G03F7/0002
    • A mold with a protruding pattern is provided that is pressed into a thin polymer film via an imprinting process. Controlled connections between nanowires and microwires and other lithographically-made elements of electronic circuitry are provided. An imprint stamp is configured to form arrays of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and three or more distinct heights in the Z direction. The stamp thus formed can be used to connect specific individual nanowires to specific microscopic regions of microscopic wires or pads. The protruding pattern in the mold creates recesses in the thin polymer film, so the polymer layer acquires the reverse of the pattern on the mold. After the mold is removed, the film is processed such that the polymer pattern can be transferred on a metal/semiconductor pattern on the substrate.
    • 提供具有突出图案的模具,其通过压印过程被压入薄聚合物膜。 提供了纳米线和微丝之间的控制连接以及电子电路的其它光刻元件。 打印印记被配置成形成大致平行的纳米线的阵列,其具有(1)X方向上的微尺寸,(2)在Y方向上的纳米尺寸和纳米间距,以及Z方向上的三个或更多个不同的高度。 如此形成的印章可以用于将特定的单个纳米线连接到微细线或垫的特定微观区域。 模具中的突出图案在薄聚合物膜中产生凹陷,因此聚合物层获得模具上图案的相反。 在除去模具之后,处理膜,使得聚合物图案可以在基底上的金属/半导体图案上转印。
    • 8. 发明授权
    • Active interconnects and control points in integrated circuits
    • 集成电路中的有源互连和控制点
    • US07242199B2
    • 2007-07-10
    • US11112795
    • 2005-04-21
    • R. Stanley WilliamsPhilip J KuekesFrederick A. PernerGreg SniderDuncan Stewart
    • R. Stanley WilliamsPhilip J KuekesFrederick A. PernerGreg SniderDuncan Stewart
    • G01R27/08
    • H05K7/1092H01L23/5228H01L2924/0002H01L2924/00
    • In various embodiments of the present invention, tunable resistors are introduced at the interconnect layer of integrated circuits in order to provide a for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronic characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains.
    • 在本发明的各种实施例中,在集成电路的互连层处引入可调电阻器,以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或者在制造之后配置集成电路。 例如,当诸如晶体管的某些内部组件由于制造缺陷而没有指定的电子特性时,可以使用根据本发明的实施例的集成电路的互连层中包括的可调谐电阻的可变电阻的调整 以调整内部电压和/或电平以便改善有缺陷的部件。 在其他情况下,可调谐电阻器可以用作开关以配置集成电路部件,包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。