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1. 发明授权

US07803712B2 Multilevel imprint lithography 失效
公开(公告)号：US07803712B2
公开(公告)日：2010-09-28
申请号：US11636264
申请日：2006-12-07
申请人： Pavel Kornilovich , Yong Chen , Duncan Stewart , R. Stanley Williams , Philip J. Kuekes , Mehmet Fatih Yanik
发明人： Pavel Kornilovich , Yong Chen , Duncan Stewart , R. Stanley Williams , Philip J. Kuekes , Mehmet Fatih Yanik
IPC分类号： H01L21/308
CPC分类号： H01L21/76838 , B81C99/009 , B81C2201/0153 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： A mold with a protruding pattern is provided that is pressed into a thin polymer film via an imprinting process. Controlled connections between nanowires and microwires and other lithographically-made elements of electronic circuitry are provided. An imprint stamp is configured to form arrays of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and three or more distinct heights in the Z direction. The stamp thus formed can be used to connect specific individual nanowires to specific microscopic regions of microscopic wires or pads. The protruding pattern in the mold creates recesses in the thin polymer film, so the polymer layer acquires the reverse of the pattern on the mold. After the mold is removed, the film is processed such that the polymer pattern can be transferred on a metal/semiconductor pattern on the substrate.

2. 发明申请

US20100112809A1 Multilevel imprint lithography 失效
标题翻译：多层压印光刻
公开(公告)号：US20100112809A1
公开(公告)日：2010-05-06
申请号：US11636264
申请日：2006-12-07
申请人： Pavel Kornilovich , Yong Chen , Duncan Stewart , R. Stanley Williams , Philip J. Kuekes , Mehmet Fatih Yanik
发明人： Pavel Kornilovich , Yong Chen , Duncan Stewart , R. Stanley Williams , Philip J. Kuekes , Mehmet Fatih Yanik
IPC分类号： H01L21/768
CPC分类号： H01L21/76838 , B81C99/009 , B81C2201/0153 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： A mold with a protruding pattern is provided that is pressed into a thin polymer film via an imprinting process. Controlled connections between nanowires and microwires and other lithographically-made elements of electronic circuitry are provided. An imprint stamp is configured to form arrays of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and three or more distinct heights in the Z direction. The stamp thus formed can be used to connect specific individual nanowires to specific microscopic regions of microscopic wires or pads. The protruding pattern in the mold creates recesses in the thin polymer film, so the polymer layer acquires the reverse of the pattern on the mold. After the mold is removed, the film is processed such that the polymer pattern can be transferred on a metal/semiconductor pattern on the substrate.
摘要翻译：提供具有突出图案的模具，其通过压印过程被压入薄聚合物膜。提供了纳米线和微丝之间的控制连接以及电子电路的其它光刻元件。打印印记被配置成形成大致平行的纳米线的阵列，其具有（1）X方向上的微尺寸，（2）在Y方向上的纳米尺寸和纳米间距，以及Z方向上的三个或更多个不同的高度。如此形成的印章可以用于将特定的单个纳米线连接到微细线或垫的特定微观区域。模具中的突出图案在薄聚合物膜中产生凹陷，因此聚合物层获得模具上图案的相反。在除去模具之后，处理膜，使得聚合物图案可以在基底上的金属/半导体图案上转印。

3. 发明授权

US07256435B1 Multilevel imprint lithography 有权
标题翻译：多层压印光刻
公开(公告)号：US07256435B1
公开(公告)日：2007-08-14
申请号：US10453329
申请日：2003-06-02
申请人： Pavel Kornilovich , Yong Chen , Duncan Stewart , R. Stanley Williams , Philip J. Kuekes , Mehmet Fatih Yanik
发明人： Pavel Kornilovich , Yong Chen , Duncan Stewart , R. Stanley Williams , Philip J. Kuekes , Mehmet Fatih Yanik
IPC分类号： H01L27/10
CPC分类号： H01L21/76838 , B81C99/009 , B81C2201/0153 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： A mold with a protruding pattern is provided that is pressed into a thin polymer film via an imprinting process. Controlled connections between nanowires and microwires and other lithographically-made elements of electronic circuitry are provided. An imprint stamp is configured to form arrays of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and three or more distinct heights in the Z direction. The stamp thus formed can be used to connect specific individual nanowires to specific microscopic regions of microscopic wires or pads. The protruding pattern in the mold creates recesses in the thin polymer film, so the polymer layer acquires the reverse of the pattern on the mold. After the mold is removed, the film is processed such that the polymer pattern can be transferred on a metal/semiconductor pattern on the substrate.
摘要翻译：提供具有突出图案的模具，其通过压印过程被压入薄聚合物膜。提供了纳米线和微丝之间的控制连接以及电子电路的其它光刻元件。打印印记被配置成形成大致平行的纳米线的阵列，其具有（1）X方向上的微尺寸，（2）在Y方向上的纳米尺寸和纳米间距，以及Z方向上的三个或更多个不同的高度。如此形成的印章可以用于将特定的单个纳米线连接到微细线或垫的特定微观区域。模具中的突出图案在薄聚合物膜中产生凹陷，因此聚合物层获得模具上图案的相反。在除去模具之后，处理膜，使得聚合物图案可以在基底上的金属/半导体图案上转印。

4. 发明申请

US20080094051A1 Demultiplexed nanowire sensor array for detection of chemical and biological species 有权
标题翻译：用于检测化学和生物物种的多路复用纳米线传感器阵列
公开(公告)号：US20080094051A1
公开(公告)日：2008-04-24
申请号：US11584028
申请日：2006-10-19
申请人： R. Stanley Williams , Philip J. Kuekes , Yong Chen
发明人： R. Stanley Williams , Philip J. Kuekes , Yong Chen
IPC分类号： G01R19/00
CPC分类号： G01N27/4145 , G01N27/4146
摘要： A demultiplexed nanowire sensor array for detecting different chemical and biological species are provided, comprising a sensor array and a demultiplexer array. Methods of detecting at least two chemical and/or biological species are also provided, using the demultiplexed nanowire sensor array.
摘要翻译：提供了用于检测不同化学和生物物种的解复用的纳米线传感器阵列，其包括传感器阵列和解复用器阵列。还使用解复用的纳米线传感器阵列来提供检测至少两种化学和/或生物物种的方法。

5. 发明授权

US08384136B2 Demultiplexed nanowire sensor array for detection of chemical and biological species 有权
标题翻译：用于检测化学和生物物种的多路复用纳米线传感器阵列
公开(公告)号：US08384136B2
公开(公告)日：2013-02-26
申请号：US11584028
申请日：2006-10-19
申请人： R. Stanley Williams , Philip J. Kuekes , Yong Chen
发明人： R. Stanley Williams , Philip J. Kuekes , Yong Chen
IPC分类号： G01R19/00
CPC分类号： G01N27/4145 , G01N27/4146
摘要： A demultiplexed nanowire sensor array for detecting different chemical and biological species are provided, comprising a sensor array and a demultiplexer array. Methods of detecting at least two chemical and/or biological species are also provided, using the demultiplexed nanowire sensor array.
摘要翻译：提供了用于检测不同化学和生物物种的解复用的纳米线传感器阵列，其包括传感器阵列和解复用器阵列。还使用解复用的纳米线传感器阵列来提供检测至少两种化学和/或生物物种的方法。

6. 发明授权

US07335579B2 Nanometer-scale memory device utilizing self-aligned rectifying elements and method of making 失效
标题翻译：采用自对准整流元件的纳米级存储器件及其制造方法
公开(公告)号：US07335579B2
公开(公告)日：2008-02-26
申请号：US11331697
申请日：2006-01-12
申请人： James Stasiak , Kevin F Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
发明人： James Stasiak , Kevin F Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
IPC分类号： H01L21/20
CPC分类号： B82Y10/00 , H01L27/1021 , H01L27/24 , Y10S977/887 , Y10S977/94
摘要： A memory device including a substrate, and multiple self-aligned nano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.
摘要翻译：一种存储器件，包括衬底和设置在衬底上的多个自对准纳米整流元件。每个纳米整流元件具有多个第一电极线，并且多个器件结构设置在形成多个自对准纳米整流元件的多个第一电极线上。每个器件结构具有小于约75纳米的至少一个横向尺寸。存储器件还包括设置在器件结构上的多个开关元件，并且在至少一个方向上与器件结构自对准。此外，存储器件包括多个第二电极线，其布置在开关元件上方，电耦合并自对准，从而形成存储器件。

7. 发明申请

US20060128129A1 Nanometer-scale memory device utilizing self-aligned rectifying elements and method of making 失效
标题翻译：采用自对准整流元件的纳米级存储器件及其制造方法
公开(公告)号：US20060128129A1
公开(公告)日：2006-06-15
申请号：US11331697
申请日：2006-01-12
申请人： James Stasiak , Kevin Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
发明人： James Stasiak , Kevin Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
IPC分类号： H01L21/20
CPC分类号： B82Y10/00 , H01L27/1021 , H01L27/24 , Y10S977/887 , Y10S977/94
摘要： A memory device including a substrate, and multiple self-aligned nano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.
摘要翻译：一种存储器件，包括衬底和设置在衬底上的多个自对准纳米整流元件。每个纳米整流元件具有多个第一电极线，并且多个器件结构设置在形成多个自对准纳米整流元件的多个第一电极线上。每个器件结构具有小于约75纳米的至少一个横向尺寸。存储器件还包括设置在器件结构上的多个开关元件，并且在至少一个方向上与器件结构自对准。此外，存储器件包括多个第二电极线，其布置在开关元件上方，电耦合并自对准，从而形成存储器件。

8. 发明授权

US07034332B2 Nanometer-scale memory device utilizing self-aligned rectifying elements and method of making 失效
标题翻译：采用自对准整流元件的纳米级存储器件及其制造方法
公开(公告)号：US07034332B2
公开(公告)日：2006-04-25
申请号：US10765799
申请日：2004-01-27
申请人： James Stasiak , Kevin F Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
发明人： James Stasiak , Kevin F Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
IPC分类号： H01L35/24
CPC分类号： B82Y10/00 , H01L27/1021 , H01L27/24 , Y10S977/887 , Y10S977/94
摘要： A memory device including a substrate, and multiple self-alignednano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.
摘要翻译：一种存储器件，包括衬底和设置在衬底上的多个自对准纳米整流元件。每个纳米整流元件具有多个第一电极线，并且多个器件结构设置在形成多个自对准纳米整流元件的多个第一电极线上。每个器件结构具有小于约75纳米的至少一个横向尺寸。存储器件还包括设置在器件结构上的多个开关元件，并且在至少一个方向上与器件结构自对准。此外，存储器件包括多个第二电极线，其布置在开关元件上方，电耦合并自对准，从而形成存储器件。

9. 发明授权

US07378347B2 Method of forming catalyst nanoparticles for nanowire growth and other applications 失效
标题翻译：形成用于纳米线生长和其他应用的催化剂纳米颗粒的方法
公开(公告)号：US07378347B2
公开(公告)日：2008-05-27
申请号：US10281678
申请日：2002-10-28
申请人： Theodore I. Kamins , Philip J. Kuekes , Yong Chen
发明人： Theodore I. Kamins , Philip J. Kuekes , Yong Chen
IPC分类号： H01L21/461
CPC分类号： B82Y30/00 , B82Y10/00 , C30B11/00 , C30B11/12 , C30B29/605 , H01L2924/0002 , H01L2924/00
摘要： Methods for forming a predetermined pattern of catalytic regions having nanoscale dimensions are provided for use in the growth of nanowires. The methods include one or more nanoimprinting steps to produce arrays of catalytic nanoislands or nanoscale regions of catalytic material circumscribed by noncatalytic material.
摘要翻译：提供用于形成具有纳米级尺寸的催化区域的预定图案的方法用于纳米线的生长。所述方法包括一个或多个纳米压印步骤，以产生由非催化材料限定的催化材料的催化纳米级或纳米尺度区域的阵列。

10. 发明申请

US20050162881A1 Nanometer-scale memory device utilizing self-aligned rectifying elements and method of making 失效
标题翻译：采用自对准整流元件的纳米级存储器件及其制造方法
公开(公告)号：US20050162881A1
公开(公告)日：2005-07-28
申请号：US10765799
申请日：2004-01-27
申请人： James Stasiak , Kevin Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
发明人： James Stasiak , Kevin Peters , Jennifer Wu , Pavel Kornilovich , Yong Chen
IPC分类号： H01L21/027 , G03F7/00 , H01L21/329 , H01L21/8229 , H01L21/8246 , H01L27/10 , H01L27/102 , H01L27/105 , H01L27/24 , H01L27/28 , H01L51/05 , G11C5/06
CPC分类号： B82Y10/00 , H01L27/1021 , H01L27/24 , Y10S977/887 , Y10S977/94
摘要： A memory device including a substrate, and multiple self-alignednano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.
摘要翻译：一种存储器件，包括衬底和设置在衬底上的多个自对准纳米整流元件。每个纳米整流元件具有多个第一电极线，并且多个器件结构设置在形成多个自对准纳米整流元件的多个第一电极线上。每个器件结构具有小于约75纳米的至少一个横向尺寸。存储器件还包括设置在器件结构上的多个开关元件，并且在至少一个方向上与器件结构自对准。此外，存储器件包括多个第二电极线，其布置在开关元件上方，电耦合并自对准，从而形成存储器件。

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