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1. 发明授权

US06688584B2 Compound structure for reduced contact resistance 有权
公开(公告)号：US06688584B2
公开(公告)日：2004-02-10
申请号：US09858617
申请日：2001-05-16
申请人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
发明人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
IPC分类号： H01L2940
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76849 , H01L21/76855 , H01L21/7687 , H01L21/76889 , H01L23/485 , H01L27/10855 , H01L28/84 , H01L28/90 , H01L29/456 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric level. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. The second refractory metal material can thus serve as an impurity donor during an anneal or other exposure to heat. This net migration of the impurities to the first refractory metal material limits growth of a metal silicide interface between the first refractory metal material and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.

2. 发明授权

US07545009B2 Word lines for memory cells 有权
标题翻译：记忆单元的字线
公开(公告)号：US07545009B2
公开(公告)日：2009-06-09
申请号：US11072159
申请日：2005-03-04
申请人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
发明人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
IPC分类号： H01L29/78
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76849 , H01L21/76855 , H01L21/7687 , H01L21/76889 , H01L23/485 , H01L27/10855 , H01L28/84 , H01L28/90 , H01L29/456 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric level. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. The second refractory metal material can thus serve as an impurity donor during an anneal or other exposure to heat. This net migration of the impurities to the first refractory metal material limits growth of a metal silicide interface between the first refractory metal material and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.
摘要翻译：使用覆盖含硅材料的第一耐火金属材料和覆盖第一难熔金属材料的第二难熔金属材料来降低与含硅材料的接触电阻。每种难熔金属材料是含有难熔金属和杂质的导电材料。第一难熔金属材料是富含金属的材料，其含量低于化学计量水平的杂质。与第一难熔金属材料相比，第二难熔金属材料对杂质的亲和力较低。因此，第二难熔金属材料可以在退火或其它暴露于热的过程中用作杂质供体。这种杂质向第一难熔金属材料的净迁移限制了第一难熔金属材料和下面的含硅材料之间的金属硅化物界面的生长，从而提供与耐热性的欧姆接触。

3. 发明授权

US07037829B2 Compound structure for reduced contact resistance 有权
公开(公告)号：US07037829B2
公开(公告)日：2006-05-02
申请号：US10355667
申请日：2003-01-31
申请人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
发明人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
IPC分类号： H01L21/44
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76849 , H01L21/76855 , H01L21/7687 , H01L21/76889 , H01L23/485 , H01L27/10855 , H01L28/84 , H01L28/90 , H01L29/456 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric level. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. The second refractory metal material can thus serve as an impurity donor during an anneal or other exposure to heat. This net migration of the impurities to the first refractory metal material limits growth of a metal silicide interface between the first refractory metal material and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.

4. 发明授权

US07109115B2 Methods of providing ohmic contact 有权
标题翻译：提供欧姆接触的方法
公开(公告)号：US07109115B2
公开(公告)日：2006-09-19
申请号：US11071922
申请日：2005-03-04
申请人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
发明人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76849 , H01L21/76855 , H01L21/7687 , H01L21/76889 , H01L23/485 , H01L27/10855 , H01L28/84 , H01L28/90 , H01L29/456 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric level. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. The second refractory metal material can thus serve as an impurity donor during an anneal or other exposure to heat. This net migration of the impurities to the first refractory metal material limits growth of a metal silicide interface between the first refractory metal material and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.
摘要翻译：使用覆盖含硅材料的第一耐火金属材料和覆盖第一难熔金属材料的第二难熔金属材料来降低与含硅材料的接触电阻。每种难熔金属材料是含有难熔金属和杂质的导电材料。第一难熔金属材料是富含金属的材料，其含量低于化学计量水平的杂质。与第一难熔金属材料相比，第二难熔金属材料对杂质的亲和力较低。因此，第二难熔金属材料可以在退火或其它暴露于热的过程中用作杂质供体。这种杂质向第一难熔金属材料的净迁移限制了第一难熔金属材料和下面的含硅材料之间的金属硅化物界面的生长，从而提供与耐热性的欧姆接触。

5. 发明授权

US07038318B2 Compound structure for reduced contact resistance 失效
公开(公告)号：US07038318B2
公开(公告)日：2006-05-02
申请号：US10689894
申请日：2003-10-21
申请人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
发明人： Ravi Iyer , Yongjun Jeff Hu , Luan Tran , Brent Gilgen
IPC分类号： H01L29/40
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76849 , H01L21/76855 , H01L21/7687 , H01L21/76889 , H01L23/485 , H01L27/10855 , H01L28/84 , H01L28/90 , H01L29/456 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric level. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. The second refractory metal material can thus serve as an impurity donor during an anneal or other exposure to heat. This net migration of the impurities to the first refractory metal material limits growth of a metal silicide interface between the first refractory metal material and the underlying silicon-containing material, thereby providing ohmic contact with attendant thermal tolerance.

6. 发明授权

US09299767B1 Source-channel interaction in 3D circuit 有权
标题翻译： 3D电路中的源通道交互
公开(公告)号：US09299767B1
公开(公告)日：2016-03-29
申请号：US14498640
申请日：2014-09-26
申请人： John Mark Meldrim , Yushi Hu , Yongjun Jeff Hu , Everett Allen McTeer
发明人： John Mark Meldrim , Yushi Hu , Yongjun Jeff Hu , Everett Allen McTeer
IPC分类号： H01L29/04 , H01L27/115 , H01L27/105
CPC分类号： H01L27/0688 , H01L29/7827
摘要： A multilayer source provides charge carriers to a multitier channel connector. The source includes a metal silicide layer on a substrate and a metal nitride layer between the metal silicide layer and the channel. The metal silicide and the metal nitride are processed without an intervening oxide layer between them. In one embodiment, the source further includes a silicon layer between the metal nitride layer and the channel. The silicon layer can also be processed without an intervening oxide layer. Thus, the source does not have an intervening oxide layer from the substrate to the channel.
摘要翻译：多层光源将电荷载体提供给多层通道连接器。源包括衬底上的金属硅化物层和金属硅化物层和沟道之间的金属氮化物层。金属硅化物和金属氮化物在它们之间没有中间的氧化物层被加工。在一个实施例中，源还包括在金属氮化物层和沟道之间的硅层。硅层也可以在没有中间氧化物层的情况下被加工。因此，源不具有从衬底到通道的中间氧化物层。

7. 发明授权

US08652912B2 Methods of fabricating a transistor gate including cobalt silicide 有权
标题翻译：制造包括硅化钴的晶体管栅极的方法
公开(公告)号：US08652912B2
公开(公告)日：2014-02-18
申请号：US11636192
申请日：2006-12-08
申请人： Yongjun Jeff Hu
发明人： Yongjun Jeff Hu
IPC分类号： H01L21/336
CPC分类号： H01L29/4975 , H01L21/28273 , H01L27/105 , H01L27/10805 , H01L27/10891 , H01L27/115 , H01L27/11521
摘要： A method for fabricating a transistor gate with a conductive element that includes cobalt silicide includes use of a sacrificial material as a place-holder between sidewall spacers of the transistor gate until after high temperature processes, such as the fabrication of raised source and drain regions, have been completed. In addition, semiconductor devices (e.g., DRAM devices and NAND flash memory devices) with transistor gates that include cobalt silicide in their conductive elements are also disclosed, as are transistors with raised source and drain regions and cobalt silicide in the transistor gates thereof. Intermediate semiconductor device structures that include transistor gates with sacrificial material or a gap between upper portions of sidewall spacers are also disclosed.
摘要翻译：一种制造具有包括硅化钴的导电元件的晶体管栅极的方法包括使用牺牲材料作为晶体管栅极的侧壁间隔物之间的位置保持器，直到高温处理（例如升高的源极和漏极区域的制造）已经完成此外，还公开了具有在其导电元件中包括硅化钴的晶体管栅极的半导体器件（例如，DRAM器件和NAND闪存器件），晶体管的晶体管具有在其晶体管栅极中具有升高的源极和漏极区域以及硅化钴的晶体管。还公开了包括具有牺牲材料的晶体管栅极或侧壁间隔物的上部之间的间隙的中间半导体器件结构。

8. 发明申请

US20130193394A1 INCORPORATION OF OXYGEN INTO MEMORY CELLS 有权
标题翻译：将氧气纳入记忆细胞
公开(公告)号：US20130193394A1
公开(公告)日：2013-08-01
申请号：US13361296
申请日：2012-01-30
申请人： Swapnil Lengade , Dale W. Collins , Durai Vishak Nirmal Ramaswamy , Yongjun Jeff Hu
发明人： Swapnil Lengade , Dale W. Collins , Durai Vishak Nirmal Ramaswamy , Yongjun Jeff Hu
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L45/08 , H01L45/1266 , H01L45/146 , H01L45/165
摘要： Electronic apparatus, systems, and methods include a resistive random access memory cell having an oxygen gradient in a variable resistive region of the resistive random access memory cell and methods of forming the resistive random access memory cell. Oxygen can be incorporated into the resistive random access memory cell by ion implantation. Additional apparatus, systems, and methods are disclosed.
摘要翻译：电子设备，系统和方法包括在电阻随机存取存储器单元的可变电阻区域中具有氧梯度的电阻随机存取存储器单元和形成电阻随机存取存储单元的方法。氧可以通过离子注入并入到电阻式随机存取存储器单元中。公开了附加装置，系统和方法。

9. 发明申请

US20130012013A1 Methods Of Forming Transistor Gates 有权
标题翻译：形成晶体管门的方法
公开(公告)号：US20130012013A1
公开(公告)日：2013-01-10
申请号：US13605848
申请日：2012-09-06
申请人： Yongjun Jeff Hu
发明人： Yongjun Jeff Hu
IPC分类号： H01L21/283
CPC分类号： H01L29/66833 , H01L21/28273 , H01L21/28282 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/1157 , H01L29/4234 , H01L29/66825 , H01L29/792
摘要： Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a gate material, an insulative material, and a sacrificial material. The sacrificial material is removed from the FET and charge storage transistor gate stacks. The insulative material of the FET gate stacks is etched through. A conductive material is formed over the FET gate stacks and over the charge storage transistor gate stacks. The conductive material physically contacts the gate material of the FET gate stacks, and is separated from the gate material of the charge storage transistor gate stacks by the insulative material remaining in the charge storage transistor gate stacks. Some embodiments include gate structures.
摘要翻译：一些实施例包括形成电荷存储晶体管栅极和标准FET栅极的方法，其中公共处理用于制造不同类型栅极的至少一些部分。可以形成FET和电荷存储晶体管栅极堆叠。栅极堆叠可以各自包括栅极材料，绝缘材料和牺牲材料。牺牲材料从FET中去除并对存储晶体管栅极堆叠进行充电。 FET栅极堆叠的绝缘材料被蚀刻通过。导电材料形成在FET栅叠层上方和电荷存储晶体管栅堆上。导电材料物理地接触FET栅极堆叠的栅极材料，并且通过残留在电荷存储晶体管栅极堆叠中的绝缘材料与电荷存储晶体管栅极堆叠的栅极材料分离。一些实施例包括门结构。

10. 发明申请

US20120329231A1 Semiconductor Processing Methods, And Methods Of Forming Isolation Structures 有权
标题翻译：半导体加工方法和形成隔离结构的方法
公开(公告)号：US20120329231A1
公开(公告)日：2012-12-27
申请号：US13603100
申请日：2012-09-04
申请人： Vladimir Mikhalev , Jim Fulford , Yongjun Jeff Hu , Gordon A. Haller , Lequn Liu
发明人： Vladimir Mikhalev , Jim Fulford , Yongjun Jeff Hu , Gordon A. Haller , Lequn Liu
IPC分类号： H01L21/762 , H01L21/336
CPC分类号： H01L21/823462 , H01L21/02107 , H01L21/02164 , H01L21/02282 , H01L21/265 , H01L21/76224 , H01L21/76832 , H01L21/76834 , H01L21/823425 , H01L21/823481 , H01L29/66575 , H01L29/78 , H01L29/7846
摘要： Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.
摘要翻译：一些实施方案包括形成隔离结构的方法。可以提供半导体基底以在一对开口之间具有晶体半导体材料突起。 SOD材料（例如，聚硅氮烷）可以在所述开口内流动以填充开口。在用SOD材料填充开口之后，可以将一种或多种掺杂剂物质注入到投影中，使晶体半导体材料在所述突起的上部非晶化。然后可以在至少约400℃的温度下对SOD材料进行退火以形成隔离结构。一些实施例包括半导体结构，其包括在一对开口之间具有突起的半导体材料基底。突起可以在下部区域上方具有上部区域，其中上部区域为至少75％的无定形，并且下部区域是完全结晶的。

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