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91. 发明授权

US08773803B2 Reduced plasmon shield-generator gap structure and process 有权
标题翻译：减少等离子体屏蔽发生器间隙结构和工艺
公开(公告)号：US08773803B2
公开(公告)日：2014-07-08
申请号：US13654490
申请日：2012-10-18
申请人： Headway Technologies, Inc.
发明人： Xuhui Jin , Hiroyuki Ito , Shigeki Tanemura , Dayu Zhou
IPC分类号： G11B5/02
CPC分类号： G11B5/314 , G11B5/3163 , G11B2005/0021
摘要： Three structures, and processes for manufacturing them, that improve the performance of a TAMR feature in a magnetic write head are disclosed. This improvement is achieved by making the separation between the edge plasmon generator and the plasmon shield less than the separation between the edge plasmon generator and the optical wave-guide.
摘要翻译：公开了三种结构及其制造方法，其改进磁写头中的TAMR特征的性能。这种改进通过使边缘等离子体发生器和等离子体屏蔽之间的分离小于边缘等离子体发生器和光波导之间的间隔来实现。

92. 发明授权

US08755150B2 Magnetic recording assisted by spin torque oscillator with a radio frequency current bias 有权
标题翻译：由具有射频电流偏置的自旋转矩振荡器辅助磁记录
公开(公告)号：US08755150B2
公开(公告)日：2014-06-17
申请号：US14077164
申请日：2013-11-11
申请人： Headway Technologies, Inc.
发明人： Wenyu Chen , Joe Smyth
IPC分类号： G11B5/127
CPC分类号： G11B5/399 , G11B5/1278 , G11B5/314 , G11B5/3146 , G11B2005/0024
摘要： A design is disclosed for a microwave assisted magnetic recording device wherein direct current and rf current are simultaneously injected from a bias tee into a spin transfer oscillator (STO) between a main pole and write shield to improve the assist process. The STO oscillation layer (OL) has a large angle magnetization oscillation frequency that is locked to a magnetic medium bit resonance frequency f0 when the rf current has a frequency f=f0 and a threshold current density is applied. Alternatively, the OL magnetization oscillation frequency may be adjusted closer to f0 to improve the assist process. A third advantage is lowering the threshold current density when both direct current and rf current are injected into the STO during a write process. The main pole is grounded when direct current and rf current are injected into a write shield.
摘要翻译：公开了一种用于微波辅助磁记录装置的设计，其中直流电流和射频电流同时从偏置三通管注入主极和写屏蔽之间的自旋转移振荡器（STO），以改善辅助过程。 STO振荡层（OL）具有大的角度磁化振荡频率，当rf电流具有频率f = f0并施加阈值电流密度时，其被锁定到磁介质位谐振频率f0。或者，可以将OL磁化振荡频率调整为更接近于f0，以改善辅助处理。第三个优点是在写入过程中将直流和直流电流都注入到STO中时降低阈值电流密度。当直流电流和rf电流注入写入屏蔽时，主极接地。

93. 发明授权

US08755149B2 Shield designs with internal magnetization control for ATE improvement 有权
标题翻译：屏蔽设计具有内部磁化控制，可提高ATE
公开(公告)号：US08755149B2
公开(公告)日：2014-06-17
申请号：US13620764
申请日：2012-09-15
申请人： Suping Song , Lijie Guan , Tai Min , Yuhui Tang
发明人： Suping Song , Lijie Guan , Tai Min , Yuhui Tang
IPC分类号： G11B5/127
CPC分类号： G11B5/315 , G11B5/1278 , G11B5/3116 , G11B5/3163
摘要： A magnetic recording head is fabricated with a pole tip shielded laterally on its sides by a pair of symmetrically disposed side shields formed of porous heterogeneous material that contains non-magnetic inclusions. The non-magnetic inclusions, when properly incorporated within the magnetic matrix of the shields, promote the formation of flux loops within the shields that have portions that are parallel to the ABS and do not display locally disorganized and dynamic regions of flux during the creation of magnetic transitions within the recording medium by the magnetic pole. These flux loop portions, combine with the magnetic flux emerging from the main pole to create a net writing field that significantly reduces adjacent track erasures (ATE) and wide area erasures (WATE).
摘要翻译：制造磁记录头，其极侧通过由包含非磁性夹杂物的多孔异质材料形成的一对对称设置的侧屏蔽侧向屏蔽。当非磁性夹杂物适当地并入屏蔽体的磁矩阵中时，促进在屏蔽体内形成具有与ABS平行的部分的磁通环，并且在创建过程中不显示局部无组织和动态的磁通区域通过磁极在记录介质内的磁转变。这些磁通回路部分与从主极产生的磁通相结合，形成一个净写入场，显着地减少了相邻轨道擦除（ATE）和广域擦除（WATE）。

94. 发明授权

US08747629B2 TMR device with novel free layer 有权
标题翻译： TMR器件具有新颖的自由层
公开(公告)号：US08747629B2
公开(公告)日：2014-06-10
申请号：US12284454
申请日：2008-09-22
申请人： Hui-Chuan Wang , Tong Zhao , Min Li , Kunliang Zhang
发明人： Hui-Chuan Wang , Tong Zhao , Min Li , Kunliang Zhang
IPC分类号： C23C14/00 , C23C14/32 , G11B5/33 , G11B5/127
CPC分类号： G11B5/3909 , B82Y10/00 , B82Y25/00 , G01R33/098 , G11B5/33 , G11B5/3929 , G11B2005/3996 , Y10T428/1114
摘要： A TMR sensor with a free layer having a FL1/FL2/FL3 configuration is disclosed in which FL1 is FeCo or a FeCo alloy with a thickness between 2 and 15 Angstroms. The FL2 layer is made of CoFeB or a CoFeB alloy having a thickness from 2 to 10 Angstroms. The FL3 layer is from 10 to 100 Angstroms thick and has a negative λ to offset the positive λ from FL1 and FL2 layers and is comprised of CoB or a CoBQ alloy where Q is one of Ni, Mn, Tb, W, Hf, Zr, Nb, and Si. Alternatively, the FL3 layer may be a composite such as CoB/CoFe, (CoB/CoFe)n where n is ≧2 or (CoB/CoFe)m/CoB where m is ≧1. The free layer described herein affords a high TMR ratio above 60% while achieving low values for λ (
摘要翻译：公开了具有FL1 / FL2 / FL3结构的自由层的TMR传感器，其中FL1是FeCo或厚度在2和15埃之间的FeCo合金。 FL2层由厚度为2〜10埃的CoFeB或CoFeB合金制成。 FL3层的厚度为10〜100埃，并且具有负λ以从FL1和FL2层偏移正的λ，由CoB或CoBQ合金组成，其中Q是Ni，Mn，Tb，W，Hf，Zr ，Nb和Si。或者，FL3层可以是其中n为≥2的CoB / CoFe（CoB / CoFe）n或（CoB / CoFe）m / CoB（其中m为≥1）的复合物。此处描述的自由层提供高于60％的高TMR比，同时实现λ（<5×10-6），RA（1.5欧姆/μm2）和Hc（<6Oe）的低值。

95. 发明授权

US08726491B2 Method of forming a spin-transfer torque random access memory (STT-RAM) device 有权
标题翻译：形成自旋转移转矩随机存取存储器（STT-RAM）装置的方法
公开(公告)号：US08726491B2
公开(公告)日：2014-05-20
申请号：US13373128
申请日：2011-11-04
申请人： Cheng T. Horng , Ru-Ying Tong
发明人： Cheng T. Horng , Ru-Ying Tong
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G01R33/098 , G01R33/1284 , G11C11/161 , H01L43/08 , H01L43/10 , Y10T29/49032 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052 , Y10T428/1107 , Y10T428/1114 , Y10T428/1121 , Y10T428/1129 , Y10T428/1136 , Y10T428/1143
摘要： A dual spin filter that minimizes spin-transfer magnetization switching current (Jc) while achieving a high dR/R in STT-RAM devices is disclosed. The bottom spin valve has a MgO tunnel barrier layer formed with a natural oxidation process to achieve low RA, a CoFe/Ru/CoFeB—CoFe pinned layer, and a CoFeB/FeSiO/CoFeB composite free layer with a middle nanocurrent channel (NCC) layer to minimize Jc0. The NCC layer may have be a composite wherein conductive M(Si) grains are magnetically coupled with adjacent ferromagnetic layers and are formed in an oxide, nitride, or oxynitride insulator matrix. The upper spin valve has a Cu spacer to lower the free layer damping constant. A high annealing temperature of 360° C. is used to increase the MR ratio above 100%. A Jc0 of less than 1×106 A/cm2 is expected based on quasistatic measurements of a MTJ with a similar MgO tunnel barrier and composite free layer.
摘要翻译：公开了在STT-RAM器件中实现高dR / R的同时使自旋迁移磁化开关电流（Jc）最小化的双自旋滤波器。底部自旋阀具有通过自然氧化工艺形成的MgO隧道阻挡层，以实现低RA，CoFe / Ru / CoFeB-CoFe钉扎层和具有中等纳米通道（NCC）的CoFeB / FeSiO / CoFeB复合材料自由层，层以最小化Jc0。 NCC层可以是其中导电M（Si）晶粒与相邻铁磁层磁耦合并且形成在氧化物，氮化物或氧氮化物绝缘体基体中的复合材料。上自旋阀具有Cu间隔物以降低自由层阻尼常数。使用360℃的高退火温度将MR比提高到100％以上。基于具有类似的MgO隧道势垒和复合自由层的MTJ的准静态测量，预期小于1×106A / cm 2的Jc0。

96. 发明申请

US20140119105A1 Adaptive Reference Scheme for Magnetic Memory Applications 有权
标题翻译：磁存储器应用的自适应参考方案
公开(公告)号：US20140119105A1
公开(公告)日：2014-05-01
申请号：US13660176
申请日：2012-10-25
申请人： HEADWAY TECHNOLOGIES, INC.
发明人： Guenole Jan , PoKang Wang
IPC分类号： G11C11/02
CPC分类号： G11C11/16 , G11C11/1673 , G11C2207/002
摘要： A structure and method is described for an adaptive reference used in reading magnetic tunneling memory cells. A collection of magnetic tunneling memory cells are used to form a reference circuit and are coupled in parallel between circuit ground and a reference input to a sense amplifier. Each of the magnetic memory cells used to form the reference circuit are programmed to a magnetic parallel state or a magnetic anti-parallel state, wherein each different state produces a different resistance. By varying the number of parallel states in comparison to the anti-parallel states, where each of the two sates produce a different resistance, the value of the reference circuit resistance can be adjusted to adapt to the resistance characteristics of a magnetic memory data cell to produce a more reliable read of the data programmed into the magnetic memory data cell.
摘要翻译：描述了用于读磁磁隧道存储单元的自适应参考的结构和方法。使用磁隧道存储单元的集合来形成参考电路，并且在电路接地和参考输入之间并联耦合到读出放大器。用于形成参考电路的每个磁存储单元被编程为磁性平行状态或磁反向平行状态，其中每个不同的状态产生不同的电阻。通过与反并联状态相比，通过改变并联状态的数量，其中两个状态中的每一个产生不同的电阻，可以调整参考电路电阻的值以适应磁存储器数据单元的电阻特性对写入磁存储器数据单元的数据进行更可靠的读取。

97. 发明授权

US08710641B2 Combination for composite layered chip package 有权
标题翻译：组合复合分层芯片封装
公开(公告)号：US08710641B2
公开(公告)日：2014-04-29
申请号：US13422723
申请日：2012-03-16
申请人： Yoshitaka Sasaki , Hiroyuki Ito , Atsushi Iijima
发明人： Yoshitaka Sasaki , Hiroyuki Ito , Atsushi Iijima
IPC分类号： H01L23/02 , H01L29/40
CPC分类号： H01L24/94 , G11C29/006 , G11C29/82 , H01L22/22 , H01L24/24 , H01L24/25 , H01L24/32 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/24147 , H01L2224/25175 , H01L2224/32145 , H01L2224/821 , H01L2224/83005 , H01L2224/9202 , H01L2224/94 , H01L2225/06524 , H01L2225/06551 , H01L2225/06565 , H01L2225/1035 , H01L2225/1058 , H01L2924/07802 , H01L2224/03 , H01L2224/83 , H01L2924/00014 , H01L2924/00
摘要： A main package includes a plurality of stacked semiconductor chips and a plurality of first terminals associated with different ones of the semiconductor chips. An additional package includes an additional semiconductor chip and at least one second terminal electrically connected to the additional semiconductor chip. The additional semiconductor chip is to substitute for one of the plurality of semiconductor chips in the main package. The main package and the additional package are arranged in one of a plurality of relative positional relationships that is selected according to which one of the plurality of semiconductor chips in the main package is to be substituted with the additional semiconductor chip.
摘要翻译：主封装包括多个堆叠的半导体芯片和与不同的半导体芯片相关联的多个第一端子。附加封装包括附加的半导体芯片和电连接到附加半导体芯片的至少一个第二端子。附加的半导体芯片用于代替主封装中的多个半导体芯片中的一个。主包装和附加包装被布置成根据主包装中的多个半导体芯片中的哪一个被附加的半导体芯片代替的多个相对位置关系中的一个。

98. 发明授权

US08691102B1 Method of manufacturing plasmon generator 有权
标题翻译：等离子体发生器的制造方法
公开(公告)号：US08691102B1
公开(公告)日：2014-04-08
申请号：US13731754
申请日：2012-12-31
申请人： Hironori Araki , Yoshitaka Sasaki , Hiroyuki Ito , Yukinori Ikegawa , Seiichiro Tomita , Shigeki Tanemura
发明人： Hironori Araki , Yoshitaka Sasaki , Hiroyuki Ito , Yukinori Ikegawa , Seiichiro Tomita , Shigeki Tanemura
IPC分类号： C03C15/00
CPC分类号： G11B5/314 , G11B5/3163 , G11B5/6088 , G11B2005/0021
摘要： A method of manufacturing a plasmon generator includes the steps of: forming an etching mask on a dielectric layer; forming an accommodation part by etching the dielectric layer using the etching mask; and forming the plasmon generator to be accommodated in the accommodation part. The step of forming the etching mask includes the steps of: forming a patterned layer on an etching mask material layer, the patterned layer having a first opening that has a sidewall; forming a structure by forming an adhesion film on the sidewall, the structure having a second opening smaller than the first opening; and etching a portion of the etching mask material layer exposed from the second opening.
摘要翻译：一种制造等离子体发生器的方法包括以下步骤：在电介质层上形成蚀刻掩模; 通过使用蚀刻掩模蚀刻电介质层来形成容纳部分; 以及形成要容纳在容纳部分中的等离子体发生器。形成蚀刻掩模的步骤包括以下步骤：在蚀刻掩模材料层上形成图案化层，所述图案化层具有具有侧壁的第一开口; 通过在侧壁上形成粘合膜来形成结构，该结构具有比第一开口小的第二开口; 并蚀刻从第二开口露出的蚀刻掩模材料层的一部分。

99. 发明申请

US20140077318A1 Storage Element for STT MRAM Applications 有权
标题翻译： STT MRAM应用的存储元件
公开(公告)号：US20140077318A1
公开(公告)日：2014-03-20
申请号：US13617432
申请日：2012-09-14
申请人： Witold Kula , Guenole Jan , Ru-Ying Tong , Yu-Jen Wang
发明人： Witold Kula , Guenole Jan , Ru-Ying Tong , Yu-Jen Wang
IPC分类号： H01L29/82 , H01L21/02
CPC分类号： H01L43/12 , G11C11/161 , H01L43/08
摘要： An improved PMA STT MTJ storage element, and a method for forming it, are described. By inserting a suitable oxide layer between the storage and cap layers, improved PMA properties are obtained, increasing the potential for a larger Eb/kT thermal factor as well as a larger MR. Another important advantage is better compatibility with high processing temperatures, potentially facilitating integration with CMOS.
摘要翻译：描述了改进的PMA STT MTJ存储元件及其形成方法。通过在存储层和盖层之间插入合适的氧化物层，获得改进的PMA性质，增加更大的Eb / kT热因子的可能性以及较大的MR。另一个重要的优点是更好的与高处理温度的兼容性，有可能促进与CMOS的集成。

100. 发明申请

US20140061827A1 Metal Protection Layer over SiN Encapsulation for Spin-Torque MRAM Device Applications 审中-公开
标题翻译：用于自旋扭矩MRAM器件应用的SiN封装上的金属保护层
公开(公告)号：US20140061827A1
公开(公告)日：2014-03-06
申请号：US13597465
申请日：2012-08-29
申请人： Kenlin Huang , Yuan-Tung Chin , Tom Zhong , Chyu-Jiuh Torng
发明人： Kenlin Huang , Yuan-Tung Chin , Tom Zhong , Chyu-Jiuh Torng
IPC分类号： H01L29/82 , H01L21/8239
CPC分类号： G01R33/098 , B82Y40/00 , G11C11/161 , H01F10/3254 , H01F41/308 , H01F41/325 , H01L43/02 , H01L43/08 , H01L43/12
摘要： A magnetic thin film deposition is patterned and protected from oxidation during subsequent processes, such as bit line formation, by an oxidation-prevention encapsulation layer of SiN. The SiN layer is then itself protected during the processing by a metal overlayer, preferably of Ta, Al, TiN, TaN or W. A sequence of low pressure plasma etches, using Oxygen, Cl2, BCl3 and C2H4 chemistries provide selectivity of the metal overlayer to various oxide layers and to the photo-resist hard masks used in patterning and metal layer and thereby allow the formation of bit lines while maintaining the integrity of the SiN layer.
摘要翻译：通过SiN的防氧化封装层，在随后的工艺（例如位线形成）中图案化和保护磁性薄膜沉积物免于氧化。然后，SiN层在金属覆盖层，优选Ta，Al，TiN，TaN或W的加工过程中自身受到保护。使用氧气，Cl2，BCl3和C2H4化学物质的低压等离子体蚀刻序列提供金属覆层的选择性到各种氧化物层和用于图案化和金属层中的光刻胶硬掩模，从而允许形成位线，同时保持SiN层的完整性。

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