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91. 发明授权

US06563193B1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06563193B1
公开(公告)日：2003-05-13
申请号：US09670548
申请日：2000-09-27
申请人： Yusuke Kawaguchi , Kazutoshi Nakamura , Tomoko Matsudai , Hirofumi Nagano , Akio Nakagawa
发明人： Yusuke Kawaguchi , Kazutoshi Nakamura , Tomoko Matsudai , Hirofumi Nagano , Akio Nakagawa
IPC分类号： H01L27082
CPC分类号： H01L29/7317 , H01L21/76286 , H01L21/763 , H01L29/735
摘要： A semiconductor device comprises a substrate the surface of which is formed of an insulation region, a high resistance active layer of a first conductivity type formed on the substrate, a first semiconductor region of the first conductivity type having an impurity concentration higher than that of the active layer and selectively formed on a surface of the active layer, an emitter region of the second conductivity type selectively formed on a surface of the semiconductor region, a collector region of the second conductivity type selectively formed on a surface of the active layer, and a base contact region of the first conductivity type selectively formed on a surface of the active layer in separation from the emitter region and the collector region, respectively. When an inversion layer is formed at an interface between the insulation region and the active layer due to the voltage of the substrate, the semiconductor region suppresses an emitter current flowing via the inversion layer thereby allowing the emitter current to flow on the surface side of the active layer.
摘要翻译：半导体器件包括其表面由绝缘区域形成的衬底，形成在衬底上的第一导电类型的高电阻有源层，第一导电类型的第一半导体区域的杂质浓度高于有源层，并且选择性地形成在有源层的表面上，选择性地形成在半导体区域的表面上的第二导电类型的发射极区域，选择性地形成在有源层的表面上的第二导电类型的集电极区域，以及分别在与发射极区域和集电极区域分离的有源层的表面上分别形成有第一导电类型的基极接触区域。当由于衬底的电压而在绝缘区域和有源层之间的界面处形成反型层时，半导体区域抑制通过反转层流动的发射极电流，从而允许发射极电流在活动层

92. 发明授权

US06469346B1 High-breakdown-voltage semiconductor device 有权
标题翻译：高击穿电压半导体器件
公开(公告)号：US06469346B1
公开(公告)日：2002-10-22
申请号：US09886204
申请日：2001-06-22
申请人： Yusuke Kawaguchi , Akio Nakagawa , Kozo Kinoshita
发明人： Yusuke Kawaguchi , Akio Nakagawa , Kozo Kinoshita
IPC分类号： H01L31119
CPC分类号： H01L29/0847 , H01L27/088 , H01L27/0922 , H01L29/0878 , H01L29/42368 , H01L29/7816 , H01L29/7835
摘要： A high-breakdown-voltage semiconductor device has a first offset layer and a second offset layer the dosage of which is higher than that of the first offset layer. When the gate is in the ON state, the first offset layer functions as a resurf layer. When the gate is in the OFF state, part of the charge in the first offset layer is neutralized by a drain current flowing through an element having a low ON-resistance, however, the second offset layer functions as a resurf layer. When the drain current is [Acm−1], the amount of charge of electrons is q[C], and the drift speed of carriers is &ugr;drift[cms−1], the dosage n2 of the second offset layer is given by n2≧ID/(q &ugr;drift) [cms−2].
摘要翻译：高耐压半导体器件具有第一偏移层和第二偏移层，其剂量高于第一偏移层的掺杂层。当门处于ON状态时，第一个偏移层用作resurf层。当栅极处于截止状态时，第一偏移层中的电荷的一部分被流过具有低导通电阻的元件的漏极电流中和，然而，第二偏移层用作复现层。当漏极电流为[Acm-1]时，电子的电荷量为q [C]，载流子的漂移速度为漂移[cms-1]，第二偏移层的剂量n2由 n2> = ID /（q＆ugr; drift）[cms-2]。

93. 发明授权

US06297534B1 Power semiconductor device 有权
标题翻译：功率半导体器件
公开(公告)号：US06297534B1
公开(公告)日：2001-10-02
申请号：US09413811
申请日：1999-10-07
申请人： Yusuke Kawaguchi , Kazutoshi Nakamura , Akio Nakagawa
发明人： Yusuke Kawaguchi , Kazutoshi Nakamura , Akio Nakagawa
IPC分类号： H01L2976
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/1095 , H01L29/7824
摘要： A first conductivity type active layer having high resistance is provided on an insulation region. A second conductivity type base layer is selectively formed on a surface of the first conductivity type active layer. A first conductivity type source layer is selectively formed on a surface of the second conductivity type base layer. A first conductivity type drain layer is selectively formed on a surface of the first conductivity type active layer. A gate electrode is formed facing, through a gate insulating film, a surface region of the second conductivity type base layer between the first conductivity type source layer and the first conductivity type active layer. A plurality of first and second conductivity type semiconductor regions are formed between the second conductivity type base layer and the first conductivity type drain layer. Each of the second conductivity type semiconductor regions is arranged alternately with each of the first conductivity type semiconductor regions. A drain current flows from the first conductivity type source layer to the first conductivity type drain layer through the first conductivity type semiconductor regions. Bottom portions of the second conductivity type semiconductor regions are shallower than the interface between the first conductivity type active layer and the insulation region. According to the present invention, low ON resistance and high withstand voltage are realized at the same time.
摘要翻译：在绝缘区域上设置具有高电阻的第一导电型有源层。在第一导电型有源层的表面上选择性地形成第二导电型基极层。第一导电型源极层选择性地形成在第二导电型基极层的表面上。第一导电型漏极层选择性地形成在第一导电型有源层的表面上。栅极电极通过栅极绝缘膜形成在第一导电型源极层和第一导电型有源层之间的第二导电型基极层的表面区域。在第二导电型基极层和第一导电型漏极层之间形成多个第一和第二导电型半导体区域。每个第二导电类型半导体区域与第一导电类型半导体区域中的每一个交替布置。漏极电流通过第一导电型半导体区域从第一导电型源极层流到第一导电型漏极层。第二导电类型半导体区域的底部比第一导电型有源层和绝缘区域之间的界面浅。根据本发明，同时实现低导通电阻和高耐受电压。

94. 发明授权

US6118149A Trench gate MOSFET 失效
标题翻译：沟槽栅极MOSFET
公开(公告)号：US6118149A
公开(公告)日：2000-09-12
申请号：US39389
申请日：1998-03-16
申请人： Akio Nakagawa , Yusuke Kawaguchi
发明人： Akio Nakagawa , Yusuke Kawaguchi
IPC分类号： H01L29/06 , H01L29/08 , H01L29/10 , H01L29/417 , H01L29/423 , H01L29/739 , H01L29/78 , H01L29/786 , H01L29/94
CPC分类号： H01L29/7813 , H01L29/42356 , H01L29/4236 , H01L29/7395 , H01L29/7397 , H01L29/78 , H01L29/7802 , H01L29/7809 , H01L29/7825 , H01L29/7828 , H01L29/7834 , H01L29/7835 , H01L29/78645 , H01L29/78696 , H01L29/0615 , H01L29/0847 , H01L29/0878 , H01L29/1083 , H01L29/4175
摘要： The present invention discloses a semiconductor device which can be used as a switching element for portable appliances and realize a low breakdown voltage and a low ON resistance. More specifically, the semiconductor device is constructed in such a manner that a semiconductor layer is vertically or laterally sandwiched between gate electrodes through insulation films. In this polycrystalline semiconductor layer, a source region and a drain region are formed in both end portions thereof which contain an impurity at a concentration higher than the concentration in the middle portion thereof, and, in the middle portion, a channel region is formed, whereby carriers can be made to flow throughout the whole channel region.
摘要翻译：本发明公开了一种可用作便携式电器的开关元件并实现低击穿电压和低导通电阻的半导体器件。更具体地，半导体器件被构造成使得半导体层通过绝缘膜垂直或横向夹在栅电极之间。在该多晶半导体层中，在其两端部形成有源区域和漏极区域，其两端部含有浓度高于其中间部分的浓度的杂质，在中间部分形成沟道区域，由此可以使载流子流过整个通道区域。

95. 发明授权

US6064086A Semiconductor device having lateral IGBT 失效
标题翻译：具有横向IGBT的半导体器件
公开(公告)号：US6064086A
公开(公告)日：2000-05-16
申请号：US72460
申请日：1998-05-05
申请人： Akio Nakagawa , Tomoko Matsudai , Hideyuki Funaki , Norio Yasuhara
发明人： Akio Nakagawa , Tomoko Matsudai , Hideyuki Funaki , Norio Yasuhara
IPC分类号： H01L21/331 , H01L29/06 , H01L29/739 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/66325 , H01L29/0696 , H01L29/7394 , H01L29/7398
摘要： An n-type buffer layer and a p-type base layer are formed in the surface of the n.sup.- -type drift layer. A p.sup.+ -type drain layer is formed in the surface of the n-type buffer layer. An n.sup.+ -type source layer and a p.sup.+ -type contact layer are formed in the surface of the p-type base layer. A main gate electrode is arranged to face, through a gate oxide film, a surface of the p-type base layer which is interposed between the n.sup.+ -type source layer and the n.sup.- -type drift layer. An n-type relay layer is formed in the surface of the n.sup.- -type drift layer to face the n.sup.+ -type source layer through the p-type base layer under the main gate electrode. The n-type relay layer extends from the n.sup.- -type drift layer into the p-type base layer. The n-type relay layer decreases the channel resistance.
摘要翻译：在n型漂移层的表面形成n型缓冲层和p型基底层。在n型缓冲层的表面形成p +型漏极层。在p型基底层的表面形成n +型源极层和p +型接触层。主栅极布置成通过栅极氧化膜面对介于n +型源极层和n型漂移层之间的p型基极层的表面。在n型漂移层的表面形成n型继电器层，通过主栅电极下方的p型基极层面对n +型源极层。 n型继电器层从n型漂移层延伸到p型基极层。 n型继电器层降低了通道电阻。

96. 发明授权

US5997142A Eye test method using red and green marks and red/green tester used in the eye test method 失效
标题翻译：使用红色和绿色标记的眼睛测试方法和用于眼睛测试方法的红色/绿色测试仪
公开(公告)号：US5997142A
公开(公告)日：1999-12-07
申请号：US125694
申请日：1998-08-24
申请人： Akio Nakagawa
发明人： Akio Nakagawa
IPC分类号： A61B3/10 , A61B3/02 , A61B3/032
CPC分类号： A61B3/032
摘要： A red/green test apparatus for determining whether spectacle lenses or contact lenses are under-correcting or over-correcting has a case 1. The case 1 is divided into left and right parts by a partitioning plate 2 and a lamp 3R for red and a lamp 3G for green are disposed to the left and right of this partitioning plate 2; and a red film 5 is provided on the left side of the partitioning plate 2 and also a green film 6 is provided on the right side of the partitioning plate 2, both via an opalescent screen 4 on a front surface of the case 1. Two visual fixation marks 8 and 9 of identical shape and size form black displays at positions on the front surfaces of the films 5 and 6 corresponding to the lamps 3R and 3G, and a switching circuit is provided to cause the lamp 3G to either light or flicker for a fixed time, then cause the lamp 3G and the lamp 3R to light simultaneously. This makes it possible to perform a red/green visual target test in a state in which the unconscious accommodation of the crystalline lens performed by the test subject is suppressed as far as possible.
摘要翻译： PCT No.PCT / JP97 / 04754 Sec。 371日期：1998年8月24日 102（e）日期1998年8月24日PCT 1997年12月22日PCT公布。第WO98 / 27862号公报日期1998年7月12日用于确定眼镜镜片或隐形眼镜是否欠校正或过度校正的红色/绿色测试装置具有情况1.壳体1通过分隔板2和灯分为左侧和右侧部分红色的3R和分隔板2的左右两侧设置绿色的灯3G; 并且在分隔板2的左侧设置有红色薄膜5，并且还通过在壳体1的前表面上的乳白色屏幕4将绿色膜6设置在分隔板2的右侧。两个具有相同形状和尺寸的视觉固定标记8和9在对应于灯3R和3G的膜5和6的前表面上的位置处形成黑色显示器，并且提供开关电路以使灯3G发亮或闪烁固定时间，然后使灯3G和灯3R同时点亮。这使得可以在尽可能地抑制由被测者执行的晶状体的无意识调节的状态下执行红/绿视觉目标测试。

97. 发明授权

US5932897A High-breakdown-voltage semiconductor device 有权
标题翻译：高击穿电压半导体器件
公开(公告)号：US5932897A
公开(公告)日：1999-08-03
申请号：US172269
申请日：1998-10-14
申请人： Yusuke Kawaguchi , Akio Nakagawa , Kozo Kinoshita
发明人： Yusuke Kawaguchi , Akio Nakagawa , Kozo Kinoshita
IPC分类号： H01L27/088 , H01L27/092 , H01L29/08 , H01L29/423 , H01L29/78 , H01L29/76 , H01L27/108
CPC分类号： H01L29/7816 , H01L27/088 , H01L27/0922 , H01L29/0847 , H01L29/0878 , H01L29/7835 , H01L29/42368
摘要： A high-breakdown-voltage semiconductor device has a first offset layer and a second offset layer the dosage of which is higher than that of the first offset layer. When the gate is in the ON state, the first offset layer functions as a resurf layer. When the gate is in the OFF state, part of the charge in the first offset layer is neutralized by a drain current flowing through an element having a low ON-resistance, however, the second offset layer functions as a resurf layer. When the drain current is �Acm.sup.-1 !, the amount of charge of electrons is q�C!, and the drift speed of carriers is .upsilon..sub.drift �cms.sup.-1 !, the dosage n.sub.2 of the second offset layer is given by n.sub.2 .gtoreq.I.sub.D /(q.upsilon..sub.drift)�cms.sup.-2 !.
摘要翻译：高耐压半导体器件具有第一偏移层和第二偏移层，其剂量高于第一偏移层的掺杂层。当门处于ON状态时，第一个偏移层用作resurf层。当栅极处于截止状态时，第一偏移层中的电荷的一部分被流过具有低导通电阻的元件的漏极电流中和，然而，第二偏移层用作复现层。当漏极电流为[Acm-1]时，电子的电荷量为q [C]，载流子的漂移速度为上漂移量[cms-1]，第二偏移层的剂量n2由n2 > / = ID /（q upsilon漂移）[cms-2]。

98. 发明授权

US5640040A High breakdown voltage semiconductor device 失效
标题翻译：高击穿电压半导体器件
公开(公告)号：US5640040A
公开(公告)日：1997-06-17
申请号：US481097
申请日：1995-06-07
申请人： Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai , Yoshihiro Yamaguchi , Ichiro Omura , Hideyuki Funaki
发明人： Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai , Yoshihiro Yamaguchi , Ichiro Omura , Hideyuki Funaki
IPC分类号： H01L21/336 , H01L21/74 , H01L21/762 , H01L27/06 , H01L27/092 , H01L27/12 , H01L29/06 , H01L29/08 , H01L29/40 , H01L29/739 , H01L29/74 , H01L29/745 , H01L29/749 , H01L29/78 , H01L29/786 , H01L29/861 , H01L23/58
CPC分类号： H01L29/404 , H01L21/74 , H01L21/76264 , H01L21/76297 , H01L27/0623 , H01L27/0922 , H01L27/1203 , H01L29/0834 , H01L29/402 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/66772 , H01L29/7394 , H01L29/7436 , H01L29/7455 , H01L29/749 , H01L29/7824 , H01L29/7835 , H01L29/78624 , H01L29/8611 , H01L21/76275 , H01L21/76286 , H01L29/78603 , H01L2924/0002
摘要： A high breakdown voltage semiconductor device comprising a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an active layer formed on the insulating layer and made of a high resistance semiconductor of a first conductivity type, a first impurity region of the first conductivity type formed in the active layer, and a second impurity region of a second conductivity type formed in the active layer and spaced apart from the first impurity region by a predetermined distance. The first impurity region is formed of diffusion layers. The diffusion layers are superimposed one upon another and differ in diffusion depth or diffusion window width, or both.
摘要翻译：一种高耐压电压半导体器件，包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上并由第一导电类型的高电阻半导体形成的有源层，第一导电类型的第一杂质区形成在有源层中的第二杂质区和形成在有源层中并与第一杂质区隔开预定距离的第二导电类型的第二杂质区。第一杂质区由扩散层形成。扩散层彼此叠加并且扩散深度或扩散窗宽度不同，或两者均不同。

99. 发明授权

US5592014A High breakdown voltage semiconductor device 失效
标题翻译：高击穿电压半导体器件
公开(公告)号：US5592014A
公开(公告)日：1997-01-07
申请号：US484864
申请日：1995-06-07
申请人： Hideyuki Funaki , Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai , Yoshihiro Yamaguchi , Ichiro Omura
发明人： Hideyuki Funaki , Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai , Yoshihiro Yamaguchi , Ichiro Omura
IPC分类号： H01L21/336 , H01L21/762 , H01L27/06 , H01L27/092 , H01L27/12 , H01L29/06 , H01L29/40 , H01L29/739 , H01L29/74 , H01L29/745 , H01L29/749 , H01L29/78 , H01L29/786 , H01L29/861 , H01L23/58
CPC分类号： H01L29/404 , H01L21/76264 , H01L27/0623 , H01L27/0922 , H01L27/1203 , H01L29/402 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/66772 , H01L29/7394 , H01L29/7436 , H01L29/7455 , H01L29/749 , H01L29/7824 , H01L29/7835 , H01L29/78624 , H01L29/8611 , H01L21/76275 , H01L21/76286 , H01L2924/0002
摘要： A high breakdown voltage semiconductor apparatus comprises a substrate having an insulating layer formed thereon, a high resistance semiconductor layer of a first conductivity type formed on said insulating layer, a base region of the first conductivity type formed selectively in a surface region of the high resistance semiconductor layer, a drift region of a second conductivity type formed selectively in the surface region of the high resistance semiconductor layer so as not to reach the insulating layer, a source region of the second conductivity type formed in the base region, a drain region formed in the drift region, a gate electrode formed on a region between the source region and the drift region, with a gate insulating film interposed between the gate electrode and the region between the source region and the drift region, a source electrode provided in contact with the base region and the source region, a drain electrode provided in contact with the drain region. The dosage of impurities in the high resistance semiconductor layer is 2.times.10.sup.12 cm.sup.-2 to 3.times.10.sup.12 cm.sup.-2 and the dosage of impurities in the drift layer is 1.times.10.sup.12 cm.sup.-2 to 2.times.10.sup.12 cm.sup.-2.
摘要翻译：一种高耐压电压半导体装置，包括：在其上形成有绝缘层的基板，形成在所述绝缘层上的第一导电类型的高电阻半导体层，所述第一导电类型的基极区选择性地形成在所述高电阻的表面区域中半导体层，选择性地形成在高电阻半导体层的表面区域中以便不到达绝缘层的第二导电类型的漂移区域，形成在基极区域中的第二导电类型的源极区域，形成的漏极区域在漂移区域中，形成在源极区域和漂移区域之间的区域上的栅电极，栅极绝缘膜插入在栅极电极和源极区域与漂移区域之间的区域中，源极电极与所述基极区域和所述源极区域，设置成与所述漏极区域接触的漏极电极。高电阻半导体层中的杂质用量为2×10 12 cm -2至3×10 12 cm -2，漂移层中的杂质用量为1×10 12 cm -2至2×10 12 cm -2。

100. 发明授权

US5434444A High breakdown voltage semiconductor device 失效
标题翻译：高击穿电压半导体器件
公开(公告)号：US5434444A
公开(公告)日：1995-07-18
申请号：US220283
申请日：1994-03-30
申请人： Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai
发明人： Akio Nakagawa , Norio Yasuhara , Tomoko Matsudai
IPC分类号： H01L21/336 , H01L21/74 , H01L21/762 , H01L27/06 , H01L27/092 , H01L27/12 , H01L29/06 , H01L29/40 , H01L29/739 , H01L29/74 , H01L29/745 , H01L29/749 , H01L29/78 , H01L29/786 , H01L29/861
CPC分类号： H01L29/404 , H01L21/74 , H01L21/76264 , H01L21/76297 , H01L27/0623 , H01L27/0922 , H01L27/1203 , H01L29/402 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/66772 , H01L29/7394 , H01L29/7436 , H01L29/7455 , H01L29/749 , H01L29/7824 , H01L29/7835 , H01L29/78624 , H01L29/8611 , H01L21/76275 , H01L21/76286
摘要： A high breakdown voltage semiconductor device comprising a semiconductor substrate an insulating layer formed on the semiconductor substrate, a high resistance semiconductor layer formed on the insulating layer, an isolation region formed in the high resistance semiconductor layer, an element region formed in the high resistance semiconductor layer isolated by the isolation region in a lateral direction, a first low resistance region of a first conductivity type formed in a central surface portion of the element region, and a second low resistance region of a second conductivity type formed in a peripheral surface portion of the element region. Dose of impurities in the element region is set such that a portion of the element region between the first low resistance region and the second low resistance region is completely depleted when voltage is applied between the first and second low resistance regions.
摘要翻译：一种高耐压半导体器件，包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上的高电阻半导体层，形成在高电阻半导体层中的隔离区，形成在高电阻半导体中的元件区在横向方向上被隔离区域隔离的层，形成在元件区域的中心表面部分中的第一导电类型的第一低电阻区域和形成在元件区域的中心表面部分中的第二导电类型的第二低电阻区域，元素区域。元件区域中的杂质的剂量被设定为使得当在第一和第二低电阻区域之间施加电压时，第一低电阻区域和第二低电阻区域之间的元件区域的一部分被完全耗尽。

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