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91. 发明授权

US07732844B2 Crosstalk improvement through P on N structure for image sensor 有权
标题翻译：通过P on N结构对图像传感器进行串扰改善
公开(公告)号：US07732844B2
公开(公告)日：2010-06-08
申请号：US11682350
申请日：2007-03-06
申请人： Chung-Wei Chang , Han-Chi Liu , Chun-Yao Ko , Shou-Gwo Wuu
发明人： Chung-Wei Chang , Han-Chi Liu , Chun-Yao Ko , Shou-Gwo Wuu
IPC分类号： H01L31/062
CPC分类号： H01L27/1463 , H01L21/761 , H01L27/14603 , H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/14643 , H01L27/14689 , H01L31/035272
摘要： The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; and an image sensor formed in the semiconductor layer.
摘要翻译：本公开提供了一种图像传感器半导体器件。半导体器件包括具有第一类掺杂剂的半导体衬底; 半导体层，其具有不同于所述第一类型掺杂剂的第二类型的掺杂剂并且设置在所述半导体衬底上; 以及形成在半导体层中的图像传感器。

92. 发明授权

US07588993B2 Alignment for backside illumination sensor 有权
标题翻译：背面照明传感器对准
公开(公告)号：US07588993B2
公开(公告)日：2009-09-15
申请号：US11951916
申请日：2007-12-06
申请人： Jen-Cheng Liu , Dun-Nian Yaung , Shou-Gwo Wuu
发明人： Jen-Cheng Liu , Dun-Nian Yaung , Shou-Gwo Wuu
IPC分类号： H01L21/76
CPC分类号： H01L23/544 , H01L21/71 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An apparatus and manufacturing method thereof, wherein an integrated circuit is located in a first region of a substrate having first and second opposing major surfaces, and wherein an alignment mark is located in a second region of the substrate and extends through the substrate between the first and second surfaces. The alignment mark may protrude from the first and/or second surfaces, and/or may comprise a plurality of substantially similar alignment marks. The second region may interpose the first region and a perimeter of the substrate. The second region may comprise a scribe region.
摘要翻译：一种装置及其制造方法，其中集成电路位于具有第一和第二相对主表面的基板的第一区域中，并且其中对准标记位于所述基板的第二区域中，并且延伸穿过所述基板在所述第一和第二表面。对准标记可以从第一和/或第二表面突出，和/或可以包括多个基本相似的对准标记。第二区域可以插入衬底的第一区域和周边。第二区域可以包括划线区域。

93. 发明申请

US20080251821A1 METHOD AND DEVICE TO REDUCE DARK CURRENT IN IMAGE SENSORS 有权
标题翻译：减少图像传感器中的暗电流的方法和装置
公开(公告)号：US20080251821A1
公开(公告)日：2008-10-16
申请号：US11735226
申请日：2007-04-13
申请人： Chun-Yao Ko , Chung-Wei Chang , Han-Chi Liu , Shou-Gwo Wuu
发明人： Chun-Yao Ko , Chung-Wei Chang , Han-Chi Liu , Shou-Gwo Wuu
IPC分类号： H01L31/062 , H01L21/00
CPC分类号： H01L27/14689 , H01L27/14609
摘要： A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel area and a logic area, forming a light sensing element in the pixel area, and forming a first transistor in the pixel area and a second transistor in the logic area. The step of forming the first transistor in the pixel area and the second transistor in the logic area includes performing a first implant process in the pixel area and the logic area, performing a second implant process in the pixel area and the logic area, and performing a third implant process only in the logic area.
摘要翻译：制造图像传感器的方法包括提供具有像素区域和逻辑区域的半导体衬底，在像素区域中形成光感测元件，以及在像素区域中形成第一晶体管和在逻辑区域中形成第二晶体管。在逻辑区域中的像素区域和第二晶体管中形成第一晶体管的步骤包括在像素区域和逻辑区域中执行第一注入处理，在像素区域和逻辑区域中执行第二注入处理，以及执行仅在逻辑区域中进行第三次植入过程。

94. 发明授权

US07432578B1 CMOS image sensor with enhanced photosensitivity 有权
标题翻译：具有增强光敏性的CMOS图像传感器
公开(公告)号：US07432578B1
公开(公告)日：2008-10-07
申请号：US11739650
申请日：2007-04-24
申请人： Shine Chung , Shou-Gwo Wuu
发明人： Shine Chung , Shou-Gwo Wuu
IPC分类号： H01L31/06 , H01L31/0232
CPC分类号： H01L27/14632 , H01L27/14621 , H01L27/14627 , H01L27/14645 , H01L27/14663 , H01L27/14696
摘要： A photosensitive device is disclosed which comprises a semiconductor substrate, at least one reverse biased device, such as a P-N junction diode formed in the semiconductor substrate, and at least one photosensitive layer disposed above the semiconductor substrate and substantially covering the reverse biased device, the photosensitive layer releasing electrons and holes when struck by photons, wherein the photon generated electrons and holes in the photosensitive layer reach the reverse biased device and create a combination current therein when a light shines thereon.
摘要翻译：公开了一种光敏器件，其包括半导体衬底，形成在半导体衬底中的至少一个反向偏压器件，例如PN结二极管，以及设置在半导体衬底之上并基本上覆盖反向偏置器件的至少一个感光层，光敏层在被光子撞击时释放电子和空穴，其中光子产生的电子和感光层中的空穴到达反向偏置器件，并且当光照射在其上时产生组合电流。

95. 发明授权

US07253458B2 CMOS image sensor 有权
标题翻译： CMOS图像传感器
公开(公告)号：US07253458B2
公开(公告)日：2007-08-07
申请号：US10980959
申请日：2004-11-04
申请人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Wen-De Wang , Ho-Ching Chien , Shou-Gwo Wuu
发明人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Wen-De Wang , Ho-Ching Chien , Shou-Gwo Wuu
IPC分类号： H01L27/148
CPC分类号： H01L27/14643 , H01L27/14621 , H01L27/14627 , H01L27/14636
摘要： A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 μm. At least one dielectric layer is disposed on the substrate covering the pixel. A color filter is disposed on the least one dielectric layer. A microlens array is disposed on the color filter of the pixel, and the sum of the thickness of all dielectric layers and the color filter divided by the pixel width is equal to or less than approximately 1.87.
摘要翻译：互补金属氧化物半导体场效应晶体管（CMOS-FET）图像传感器。在基板上形成有源感光像素。像素的至少一侧具有等于或小于约3μm的宽度。在覆盖像素的基板上设置至少一个电介质层。滤色器设置在至少一个电介质层上。微透镜阵列设置在像素的滤色器上，所有电介质层和滤色器的厚度之和除以像素宽度等于或小于约1.87。

96. 发明申请

US20060186547A1 Light shield for CMOS imager 有权
公开(公告)号：US20060186547A1
公开(公告)日：2006-08-24
申请号：US11066432
申请日：2005-02-24
申请人： Wen-De Wang , Dun-Nian Yaung , Shou-Gwo Wuu , Chung-Yi Yu
发明人： Wen-De Wang , Dun-Nian Yaung , Shou-Gwo Wuu , Chung-Yi Yu
IPC分类号： H01L23/52
CPC分类号： H01L27/14654 , H01L27/14623 , H01L27/14636 , H01L2924/0002 , H01L2924/00
摘要： System and method for providing a light shield for a CMOS imager is provided. The light shield comprises a structure formed above a point between a photo-sensitive element and adjacent circuitry. The structure is formed of a light-blocking material, such as a metal, metal alloy, metal compound, or the like, formed in dielectric layers over the photo-sensitive elements.

97. 发明授权

US06982443B2 Hollow dielectric for image sensor 有权
公开(公告)号：US06982443B2
公开(公告)日：2006-01-03
申请号：US10799986
申请日：2004-03-12
申请人： Tzu-Hsuan Hsu , Shou-Gwo Wuu , Ho-Ching Chien , Dun-Nian Yaung
发明人： Tzu-Hsuan Hsu , Shou-Gwo Wuu , Ho-Ching Chien , Dun-Nian Yaung
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H01L27/14632 , H01L27/1462
摘要： A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.

98. 发明申请

US20050056885A1 Dual poly layer and method of manufacture 有权
标题翻译：双层多层及其制造方法
公开(公告)号：US20050056885A1
公开(公告)日：2005-03-17
申请号：US10662609
申请日：2003-09-15
申请人： Chih-Yang Pai , Min-Hsiung Chiang , Chen-Jong Wang , Shou-Gwo Wuu
发明人： Chih-Yang Pai , Min-Hsiung Chiang , Chen-Jong Wang , Shou-Gwo Wuu
IPC分类号： H01L21/8239 , H01L21/8242 , H01L21/8244 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/11 , H01L29/76
CPC分类号： H01L27/105 , H01L27/1052 , H01L27/10829 , H01L27/1087 , H01L27/10894 , H01L27/11 , H01L27/1116 , H01L28/40 , Y10S257/903 , Y10S257/904
摘要： Semiconductor devices having a dual polysilicon electrode and a method of manufacturing are provided. The semiconductor devices include a first polysilicon layer deposited on a second polysilicon layer. Each polysilicon layer may be doped individually. The method also allows for some semiconductor devices on a wafer to have a single polysilicon wafer and other devices to have a dual polysilicon layer. In one embodiment, the semiconductor devices are utilized to form a memory device wherein the storage capacitors and transistors located in the cell region are formed with a dual polysilicon layer and devices in the periphery region are formed with a single polysilicon layer.
摘要翻译：提供了具有双重多晶硅电极的半导体器件和制造方法。半导体器件包括沉积在第二多晶硅层上的第一多晶硅层。每个多晶硅层可以单独掺杂。该方法还允许晶片上的一些半导体器件具有单个多晶硅晶片和其它器件以具有双重多晶硅层。在一个实施例中，半导体器件用于形成存储器件，其中位于单元区域中的存储电容器和晶体管形成双重多晶硅层，并且外围区域中的器件形成有单个多晶硅层。

99. 发明授权

US06642076B1 Asymmetrical reset transistor with double-diffused source for CMOS image sensor 有权
标题翻译： CMOS图像传感器双扩散源非对称复位晶体管
公开(公告)号：US06642076B1
公开(公告)日：2003-11-04
申请号：US10278134
申请日：2002-10-22
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Ho-Ching Chien , Chien-Hsien Tseng
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Ho-Ching Chien , Chien-Hsien Tseng
IPC分类号： H01L2100
CPC分类号： H01L27/14689 , H01L27/0802 , H01L27/14609 , H01L27/1463
摘要： A new method to form CMOS image sensors in the manufacture of an integrated circuit device is achieved. The method comprises providing a semiconductor substrate. Sensor diodes are formed in the semiconductor substrate each comprising a first terminal and a second terminal. Gates are formed for transistors in the CMOS image sensors. The gates comprise a conductor layer overlying the semiconductor substrate with an insulating layer therebetween. The transistors include reset transistors. Ions are implanted into the semiconductor substrate to form source/drain regions for the transistors. The source regions of the reset transistors are formed in the first terminals of the sensor diodes. Ions are implanted into the reset transistor sources to form double diffused sources. The implanting is blocked from other source/drain regions.
摘要翻译：实现了在制造集成电路器件中形成CMOS图像传感器的新方法。该方法包括提供半导体衬底。传感器二极管形成在每个包括第一端子和第二端子的半导体衬底中。为CMOS图像传感器中的晶体管形成栅极。栅极包括覆盖半导体衬底的导体层，其间具有绝缘层。晶体管包括复位晶体管。将离子注入到半导体衬底中以形成用于晶体管的源极/漏极区域。复位晶体管的源极区域形成在传感器二极管的第一端子中。离子被植入到复位晶体管源中以形成双扩散源。植入物从其它源极/漏极区域被阻挡。

100. 发明授权

US06350662B1 Method to reduce defects in shallow trench isolations by post liner anneal 有权
标题翻译：通过后衬板退火来减少浅沟槽隔离缺陷的方法
公开(公告)号：US06350662B1
公开(公告)日：2002-02-26
申请号：US09357244
申请日：1999-07-19
申请人： Kong-Beng Thei , Kuei-Ying Lee , Dun-Nian Yaung , Shou-Gwo Wuu
发明人： Kong-Beng Thei , Kuei-Ying Lee , Dun-Nian Yaung , Shou-Gwo Wuu
IPC分类号： H01L2176
CPC分类号： H01L21/76224
摘要： A method to form shallow trench isolations with reduced substrate defects by using a nitrogen anneal is achieved. A silicon substrate is provided. The silicon substrate is etched where not protected by a photoresist mask to form shallow trenches where shallow trench isolations are planned. A liner oxide layer is grown on the interior surfaces of the shallow trenches. The silicon substrate and the liner oxide layer are annealed to reduce or eliminate defects, dislocations, interface traps, and stress in the silicon substrate. An isolation oxide layer is deposited overlying the liner oxide layer and completely filling the shallow trenches. The isolation oxide layer is etched down to the top surface of the silicon substrate and thereby forms the shallow trench isolations. The integrated circuit device is completed.
摘要翻译：实现了通过使用氮退火形成具有减少的衬底缺陷的浅沟槽隔离的方法。提供硅衬底。蚀刻硅衬底，其中未被光致抗蚀剂掩模保护以形成浅沟槽，其中规划浅沟槽隔离。在浅沟槽的内表面上生长衬里氧化物层。对硅衬底和衬里氧化物层进行退火以减少或消除硅衬底中的缺陷，位错，界面陷阱和应力。隔离氧化物层沉积在衬垫氧化物层上并且完全填充浅沟槽。隔离氧化物层被蚀刻到硅衬底的顶表面，从而形成浅沟槽隔离。集成电路装置完成。

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