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91. 发明申请

US20170302238A1 DC OFFSET CANCELLATION CIRCUIT 有权
公开(公告)号：US20170302238A1
公开(公告)日：2017-10-19
申请号：US15488365
申请日：2017-04-14
申请人： FCI Inc.
发明人： SeongHun Jeong
IPC分类号： H03F3/45 , H03G3/30 , H03F3/189
CPC分类号： H03G3/3052 , H03F3/19 , H03F3/45475 , H03F3/45973 , H03F2200/294 , H03F2203/45521 , H03G3/001 , H03G3/3068 , H03G2201/202 , H03G2201/40
摘要： Disclosed herein is a DC offset cancellation circuit. The DC offset cancellation circuit includes a DC feedback unit configured to vary a DC feedback (DCFB) bandwidth to add at least one mid-bandwidth to the DCFB bandwidth and to provide a delay time in each case in order to reduce the DC droop error that occurs in switching from the high bandwidth (BW) to the mid-BW or from the mid-BW mode to the low BW mode, such that stable settling is ensured.

92. 发明申请

US20170302233A1 Curve Fitting Circuit, Analog Predistorter, and Radio Frequency Signal Transmitter 审中-公开
公开(公告)号：US20170302233A1
公开(公告)日：2017-10-19
申请号：US15581823
申请日：2017-04-28
申请人： Huawei Technologies Co., Ltd.
发明人： Wei Huang
IPC分类号： H03F1/32 , H03F3/189 , G06F17/10 , H03F3/20
CPC分类号： H03F1/3247 , G06F17/10 , G06F17/17 , H03F1/3258 , H03F3/189 , H03F3/19 , H03F3/20 , H03F3/245 , H03F2200/102 , H03F2200/451
摘要： A curve fitting circuit, an analog predistorter, and a radio frequency signal transmitter are disclosed. Each segmentation processing circuit in the curve fitting circuit generates a to-be-processed signal according to a intercepted part of a received signal, and generates q output signals according to the to-be-processed signal. Parts intercepted by different segmentation processing circuits are not exactly the same. Each first adder circuit in the curve fitting circuit receives one signal in the q output signals of each segmentation processing circuit, and obtains one output signal of the curve fitting circuit according to a sum of received n signals.

93. 发明授权

US09778902B2 Software digital front end (SoftDFE) signal processing 有权
公开(公告)号：US09778902B2
公开(公告)日：2017-10-03
申请号：US13701374
申请日：2012-10-26
申请人： Intel Corporation
发明人： Kameran Azadet , Chengzhou Li , Albert Molina , Joseph H. Othmer , Steven C. Pinault , Meng-Lin Yu , Joseph Williams , Ramon Sanchez Perez , Jian-Guo Chen
IPC分类号： G06F5/01 , G06F17/15 , G06F9/30 , H03H17/06 , H04B1/04 , H04L1/00 , H04L27/233 , H04B1/62 , H04L25/02 , H04L25/03 , H03M3/00 , H03F1/02 , H03F1/32 , H03F3/189 , H03F3/24 , H04L25/49 , H04B1/00
CPC分类号： G06F9/3001 , G06F5/01 , G06F9/30036 , G06F17/15 , H03F1/0288 , H03F1/3241 , H03F1/3258 , H03F3/189 , H03F3/24 , H03F2200/336 , H03F2201/3209 , H03F2201/3212 , H03F2201/3224 , H03F2201/3233 , H03H17/06 , H03M3/30 , H04B1/0003 , H04B1/0475 , H04B1/62 , H04B2001/0408 , H04L1/0054 , H04L25/02 , H04L25/03 , H04L25/03178 , H04L25/03216 , H04L25/4917 , H04L27/2334
摘要： Software Digital Front End (SoftDFE) signal processing techniques are provided. One or more digital front end (DFE) functions are performed on a signal in software by executing one or more specialized instructions on a processor to perform the one or more digital front end (DFE) functions on the signal, wherein the processor has an instruction set comprised of one or more of linear and non-linear instructions. A block of samples comprised of a plurality of data samples is optionally formed and the digital front end (DFE) functions are performed on the block of samples. The specialized instructions can include a vector convolution function, a complex exponential function, an xk function, a vector compare instruction, a vector max( ) instruction, a vector multiplication instruction, a vector addition instruction, a vector sqrt( ) instruction, a vector 1/x instruction, and a user-defined non-linear instruction.

94. 发明授权

US09773644B2 Power generator with frequency tuning for use with plasma loads 有权
公开(公告)号：US09773644B2
公开(公告)日：2017-09-26
申请号：US15076461
申请日：2016-03-21
申请人： Advanced Energy Industries, Inc.
发明人： Gideon Van Zyl
IPC分类号： H04B1/04 , H01J37/32 , H03L1/00 , G04F5/14 , H03L7/26 , H03F1/56 , H03F3/189 , H03F3/24 , H05H1/46
CPC分类号： H01J37/32155 , G04F5/14 , H01J37/32082 , H01J37/32183 , H01J37/32917 , H01J37/3299 , H03F1/56 , H03F3/189 , H03F3/24 , H03F2200/451 , H03L1/00 , H03L7/26 , H05H2001/4682
摘要： A generator and method for tuning the generator are disclosed. The method includes setting the frequency of power applied by the generator to a current best frequency and sensing a characteristic of the power applied by the generator. A current best error based upon the characteristic of the power is determined, and the frequency of the power at the current best frequency is maintained for a main-time-period. The frequency of the power is then changed to a probe frequency and maintained at the probe frequency for a probe-time-period, which is less than the main-time-period. The current best frequency is set to the probe frequency if the error at the probe frequency is less than the error at the current best frequency.

95. 发明申请

US20170243723A1 APPARATUS FOR CONTROLLED OVERSHOOT IN A RF GENERATOR 审中-公开
公开(公告)号：US20170243723A1
公开(公告)日：2017-08-24
申请号：US15415597
申请日：2017-01-25
申请人： Advanced Energy Industries, Inc.
发明人： Gideon Van Zyl
IPC分类号： H01J37/32 , H03F3/189 , H02J9/00 , H03F3/20
CPC分类号： H01J37/32146 , H01J37/32183 , H02J9/00 , H02M3/155 , H03F3/189 , H03F3/20 , H03F2200/451
摘要： A radio-frequency (RF) generator is provided that produces a controlled overshoot. One embodiment includes a RF power amplifier and a direct-current (DC) power supply that includes a primary DC power supply, an auxiliary DC power supply, a half-bridge circuit, and a control circuit. The half-bridge circuit, in a first switching state, electrically connects, in series, the auxiliary DC power supply with the primary DC power supply and, in a second switching state, electrically disconnects the auxiliary DC power supply from the primary DC power supply. The control circuit places the half-bridge circuit in the first switching state for a first period of time and places the half-bridge circuit in the second switching state for a second period of time to produce a controlled overshoot in the power produced by the RF generator throughout the first period of time.

96. 发明申请

US20170170791A1 TIMING ALIGNMENT SENSITIVITY FOR ENVELOPE TRACKING 审中-公开
公开(公告)号：US20170170791A1
公开(公告)日：2017-06-15
申请号：US15124741
申请日：2014-08-29
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Gavin WATKINS , Konstantinos MIMIS
IPC分类号： H03F1/02 , H04B1/10 , H04L25/03 , H03F3/189
CPC分类号： H03F1/0222 , H03F3/189 , H03F3/24 , H03F3/68 , H03F2200/102 , H04B1/1027 , H04B2001/0408 , H04B2001/0416 , H04L25/03343
摘要： In one embodiment a transmitter is disclosed. The transmitter comprises an envelope tracking amplifier circuit comprising a power amplifier; a radiofrequency path configured to couple a radiofrequency component of an input signal to an input of the power amplifier; an envelope path configured to modulate a supply voltage of the power amplifier with an envelope signal, the envelope path comprising an envelope shaping module configured to shape an envelope of the input signal using an envelope shaping function to obtain the envelope signal; and a delay block configured to vary the relative timing alignment of the radiofrequency path and the envelope path; storage for an indication of the envelope shaping function to be used by the envelope shaping module; and a processor operable to, iteratively search for a value of a first parameter of a generic envelope shaping function, by applying a test signal to the envelope tracking amplifier circuit and controlling the delay block over a sweep of the relative timing alignments between the radiofrequency path and the envelope path; determining an average measure of distortion of output of the envelope tracking amplifier circuit for the sweep of relative timing alignments; comparing the average measure of distortion of output of the envelope tracking amplifier circuit with an average measure of distortion of the output of the envelope tracking amplifier circuit for a previous iteration; and selecting for the envelope shaping function the value of the first parameter from the previous iteration if the average measure of distortion of the output of the envelope tracking amplifier circuit for the previous iteration is lower than the average measure of distortion of the output of the envelope tracking amplifier circuit determined; and storing an indication of the envelope shaping function with the selected value for the first parameter in the storage.

97. 发明申请

US20170125533A1 SEMICONDUCTOR APPARATUS 审中-公开
公开(公告)号：US20170125533A1
公开(公告)日：2017-05-04
申请号：US15259080
申请日：2016-09-08
申请人： FUJITSU LIMITED
发明人： JUNJI KOTANI , NORIKAZU NAKAMURA
IPC分类号： H01L29/423 , H01L29/205 , H01L29/417 , H01L29/778 , H03F3/24 , H01L23/495 , H02M3/335 , H03F1/32 , H03F3/189 , H01L29/20 , H01L29/40
CPC分类号： H01L29/42316 , H01L23/36 , H01L23/3677 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L29/2003 , H01L29/205 , H01L29/408 , H01L29/41758 , H01L29/7786 , H01L29/7787 , H01L2224/0603 , H01L2224/48257 , H01L2224/48472 , H01L2224/4903 , H02M3/33507 , H02M3/33576 , H03F1/3241 , H03F1/3247 , H03F3/189 , H03F3/19 , H03F3/24 , H03F3/245 , H03F2200/204 , H03F2200/333 , H03F2201/3206
摘要： A semiconductor apparatus includes a semiconductor chip including a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, and a gate electrode, a source electrode, and a drain electrode formed over the second semiconductor layer. The gate electrode is formed in a comb shape having a plurality of tooth parts. An interval between the tooth parts becomes narrower from a center part toward a peripheral part of the semiconductor chip. The source electrode is formed on one of two sides of each of the tooth parts in the gate electrode, and the drain electrode is formed on another of the two sides. The source electrodes and the drain electrodes formed between the tooth parts in the gate electrode have respective areas that are substantially the same in a plan view.

98. 发明申请

US20170117854A1 METHOD AND SYSTEM FOR POWER AMPLIFIER CHARACTERIZATION AND DIGITAL PREDISTORTION 审中-公开
公开(公告)号：US20170117854A1
公开(公告)日：2017-04-27
申请号：US15209008
申请日：2016-07-13
申请人： KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS , The University of Bristol
发明人： Souheil BEN SMIDA , Oualid Hammi , Kevin Andrew Morris
IPC分类号： H03F1/32 , H03F3/20 , H03F3/189
CPC分类号： H03F1/3247 , H03F3/189 , H03F3/24 , H03F2200/451 , H04B1/0475 , H04B2001/0425
摘要： Aspects of the disclosure provide a method and system for power amplifier characterization and digital predistortion. The method includes receiving a test signal including K samples with a sampling rate fS, generating a synthetic test signal including the test signal and a sequence of (N-1) delayed versions of the test signal, generating an under-sampled signal including M samples by sampling, at a sampling rate fS/N, an output signal of a device-under-test (DUT) with the synthetic test signal as an input of the DUT, the M samples of the under-sampled signal including N segments each including K/N samples, and generating a reconstructed signal including the M samples of the under-sampled signal.

99. 发明授权

US09632750B2 Direct digital synthesis of signals using maximum likelihood bit-stream encoding 有权
公开(公告)号：US09632750B2
公开(公告)日：2017-04-25
申请号：US14944184
申请日：2015-11-17
申请人： Intel Corporation
发明人： Kameran Azadet , Steven C. Pinault
IPC分类号： G06F5/01 , H04B1/04 , H04L1/00 , H04L27/233 , H04B1/62 , G06F9/30 , H04L25/02 , H04L25/03 , H03M3/00 , H03F1/02 , H03F1/32 , H03F3/189 , H03F3/24 , H04L25/49 , H04B1/00
CPC分类号： G06F9/3001 , G06F5/01 , G06F9/30036 , G06F17/15 , H03F1/0288 , H03F1/3241 , H03F1/3258 , H03F3/189 , H03F3/24 , H03F2200/336 , H03F2201/3209 , H03F2201/3212 , H03F2201/3224 , H03F2201/3233 , H03H17/06 , H03M3/30 , H04B1/0003 , H04B1/0475 , H04B1/62 , H04B2001/0408 , H04L1/0054 , H04L25/02 , H04L25/03 , H04L25/03178 , H04L25/03216 , H04L25/4917 , H04L27/2334
摘要： Maximum likelihood bit-stream generation and detection techniques are provided using the M-algorithm and Infinite Impulse Response (IIR) filtering. The M-Algorithm is applied to a target input signal X to perform Maximum Likelihood Sequence Estimation on the target input signal X to produce a digital bit stream B, such that after filtering by an IIR filter, the produced digital stream Y produces an error signal satisfying one or more predefined requirements. The predefined requirements comprise, for example, a substantially minimum error. In an exemplary bit detection implementation, the target input signal X comprises an observed analog signal and the produced digital stream Y comprises a digitized output of a receive channel corresponding to a transmitted bit stream. In an exemplary bit stream generation implementation, the target input signal X comprises a desired transmit signal and the produced digital stream Y comprises an estimate of the desired transmit signal.

100. 发明授权

US09628024B2 Envelope tracking modulator with feedback 有权
公开(公告)号：US09628024B2
公开(公告)日：2017-04-18
申请号：US14765240
申请日：2014-01-31
申请人： SNAPTRACK, INC.
发明人： Gerard Wimpenny
IPC分类号： H03G3/20 , H03F1/02 , H03F3/21 , H03F3/189 , H03F3/24 , H03F3/19 , H02M3/158 , H02M1/00
CPC分类号： H03F1/0211 , H02M1/00 , H02M3/158 , H02M2001/0045 , H03F1/0227 , H03F1/0238 , H03F3/189 , H03F3/19 , H03F3/20 , H03F3/211 , H03F3/245 , H03F2200/102 , H03F2200/135 , H03F2200/351 , H03F2200/375 , H03F2200/391 , H03F2200/432 , H03F2200/451 , H03F2203/21106 , H03F2203/21142
摘要： There is disclosed an envelope tracking modulated supply arranged to generate a modulated supply voltage in dependence on a reference signal, comprising a low frequency path for tracking low frequency variations in the reference signal and including a switched mode power supply, a correction path for tracking high frequency variations in the reference signal and including a linear amplifier, a feedback path from the output of the linear amplifier to the input of the linear amplifier, and a combiner for combining the output of the switched mode power supply and the output of the linear amplifier to generate a modulated supply voltage.

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