专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20190107608A1 Signal Processing Unit and Method for Time of Flight Measurement 审中-公开
公开(公告)号：US20190107608A1
公开(公告)日：2019-04-11
申请号：US15727376
申请日：2017-10-06
申请人： OSRAM Opto Semiconductors GmbH
发明人： Paul Ta
IPC分类号： G01S7/486 , H04B10/61
CPC分类号： G01S7/4865 , G01S7/4911 , G01S7/4913 , G01S7/4915 , G01S7/497 , G01S17/36 , H03M1/001 , H03M3/30 , H04B10/61
摘要： A signal processing unit for time of flight measurement includes an oscillation module, a transmission module, a detection module, a multiplier, an analog-to-digital-converter and a processing module. The oscillation module provides m reference phases. The transmission module generates a set of light impulses based on a selection phase selected out of the m reference phases. The detection module receives a set of reflections of the set of light impulses and to generate a detector signal based on the set of reflections. The multiplier obtains a result of a multiplication of the detector signal by a comparison phase. The analog-to-digital-converter converts the result of the multiplier into a digital signal. The processing module determines the comparison phase or the selection phase and calculates an approximate phase difference between the set of generated light impulses and the set of received reflections based on the digital signal.

2. 发明授权

US09966900B2 Apparatus for oscillator with improved precision and associated methods 有权
公开(公告)号：US09966900B2
公开(公告)日：2018-05-08
申请号：US15238525
申请日：2016-08-16
申请人： Silicon Laboratories Inc.
发明人： Marty Pflum , Arup Mukherji , John M. Khoury
IPC分类号： H03K3/03 , H03B5/04 , H03L7/00 , H03B5/36 , H03B27/00 , G06F1/04 , H03B1/00 , H03M3/00 , G01R19/00
CPC分类号： H03B5/04 , G01R19/00 , G06F1/04 , H03B1/00 , H03B5/36 , H03B27/00 , H03L7/00 , H03L7/1976 , H03M3/30
摘要： An apparatus includes a first oscillator to generate an output signal that has a first frequency. The apparatus further includes a second oscillator to generate an output signal that has a second frequency. The second frequency varies as a function of temperature. The apparatus further includes a controller that counts a number of cycles of the output signal of the second oscillator in order to determine whether to calibrate the first oscillator.

3. 发明授权

US09660665B2 Delta sigma modulator with dynamic error cancellation 有权
公开(公告)号：US09660665B2
公开(公告)日：2017-05-23
申请号：US15226436
申请日：2016-08-02
申请人： Texas Instruments Incorporated
发明人： Eeshan Miglani , Karthikeyan Gunasekaran , Santhosh Kumar Gowdhaman , Shagun Dusad
IPC分类号： H03M3/00 , H03M1/74 , H03M1/12 , H03M1/00
CPC分类号： H03M3/50 , H03M1/00 , H03M1/001 , H03M1/0626 , H03M1/0665 , H03M1/12 , H03M1/747 , H03M3/30 , H03M3/34 , H03M3/422 , H03M3/458 , H03M7/3004
摘要： The disclosure provides a delta sigma modulator that includes a first input port and a second input port. These ports receive a differential input signal. A DAC is coupled to the first input port and the second input port, and receives a differential feedback signal and a plurality of selection signals. A loop filter generates a differential filtered signal in response to a differential error signal. The differential error signal is proportional to a difference in the differential input signal and the differential feedback signal. A quantizer generates a quantized output signal in response to the differential filtered signal. A modified DWA block coupled between the quantizer and the DAC, generates the plurality of selection signals in response to a chop clock, a regular clock, the quantized output signal and a plurality of selection index signals. A selection index signal is dependent on previously generated plurality of selection signals.

4. 发明授权

US09577663B1 Bandwidth extension of oversampled analog-to-digital converters by means of gain boosting 有权
标题翻译：通过增益提升对过采样模数转换器的带宽扩展
公开(公告)号：US09577663B1
公开(公告)日：2017-02-21
申请号：US14873939
申请日：2015-10-02
申请人： Infineon Technologies Austria AG
发明人： Susana Paton Alvarez , Laura Conesa-Peraleja Ruano , Dietmar Straeussnigg , Andreas Wiesbauer
IPC分类号： H03M3/00 , H03M1/00 , H03M1/12
CPC分类号： H03M3/464 , H03M1/00 , H03M1/12 , H03M3/30 , H03M3/396 , H03M3/424 , H03M3/45 , H03M3/452 , H03M3/454
摘要： A digitized system operates to receive one or more analog signals from a sensor or other component and convert the analog signals to one or more digital signals. An analog-to-digital converter comprises a loop filter, a quantizer and one or more feedback digital-to-analog converters. A gain component provides coefficients along different points of a signal processing path to extend a bandwidth of the analog-to-digital converter. The gain component can modify a signal transfer function of the analog-to-digital converter while preserving a noise transfer function in order to process a signal in a higher frequency band in an extended mode of operation than other signals being processed in a normal operating mode.
摘要翻译：数字化系统操作以从传感器或其他部件接收一个或多个模拟信号，并将模拟信号转换成一个或多个数字信号。模数转换器包括环路滤波器，量化器和一个或多个反馈数模转换器。增益分量提供沿着信号处理路径的不同点的系数，以扩展模数转换器的带宽。增益分量可以修改模数转换器的信号传递功能，同时保持噪声传递功能，以便在扩展工作模式下处理在正常操作模式下处理的其它信号的较高频带中的信号。

5. 发明授权

US09503013B2 Motor drive voltage control device and method for controlling motor drive voltage 有权
标题翻译：电机驱动电压控制装置及控制电机驱动电压的方法
公开(公告)号：US09503013B2
公开(公告)日：2016-11-22
申请号：US14648289
申请日：2013-12-12
申请人： Schaft Inc.
发明人： Junichi Urata , Masayuki Inaba
IPC分类号： H02P6/10 , H02P27/08 , H03M3/00
CPC分类号： H02P27/08 , H02P6/14 , H03M3/30
摘要： To suppress a decline in the control accuracy of an applied voltage associated with an increase in quantum noise, and to increase the control accuracy of a motor speed. When generating a driving voltage signal supplied to a motor from a driving command signal, a motor-driving voltage control device reduces the gradation level and performs noise-shaping modulation before performing PWM modulation. Reducing the gradation level allows the degree of gradation of the driving voltage signal to be within the resolution range of the PWM modulation, and thus PWM modulation can be performed even when the driving voltage signal has a high frequency. Noise-shaping modulation reduces the level of quantum noise near the low frequency range by causing the quantum noise due to digitization, included in the driving voltage signal, to be biased toward the high frequency range side. Of modulation signals with the reduced-gradation level, the components near the high frequency band are cut, while the components near the low frequency range are used to suppress quantum noise and control the driving voltage applied to the motor with a high accuracy.
摘要翻译：抑制与量子噪声增加有关的施加电压的控制精度下降，提高电机转速的控制精度。当从驱动命令信号产生提供给电动机的驱动电压信号时，电机驱动电压控制装置在执行PWM调制之前降低灰度级并进行噪声整形调制。降低灰度级使得驱动电压信号的灰度级在PWM调制的分辨率范围内，因此即使驱动电压信号具有高频也可以执行PWM调制。噪声整形调制通过使包含在驱动电压信号中的数字化引起的量子噪声偏向高频范围侧，来降低低频范围附近的量子噪声的电平。对于具有降低灰度级的调制信号，高频带附近的分量被切断，而低频范围附近的分量被用于抑制量子噪声并以高精度控制施加到电动机的驱动电压。

6. 发明申请

US20160322979A1 RECONFIGURABLE FRACTIONAL-N FREQUENCY GENERATION FOR A PHASE-LOCKED LOOP 审中-公开
标题翻译：用于相位锁定环路的可重构分段N频率生成
公开(公告)号：US20160322979A1
公开(公告)日：2016-11-03
申请号：US14700695
申请日：2015-04-30
申请人： Xilinx, Inc.
发明人： Parag Upadhyaya , Adebabay M. Bekele , Didem Z. Turker Melek , Zhaoyin D. Wu
IPC分类号： H03L7/095 , H04B1/50 , H03M3/00
CPC分类号： H03L7/095 , H03L7/18 , H03L7/197 , H03L7/1974 , H03M3/30 , H04B1/50
摘要： In an example, a phase-locked loop (PLL) circuit includes an error detector operable to generate an error signal; an oscillator operable to provide an output signal having an output frequency based on the error signal and a frequency band select signal, the output frequency being a frequency multiplier times a reference frequency; a frequency divider operable to divide the output frequency of the output signal to generate a feedback signal based on a divider control signal; a sigma-delta modulator (SDM) operable to generate the divider control signal based on inputs indicative of an integer value and a fractional value of the frequency multiplier, the SDM responsive to an order select signal operable to select an order of the SDM; and a state machine operable to, in an acquisition state, generate the frequency band select signal and set the order of the SDM.
摘要翻译：在一个示例中，锁相环（PLL）电路包括可操作以产生误差信号的误差检测器; 振荡器，其可操作以提供具有基于所述误差信号和频带选择信号的输出频率的输出信号，所述输出频率是频率乘数乘以参考频率; 分频器，用于将输出信号的输出频率除以基于分频器控制信号产生反馈信号; Σ-Δ调制器（SDM），可操作以基于表示所述倍频器的整数值和分数值的输入产生所述除法器控制信号，所述SDM响应于可操作以选择所述SDM的次序的订单选择信号; 以及状态机，其可操作以在获取状态下生成所述频带选择信号并设置所述SDM的顺序。

7. 发明授权

US09379732B2 Delta-sigma modulator with reduced integrator requirements 有权
标题翻译：降低积分器要求的Delta-Σ调制器
公开(公告)号：US09379732B2
公开(公告)日：2016-06-28
申请号：US14845899
申请日：2015-09-04
申请人： Cirrus Logic, Inc.
发明人： John L. Melanson , Stephen T. Hodapp
IPC分类号： H03M1/30 , H03M3/00
CPC分类号： H03M3/30 , H03M3/436 , H03M3/44 , H03M3/464
摘要： Requirements placed on the first integrator of a filter in a continuous-time delta-feedback modulator may be reduced by using circuitry to reduce the speed of a signal provided to the first integrator of the modulator. The reduction in speed applied to the signal received at the first integrator may then be compensated with circuitry elsewhere in the modulator, such that the net effect of the slow down and speed up of signals does not affect the output of the modulator. The sigma-delta modulator may be implemented in converters, such as an analog-to-digital converter (ADC).
摘要翻译：通过使用电路来降低提供给调制器的第一积分器的信号的速度，可以减少在连续时间增量反馈调制器中对滤波器的第一积分器的要求。然后可以利用在调制器其他地方的电路补偿施加到在第一积分器处接收的信号的速度的降低，使得信号的减速和加速的净效应不影响调制器的输出。 Σ-Δ调制器可以在诸如模数转换器（ADC）的转换器中实现。

8. 发明授权

US09374069B2 Signal processing 有权
标题翻译：信号处理
公开(公告)号：US09374069B2
公开(公告)日：2016-06-21
申请号：US14341216
申请日：2014-07-25
申请人： Atlantic Inertial Systems Limited
发明人： Kevin Townsend
IPC分类号： H03K3/017 , G01C19/5684 , G01C19/5776 , H03D1/18 , H03M1/12 , H03M3/00
CPC分类号： H03K3/017 , G01C19/5684 , G01C19/5776 , H03D1/18 , H03M1/12 , H03M3/30
摘要： A method of processing an amplitude-modulated analog signal at a carrier frequency Fc comprises: digitizing the analog signal to produce an input bit stream that represents the amplitude of the analog signal; generating an in-phase reference bit stream that is synchronous to the carrier frequency Fc and represents an in-phase digital reference signal substantially in the form of a sine and/or cosine wave; and multiplying the input bit stream with the in-phase reference bit stream to produce an output bit stream representing the amplitude modulation of the analog signal.
摘要翻译：一种在载波频率Fc处理幅度调制的模拟信号的方法包括：数字化模拟信号以产生表示模拟信号幅度的输入比特流; 产生与载波频率Fc同步的同相参考比特流，并且表示基本上呈正弦和/或余弦波形式的同相数字参考信号; 并将输入比特流与同相参考比特流相乘以产生表示模拟信号的幅度调制的输出比特流。

9. 发明申请

US20160164531A1 METHODS AND DEVICES FOR ERROR CORRECTION OF A SIGNAL USING DELTA SIGMA MODULATION 有权
标题翻译：用于使用DELTA SIGMA调制信号进行错误校正的方法和装置
公开(公告)号：US20160164531A1
公开(公告)日：2016-06-09
申请号：US14907596
申请日：2013-11-28
申请人： SMART ENERGY INSTRUMENTS INC.
发明人： Donald Jeffrey DIONNE , Brian Leonard William HOWSE , Jennifer Marie McCANN
IPC分类号： H03L7/099 , H03L7/081 , H03M3/00
CPC分类号： H03L7/0994 , G06F1/02 , G06F17/10 , H03L1/00 , H03L7/081 , H03L7/095 , H03M3/30
摘要： A method for correcting long-term phase drift of a crystal oscillator in a numerically-controlled oscillator is described. The method includes determining the phase error in an oscillator signal in comparison with an external time base; delta-sigma modulating the phase error to generate a delta-sigma error bitstream; conditionally adding or subtracting an error correction step size from a phase increment value in each clock cycle based on the delta-sigma error bitstream, to create a modulated phase increment value; and adding the modulated phase increment value to a phase accumulator to generate an error-corrected output digital signal. The delta-sigma-based error correction method avoids the use of multipliers. The same delta-sigma error signal can be used in multiple numerically-controlled oscillators configured to different output frequency if driven by the same reference oscillator.
摘要翻译：描述了用于校正数控振荡器中的晶体振荡器的长期相位漂移的方法。该方法包括：与外部时基相比确定振荡器信号中的相位误差; delta-sigma调制相位误差以产生Δ-Σ误差比特流; 基于Δ-Σ误差比特流，有条件地从每个时钟周期的相位增量值中增加或减去误差校正步长，以产生调制相位增量值; 并将调制相位增量值相加到相位累加器以产生经纠错的输出数字信号。基于delta-sigma的纠错方法避免了乘法器的使用。如果由相同的参考振荡器驱动，则可以在配置为不同输出频率的多个数控振荡器中使用相同的delta-sigma误差信号。

10. 发明申请

US20160149586A1 DELTA-SIGMA MODULATOR HAVING DIFFERENTIAL OUTPUT 有权
标题翻译：具有差分输出的DELTA-SIGMA调制器
公开(公告)号：US20160149586A1
公开(公告)日：2016-05-26
申请号：US14805628
申请日：2015-07-22
申请人： SAMSUNG ELECTRONICS CO., LTD. , Industry-University Cooperation Foundation Hanyang University ERICA Campus
发明人： Jeongjin ROH , Jong Pal KIM , Youngjae JUNG , Quanzhen DUAN , Tak Hyung LEE , Danbi CHOI
IPC分类号： H03M3/00 , G06G7/184
CPC分类号： H03M3/39 , G06G7/184 , G06G7/186 , H03M3/30 , H03M3/458 , H03M3/496
摘要： Provided is a delta-sigma modulator having a differential output, the modulator including a switched-capacitor integrator configured to generate a non-inverted integral signal and an inverted integral signal and also including a switched-capacitor circuit configured to sample an input signal based on a control signal and to integrate the feedback signal and the input signal based on the control signal and also a feedback circuit configured to generate the feedback signal.
摘要翻译：提供了具有差分输出的Δ-Σ调制器，该调制器包括被配置为产生非反相积分信号和反相积分信号的开关电容积分器，并且还包括被配置为基于以下步骤对输入信号进行采样的开关电容器电路控制信号，并且基于控制信号对反馈信号和输入信号进行积分，并且还配置成产生反馈信号的反馈电路。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式