专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20080285549A1 SYNCHRONOUS READ CHANNEL 失效
标题翻译：同步读通道
公开(公告)号：US20080285549A1
公开(公告)日：2008-11-20
申请号：US12126188
申请日：2008-05-23
申请人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
发明人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
IPC分类号： H04L12/50
CPC分类号： G11B20/10055 , G11B5/012 , G11B5/09 , G11B20/10 , G11B20/10009 , G11B20/1258 , G11B20/1403 , G11B20/1426 , G11B20/18 , G11B27/3027 , G11B2020/1476 , H03M13/31
摘要： A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.
摘要翻译：公开了具有提供数字增益控制，定时恢复，均衡，数字峰值检测，序列检测，RLL（1,7）编码和解码，容错同步和信道质量测量的单芯片集成电路数字部分的同步读通道。集成电路既适用于中心采样和侧采样，又具有各种脉冲整形和恢复参数的高度可编程性，以及使用序列检测或数字峰值检测提供解码数据的能力。这些特征以及容错同步标记检测以及当同步标记被消除时恢复数据的能力允许各种各样的重试和恢复策略以最大化数据恢复的可能性。公开了包括在单个集成电路中并入模拟功能以及读取通道的主要数字功能的实施例的各种实施例，以及利用支持大类部分响应通道的降低复杂度的可编程修改维特比检测器的优选实施例。

12. 发明授权

US07006032B2 Integrated traffic surveillance apparatus 有权
标题翻译：综合交通监控仪器
公开(公告)号：US07006032B2
公开(公告)日：2006-02-28
申请号：US10761931
申请日：2004-01-15
申请人： Larry D. King , James B. Jones
发明人： Larry D. King , James B. Jones
IPC分类号： G01S13/93
CPC分类号： G08G5/0008 , G01S3/023 , G01S13/9303 , G08G5/0021 , G08G5/0052 , G08G5/0078
摘要： An apparatus and method for combining the functionality of multiple airborne traffic surveillance systems that operate in the L-band frequency range. The apparatus and method combine the functionality of both a Traffic Alert Collision Avoidance System (TCAS) and a Mode-Select (Mode-S) transponder in an integrated L-band traffic surveillance apparatus having a single processor that is embodied in a single Line Replaceable Unit.
摘要翻译：一种用于组合在L波段频率范围内工作的多个机载交通监视系统的功能的装置和方法。该装置和方法将具有单个处理器的集成的L波段交通监视装置中的交通警报冲突避免系统（TCAS）和模式选择（Mode-S）应答器的功能结合在一体的单个可替换线路单元。

13. 发明授权

US5978162A Synchronous read channel integrated circuit employing a channel quality circuit for calibration 失效
标题翻译：采用通道质量电路进行校准的同步读通道集成电路
公开(公告)号：US5978162A
公开(公告)日：1999-11-02
申请号：US821174
申请日：1997-03-19
申请人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
发明人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
IPC分类号： G11B5/012 , G11B5/09 , G11B20/10 , G11B20/12 , G11B20/14 , G11B20/18 , G11B27/30 , H03M13/31
CPC分类号： G11B20/10055 , G11B20/10 , G11B20/10009 , G11B20/1403 , G11B20/1426 , G11B20/18 , G11B27/3027 , G11B5/012 , G11B5/09 , H03M13/31 , G11B20/1258 , G11B2020/1476
摘要： A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a desired partial response, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a discrete time sequence detector. A Channel Quality circuit accumulates various signals generated by the read channel, such as sample errors, gain errors, timing errors, etc., for use in calibrating the read channel components and estimating the bit error rate.
摘要翻译：公开了一种同步读通道，其从位于磁盘介质上的磁读头读取模拟读信号，根据所需的部分响应对采样值进行滤波，从滤波后的采样值中提取定时信息，并检测估计数据序列使用离散时间序列检测器从滤波后的样本值。通道质量电路积累由读通道产生的各种信号，例如采样误差，增益误差，定时误差等，用于校准读通道分量并估计误码率。

14. 发明授权

US5966257A Synchronous read channel integrated circuit employing discrete time timing recovery 失效
标题翻译：采用离散时间定时恢复的同步读通道集成电路
公开(公告)号：US5966257A
公开(公告)日：1999-10-12
申请号：US821011
申请日：1997-03-19
申请人： Richard T. Behrens , Alan J. Armstrong , Trent Dudley , Neal Glover , Larry D. King
发明人： Richard T. Behrens , Alan J. Armstrong , Trent Dudley , Neal Glover , Larry D. King
IPC分类号： G11B5/012 , G11B5/09 , G11B20/10 , G11B20/12 , G11B20/14 , G11B20/18 , G11B27/30 , H03M13/31
CPC分类号： G11B20/10055 , G11B20/10 , G11B20/10009 , G11B20/1403 , G11B20/1426 , G11B20/18 , G11B27/3027 , G11B5/012 , G11B5/09 , H03M13/31 , G11B20/1258 , G11B2020/1476
摘要： A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a partial response of the form (1-D)(1+D).sup.n where n>1, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a discrete time sequence detector.
摘要翻译：公开了一种同步读通道，其从位于磁盘介质上的磁读头读取模拟读信号，根据形式（1-D）（1 + D）n的部分响应滤波样本值，其中n> 1，从滤波的采样值中提取定时信息，并使用离散时间序列检测器从滤波的采样值中检测估计数据序列。

15. 发明申请

US20110003077A1 Reworking Ceramic Structures 有权
标题翻译：返修陶瓷结构
公开(公告)号：US20110003077A1
公开(公告)日：2011-01-06
申请号：US12497008
申请日：2009-07-02
申请人： Vann Heng , Elizabeth Chu , Van H. Ngo , Larry D. King
发明人： Vann Heng , Elizabeth Chu , Van H. Ngo , Larry D. King
IPC分类号： B05D3/00
CPC分类号： C04B37/008 , C04B37/001 , C04B37/005 , C04B41/009 , C04B41/5025 , C04B41/87 , C04B2111/00982 , C04B2235/612 , C04B2235/6567 , C04B2235/6581 , C04B2237/04 , C04B2237/062 , C04B2237/064 , C04B2237/08 , C04B2237/083 , C04B2237/32 , C04B2237/341 , C04B2237/343 , C04B2237/365 , C04B2237/368 , C04B2237/52 , C04B2237/62 , C04B2237/88 , F01D5/005 , F05D2300/6033 , Y02T50/672 , B32B18/00 , C04B35/80 , C04B41/4535 , C04B41/457 , C04B41/4572
摘要： A method for reworking a ceramic structure. A number of holes are formed in a portion of the ceramic structure in which a rework of the ceramic structure is desired. The ceramic structure has a plurality of layers in the portion in which the rework is desired. A ceramic bonding material is introduced into the number of holes formed in the portion of the ceramic structure. The ceramic bonding material is cured in the portion of the ceramic structure.
摘要翻译：陶瓷结构的再加工方法。在陶瓷结构的一部分中形成多个孔，其中期望陶瓷结构的返修。陶瓷结构在需要返工的部分中具有多个层。将陶瓷接合材料引入形成在陶瓷结构部分中的孔数。陶瓷接合材料在陶瓷结构的部分被固化。

16. 发明授权

US6021011A Synchronous read channel employing a digital center frequency setting for a variable frequency oscillator in discrete time timing recovery 失效
标题翻译：在离散时间定时恢复中采用可变频率振荡器的数字中心频率设置的同步读取通道
公开(公告)号：US6021011A
公开(公告)日：2000-02-01
申请号：US822603
申请日：1997-03-19
申请人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
发明人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
IPC分类号： G11B5/012 , G11B5/09 , G11B20/10 , G11B20/12 , G11B20/14 , G11B20/18 , G11B27/30 , H03M13/31
CPC分类号： G11B20/10055 , G11B20/10 , G11B20/10009 , G11B20/1403 , G11B20/1426 , G11B20/18 , G11B27/3027 , G11B5/012 , G11B5/09 , H03M13/31 , G11B20/1258 , G11B2020/1476
摘要： A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a desired partial response, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a discrete time sequence detector. Discrete time timing recovery within the read channel comprises a variable frequency oscillator (VFO) for generating a sampling clock. A center operating frequency of the VFO is adjusted through a programmable register which stores a digital center frequency setting. A phase error is computed from the sample values and combined with the center frequency setting to control the frequency and phase of the sampling clock at the output of the VFO.
摘要翻译：公开了一种同步读通道，其从位于磁盘介质上的磁读头读取模拟读信号，根据所需的部分响应对采样值进行滤波，从滤波后的采样值中提取定时信息，并检测估计数据序列使用离散时间序列检测器从滤波后的样本值。读通道内的离散时间定时恢复包括用于产生采样时钟的可变频率振荡器（VFO）。 VFO的中心工作频率通过存储数字中心频率设置的可编程寄存器进行调整。从采样值计算相位误差，并与中心频率设置相结合，以控制VFO输出端采样时钟的频率和相位。

17. 发明授权

US5956304A Differential phase error detector using dual arm correlation for servo tracking in an optical disk storage device 失效
标题翻译：差分相位误差检测器，用于光盘存储装置中的伺服跟踪双臂相关
公开(公告)号：US5956304A
公开(公告)日：1999-09-21
申请号：US912916
申请日：1997-08-15
申请人： Louis Supino , Paul M. Romano , Larry D. King , German S. Feyh
发明人： Louis Supino , Paul M. Romano , Larry D. King , German S. Feyh
IPC分类号： G11B7/085 , G11B7/09 , G11B7/00
CPC分类号： G11B7/0906 , G11B7/08541 , G11B7/0901
摘要： In an optical disk storage device, a differential phase detector is disclosed for generating a position error signal independent of the frequency content of the recorded data. A pair if diagonal signals S1 and S2 are generated by adding a pair of respective quadrants of a four-quadrant photodetector, where the phase offset between the diagonal signals represents the position error of the pit image as it passes over the photodetector. The position error is determined in the present invention by computing the difference between a positive and negative correlation of the diagonal signals S1 and S2, otherwise referred to as a dual arm correlation (DAC) ##EQU1## where .DELTA. is the correlation offset and L is the correlation length. In the preferred embodiment, the correlation offset .DELTA. is adaptively adjusted to maximize the correlation between S1 and S2. In this manner, the position error estimate is substantially insensitive to the frequency content of the recorded data. Furthermore, this method extends the position error over a range of plus or minus one-half a track, which facilitates generating a quadrature signal for use in counting track crossings during seek operations.
摘要翻译：在光盘存储装置中，公开了用于产生与记录数据的频率内容无关的位置误差信号的差分相位检测器。如果对角线信号S1和S2是通过增加四象限光电检测器的一对相应象限来产生的，其中对角线信号之间的相位偏移表示当其通过光电检测器时凹坑图像的位置误差。在本发明中通过计算对角线信号S1和S2的正相关和负相关之间的差异来确定位置误差，否则称为双相位相关（DAC），其中DELTA是相关偏移，L是相关长度。在优选实施例中，相关偏移量DELTA被自适应地调整以最大化S1和S2之间的相关性。以这种方式，位置误差估计对记录数据的频率内容基本不敏感。此外，该方法将位置误差扩展到正或负二分之一的轨道的范围，这有利于产生用于在搜索操作期间计数轨道交叉的正交信号。

18. 发明授权

US5576910A Burst comparison and sequential technique for determining servo control in a mass storage disk device 失效
标题翻译：用于确定大容量存储盘装置中的伺服控制的突发比较和顺序技术
公开(公告)号：US5576910A
公开(公告)日：1996-11-19
申请号：US441676
申请日：1995-05-15
申请人： Paul M. Romano , Larry D. King , Mike Machado , Petro Estakhri , Son Ho , Phuc Tran , Maryam Imam
发明人： Paul M. Romano , Larry D. King , Mike Machado , Petro Estakhri , Son Ho , Phuc Tran , Maryam Imam
IPC分类号： G11B5/596
CPC分类号： G11B5/59655
摘要： A burst magnitude comparator and an instruction sequencer are employed in a servo system controller to rapidly determine position correction information for moving a transducer head over the center line of a track recorded on a disk in a mass storage disk drive. The burst magnitude comparator selects at least two burst signals derived from bursts recorded at predetermined locations relative to the center line from which to derive a correction control signal, based on a predetermined relationship of the burst signals, and supplies the selected burst signals in a predetermined order to facilitate calculation of the correction signal by a data processor used with the servo system controller. An instruction sequencer controls a sequence of converting the analog burst signals from the head to digital burst signals without intervention or control from the data processor. By ordering the signals with the burst magnitude comparator and by sequencing the conversion of the signals, the calculation is speeded and the processing and code requirements for the data processor are greatly reduced, thereby reducing transport delay and freeing the resources of the processor for use in other, potentially more important tasks associated with the servo controller.
摘要翻译：在伺服系统控制器中采用脉冲串幅度比较器和指令定序器来快速地确定位置校正信息，用于将传感器头移动到记录在大容量存储盘驱动器中的盘上的轨道的中心线上。脉冲串幅度比较器基于脉冲串信号的预定关系，从相对于中心线记录的脉冲串中选出至少两个突发信号，并将其提供给预定的脉冲信号为了便于利用伺服系统控制器使用的数据处理器来计算校正信号。指令定序器控制从头到数字突发信号转换模拟脉冲串信号的顺序，而不需要来自数据处理器的干预或控制。通过用脉冲串幅度比较器排序信号并对信号的转换进行排序，计算速度加快，数据处理器的处理和编码要求大大降低，从而减少了传输延迟并释放了处理器的资源，用于与伺服控制器相关的其他可能更重要的任务。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式