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51. 发明授权

US06859390B2 Phase-change memory element and method of storing data therein 有权
标题翻译：相变存储元件及其中存储数据的方法
公开(公告)号：US06859390B2
公开(公告)日：2005-02-22
申请号：US10755169
申请日：2004-01-09
申请人： Boil Pashmakov
发明人： Boil Pashmakov
IPC分类号： G11C11/34 , G11C16/02 , G11C16/10 , G11C11/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/004 , G11C13/0069 , G11C2013/0045 , G11C2013/009
摘要： A phase-change memory element including a phase-change material. The phase-change memory element has a plurality of memory state wherein each of the memory states has a corresponding threshold voltage. The threshold voltages may be used to determine the current memory state of the memory element. The phase-change material may include a chalcogen element.
摘要翻译：一种包括相变材料的相变存储元件。相变存储元件具有多个存储状态，其中每个存储器状态具有对应的阈值电压。阈值电压可以用于确定存储器元件的当前存储器状态。相变材料可以包括硫属元素。

52. 发明申请

US20050024933A1 Process for manufacturing device having selector transistors for storage elements and memory device fabricated thereby 审中-公开
标题翻译：具有用于存储元件的选择晶体管和由其制造的存储器件的制造器件的工艺
公开(公告)号：US20050024933A1
公开(公告)日：2005-02-03
申请号：US10836651
申请日：2004-04-30
申请人： Fabio Pellizzer , Roberto Bez
发明人： Fabio Pellizzer , Roberto Bez
IPC分类号： H01L27/24 , H01L45/00 , G11C11/00
CPC分类号： H01L27/2445 , H01L45/06 , H01L45/1233 , H01L45/126
摘要： A process for manufacturing a memory device having selector bipolar transistors for storage elements, includes the steps of: in a semiconductor body, forming at least a selector transistor, having at least an embedded conductive region, and forming at least a storage element, stacked on and electrically connected to the selector transistor; moreover, the step of forming at least a selector transistor includes forming at least a raised conductive region located on and electrically connected to the embedded conductive region.
摘要翻译：一种用于制造具有用于存储元件的选择器双极晶体管的存储器件的方法，包括以下步骤：在半导体本体中，至少形成至少具有嵌入的导电区域的选择晶体管，并形成至少一个存储元件，堆叠在并电连接到选择晶体管; 此外，形成至少选择晶体管的步骤包括至少形成位于并电连接到嵌入的导电区域的凸起的导电区域。

53. 发明申请

US20040228163A1 Phase change memory device 有权
标题翻译：相变存储器件
公开(公告)号：US20040228163A1
公开(公告)日：2004-11-18
申请号：US10782737
申请日：2004-02-18
申请人： STMicroelectronics S.r.l. , OVONYX Inc.
发明人： Osama Khouri , Claudio Resta
IPC分类号： G11C011/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0038 , G11C13/0064 , G11C13/0069 , G11C2013/0054 , G11C2213/79
摘要： A phase change memory has an array formed by a plurality of cells, each including a memory element of calcogenic material and a selection element connected in series to the memory element; a plurality of address lines connected to the cells; a write stage and a reading stage connected to the array. The write stage is formed by current generators, which supply preset currents to the selected cells so as to modify the resistance of the memory element. Reading takes place in voltage, by appropriately biasing the selected cell and comparing the current flowing therein with a reference value.
摘要翻译：相变存储器具有由多个单元形成的阵列，每个单元包括煅烧材料的存储元件和与存储元件串联连接的选择元件; 连接到所述单元的多个地址线; 连接到阵列的写阶段和阅读阶段。写入级由电流发生器形成，电流发生器向所选择的单元提供预设电流，以便改变存储元件的电阻。读取通过适当地偏置所选择的单元并将其中流动的电流与参考值进行比较来进行电压。

54. 发明申请

US20030223285A1 Single supply voltage, nonvolatile phase change memory device with cascoded column selection and simultaneous word read/write operations 有权
标题翻译：单电源电压，具有级联列选择和同时字读/写操作的非易失性相变存储器件
公开(公告)号：US20030223285A1
公开(公告)日：2003-12-04
申请号：US10331185
申请日：2002-12-27
申请人： STMicroelectronics S.r.l. , OVONYX Inc.
发明人： Osama Khouri , Ferdinando Bedeschi
IPC分类号： G11C029/00
CPC分类号： G11C13/0026 , G11C7/22 , G11C13/0038 , G11C16/24 , G11C2216/22
摘要： A nonvolatile memory device is described comprising a memory array, a row decoder and a column selector for addressing the memory cells of the memory array, and a biasing stage for biasing the array access device terminal of the addressed memory cell. The biasing stage is arranged between the column selector and the memory array and comprises a biasing transistor having a drain terminal connected to the column selector, a source terminal connected to the array access device terminal of the addressed memory cell, and a gate terminal receiving a logic driving signal, the logic levels of which are defined by precise and stable voltages and are generated by a logic block and an output buffer cascaded together. The output buffer may be supplied with either a read voltage or a program voltage supplied by a multiplexer. The biasing transistor may be either included as part of the column selector and formed by the selection transistor which is closest to the addressed memory cell or distinct from the selection transistors of the column selector.
摘要翻译：描述了一种非易失性存储器件，其包括用于寻址存储器阵列的存储单元的存储器阵列，行解码器和列选择器，以及用于偏置寻址的存储器单元的阵列存取器件端子的偏置级。偏置级布置在列选择器和存储器阵列之间，并且包括偏置晶体管，漏极端子连接到列选择器，源极端子连接到寻址存储单元的阵列存取器件端子，栅极端子接收逻辑驱动信号，其逻辑电平由精确和稳定的电压定义，并由逻辑块和输出缓冲器一起级联产生。可以向输出缓冲器提供由多路复用器提供的读取电压或编程电压。偏置晶体管可以被包括为列选择器的一部分，并且由选择晶体管形成，该选择晶体管最靠近寻址的存储单元或与列选择器的选择晶体管不同。

55. 发明申请

US20030219924A1 Small area contact region, high efficiency phase change memory cell and fabrication method thereof 有权
标题翻译：小面积接触区域，高效率相变存储单元及其制造方法
公开(公告)号：US20030219924A1
公开(公告)日：2003-11-27
申请号：US10313991
申请日：2002-12-05
申请人： STMicroelectronics S.r.l. , OVONYX Inc.
发明人： Roberto Bez , Fabio Pellizzer , Caterina Riva , Romina Zonca
IPC分类号： H01L021/06 , H01L021/4763
CPC分类号： G11C13/0004 , H01L27/2445 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1691 , Y10S438/947
摘要： A contact structure, including a first conducting region having a first thin portion with a first sublithographic dimension in a first direction; a second conducting region having a second thin portion with a second sublithographic dimension in a second direction transverse to said first direction; the first and second thin portions being in direct electrical contact and defining a contact area having a sublithographic extension. The thin portions are obtained using deposition instead of lithography: the first thin portion is deposed on a wall of an opening in a first dielectric layer; the second thin portion is obtained by deposing a sacrificial region on vertical wall of a first delimitation layer, deposing a second delimitation layer on the free side of the sacrificial region, removing the sacrificial region to form a sublithographic opening that is used to etch a mold opening in a mold layer and filling the mold opening.
摘要翻译：一种接触结构，包括：第一导电区域，具有在第一方向上具有第一亚光刻尺寸的第一薄部分; 第二导电区域，具有第二薄部分，具有横向于所述第一方向的第二方向的第二亚光刻尺寸; 第一和第二薄部分直接电接触并且限定具有亚光刻延伸部的接触区域。使用沉积代替光刻获得薄部分：第一薄部分被放置在第一介电层中的开口的壁上; 通过在第一限定层的垂直壁上去除牺牲区域，在牺牲区域的自由侧上取代第二限定层，去除牺牲区域以形成用于蚀刻模具的亚光刻开口来获得第二薄部分在模具层中开口并填充模具开口。

56. 发明授权

US09000408B2 Memory device with low reset current 有权
标题翻译：具有低复位电流的存储器件
公开(公告)号：US09000408B2
公开(公告)日：2015-04-07
申请号：US11871761
申请日：2007-10-12
申请人： Sergey Kostylev , Tyler Lowrey , Wolodymyr Czubatyj
发明人： Sergey Kostylev , Tyler Lowrey , Wolodymyr Czubatyj
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/1293 , H01L45/141 , H01L45/143 , H01L45/148 , H01L45/1675 , H01L45/1691
摘要： An electronic device includes a first electrode and a second electrode. The device also includes a resistive material between the first and second electrodes. An active material is between the first electrode and the resistive material. The active material is in electrical communication with the first electrode and the active material is in electrical communication with the second electrode through the resistive layer.
摘要翻译：电子设备包括第一电极和第二电极。该装置还包括在第一和第二电极之间的电阻材料。活性材料在第一电极和电阻材料之间。活性材料与第一电极电连通，并且活性材料通过电阻层与第二电极电连通。

57. 发明授权

US08699267B2 Semiconductor phase change memory using face center cubic crystalline phase change material 有权
标题翻译：半导体相变存储器采用面中心立方晶相变材料
公开(公告)号：US08699267B2
公开(公告)日：2014-04-15
申请号：US13910237
申请日：2013-06-05
申请人： Ovonyx, Inc.
发明人： Charles H. Dennison , Stephen J. Hudgens
IPC分类号： G11C11/00
CPC分类号： H01L45/065 , G11C13/0004 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1625 , Y10S977/754
摘要： In accordance with some embodiments, a phase change memory may be formed in which the thermal conductivity in the region outside the programmed volume of phase change material is reduced. This may reduce the power consumption of the resulting phase change memory. The reduction in power consumption may be achieved by forming distinct layers of phase change material that have little or no mixing between them outside the programmed volume. In one embodiment, a face centered cubic chalcogenide structure may be utilized.
摘要翻译：根据一些实施例，可以形成相变存储器，其中减少了编程体积相变材料之外的区域中的热导率。这可能会降低所得相变存储器的功耗。功耗的降低可以通过在编程体积之外形成很少或不混合的相变材料的不同层来实现。在一个实施方案中，可以使用面心立方硫属元素化合物结构。

58. 发明授权

US08637342B2 Phase change memory with threshold switch select device 有权
标题翻译：具有阈值开关选择装置的相变存储器
公开(公告)号：US08637342B2
公开(公告)日：2014-01-28
申请号：US11272208
申请日：2005-11-10
申请人： Ilya V. Karpov , Sean Jong Lee , Yudong Kim , Gregory E. Atwood
发明人： Ilya V. Karpov , Sean Jong Lee , Yudong Kim , Gregory E. Atwood
IPC分类号： H01L21/00
CPC分类号： H01L45/141 , G11C13/0004 , H01L27/2427 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/1683
摘要： An ovonic threshold switch may be formed of a continuous chalcogenide layer. That layer spans multiple cells, forming a phase change memory. In other words, the ovonic threshold switch may be formed of a chalcogenide layer which extends, uninterrupted, over numerous cells of a phase change memory.
摘要翻译：可以由连续的硫族化物层形成一个超声阈值开关。该层跨越多个单元，形成相变存储器。换句话说，超声阈值开关可以由在相变存储器的多个单元上不间断地延伸的硫族化物层形成。

59. 发明授权

US08440501B2 Memory device 有权
标题翻译：内存设备
公开(公告)号：US08440501B2
公开(公告)日：2013-05-14
申请号：US13041955
申请日：2011-03-07
申请人： David Sargent , Jon Maimon
发明人： David Sargent , Jon Maimon
IPC分类号： H01L29/02
CPC分类号： H01L45/06 , G11C13/0004 , H01L45/1233 , H01L45/1293 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/148 , Y10T29/49155
摘要： A memory or switching device includes a mesa and a first electrode conforming to said mesa. The device also includes a second electrode and a phase-change or switching material disposed between said first and second electrodes. The phase-change or switching material is in electrical communication with the first and second electrodes at a first contact region and a second contact region respectively. Also described is a method for making a memory or switching device. The method includes providing a first insulator and configuring the first insulator to provide a mesa. A first conductive layer is provided conforming to the mesa. A phase-change or switching material is provided over a portion of the first conductive layer, and a second conductive layer is provided over the phase-change or switching material.
摘要翻译：存储器或开关器件包括台面和符合所述台面的第一电极。该装置还包括设置在所述第一和第二电极之间的第二电极和相变或开关材料。相变或开关材料分别在第一接触区域和第二接触区域处与第一和第二电极电连通。还描述了一种用于制造存储器或开关装置的方法。该方法包括提供第一绝缘体并配置第一绝缘体以提供台面。提供符合台面的第一导电层。相变或开关材料设置在第一导电层的一部分上，并且第二导电层设置在相变或开关材料上。

60. 发明授权

US08344348B2 Memory device 有权
标题翻译：内存设备
公开(公告)号：US08344348B2
公开(公告)日：2013-01-01
申请号：US12244421
申请日：2008-10-02
申请人： Guy Wicker , Wolodymyr Czubatyj
发明人： Guy Wicker , Wolodymyr Czubatyj
IPC分类号： H01L47/00
CPC分类号： H01L45/04 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144
摘要： An electrical device includes a first electrode and a second electrode. A first active material is between the first electrode and second electrode. A second active material is between the first electrode and second electrode. A nonlinear electrode material is disposed between the first electrode and the second electrode. The nonlinear electrode material is electrically in series with the first electrode, the first active material, the second active material, and the second electrode. The first electrode and the first active material undergo no chemical or electrochemical reaction when current passes between the first electrode and the second electrode.
摘要翻译：电气装置包括第一电极和第二电极。第一活性材料在第一电极和第二电极之间。第二活性材料在第一电极和第二电极之间。非线性电极材料设置在第一电极和第二电极之间。非线性电极材料与第一电极，第一活性材料，第二活性材料和第二电极电串联。当电流通过第一电极和第二电极之间时，第一电极和第一活性材料不经历化学或电化学反应。

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