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51. 发明授权

US08022477B2 Semiconductor apparatus having lateral type MIS transistor 有权
标题翻译：具有横向型MIS晶体管的半导体装置
公开(公告)号：US08022477B2
公开(公告)日：2011-09-20
申请号：US12071411
申请日：2008-02-21
申请人： Nozomu Akagi , Shigeki Takahashi , Takashi Nakano , Yasushi Higuchi , Tetsuo Fujii , Yoshiyuki Hattori , Makoto Kuwahara
发明人： Nozomu Akagi , Shigeki Takahashi , Takashi Nakano , Yasushi Higuchi , Tetsuo Fujii , Yoshiyuki Hattori , Makoto Kuwahara
IPC分类号： H01L29/66
CPC分类号： H01L29/7817 , H01L27/0738 , H01L29/0696 , H01L29/41758 , H01L29/42368 , H01L29/435 , H01L29/4933 , H01L29/7824 , H01L29/7835
摘要： A semiconductor apparatus comprises: a semiconductor substrate; and a lateral type MIS transistor disposed on a surface part of the semiconductor substrate. The lateral type MIS transistor includes: a line coupled with a gate of the lateral type MIS transistor; a polycrystalline silicon resistor that is provided in the line, and that has a conductivity type opposite to a drain of the lateral type MIS transistor; and an insulating layer through which a drain voltage of the lateral type MIS transistor is applied to the polycrystalline silicon resistor.
摘要翻译：半导体装置包括：半导体衬底; 以及设置在半导体衬底的表面部分上的横向型MIS晶体管。横向型MIS晶体管包括：与横向型MIS晶体管的栅极耦合的线; 该多晶硅电阻器设置在该线路中，并且具有与横向型MIS晶体管的漏极相反的导电类型; 以及绝缘层，横向型MIS晶体管的漏极电压通过该绝缘层施加到多晶硅电阻器。

52. 发明授权

US07671636B2 Switching circuit and driving circuit for transistor 有权
公开(公告)号：US07671636B2
公开(公告)日：2010-03-02
申请号：US11723967
申请日：2007-03-22
申请人： Takaaki Aoki , Shoji Mizuno , Shigeki Takahashi , Takashi Nakano , Nozomu Akagi , Yoshiyuki Hattori , Makoto Kuwahara , Kyoko Okada
发明人： Takaaki Aoki , Shoji Mizuno , Shigeki Takahashi , Takashi Nakano , Nozomu Akagi , Yoshiyuki Hattori , Makoto Kuwahara , Kyoko Okada
IPC分类号： H03K3/00
CPC分类号： H01L27/0629 , H01L27/0255 , H03K17/063 , H03K17/165 , H03K17/168 , H03K17/567 , H03K17/687 , H03K2217/0036
摘要： A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

53. 发明授权

US07388255B2 Semiconductor device having separation region 失效
标题翻译：具有分离区域的半导体器件
公开(公告)号：US07388255B2
公开(公告)日：2008-06-17
申请号：US11598650
申请日：2006-11-14
申请人： Takashi Nakano , Shigeki Takahashi
发明人： Takashi Nakano , Shigeki Takahashi
IPC分类号： H01L29/76
CPC分类号： H01L29/7824 , H01L29/0696 , H01L29/0878 , H01L29/1083 , H01L29/1095 , H01L29/4236 , H01L29/7825
摘要： A semiconductor device includes: a semiconductor substrate; a separation region in the substrate; an embedded layer; a channel forming region; a source region; a drain region; a first electrode for the source region; a second electrode for the channel forming region; a third electrode for the drain region; a trench penetrating the channel forming region between the source region and the drain region; a trench gate electrode in the trench; an offset layer on a portion to be a current path provided by the trench gate electrode; and an electric field relaxation layer under the channel forming region and the offset layer connected to the channel forming region and covering a bottom of the trench.
摘要翻译：半导体器件包括：半导体衬底; 衬底中的分离区域; 嵌入层; 通道形成区域; 源区; 漏区; 用于源区的第一电极; 用于沟道形成区域的第二电极; 用于漏区的第三电极; 穿过源极区域和漏极区域之间的沟道形成区域的沟槽; 沟槽中的沟槽栅电极; 由沟槽栅电极提供的作为电流路径的部分上的偏移层; 以及在沟道形成区域下方的电场弛豫层，并且偏移层连接到沟道形成区域并覆盖沟槽的底部。

54. 发明申请

US20080012610A1 Switching circuit and driving circuit for transistor 有权
标题翻译：晶体管开关电路和驱动电路
公开(公告)号：US20080012610A1
公开(公告)日：2008-01-17
申请号：US11723967
申请日：2007-03-22
申请人： Takaaki Aoki , Shoji Mizuno , Shigeki Takahashi , Takashi Nakano , Nozomu Akagi , Yoshiyuki Hattori , Makoto Kuwahara , Kyoko Okada
发明人： Takaaki Aoki , Shoji Mizuno , Shigeki Takahashi , Takashi Nakano , Nozomu Akagi , Yoshiyuki Hattori , Makoto Kuwahara , Kyoko Okada
IPC分类号： H03K3/00 , H03K17/00
CPC分类号： H01L27/0629 , H01L27/0255 , H03K17/063 , H03K17/165 , H03K17/168 , H03K17/567 , H03K17/687 , H03K2217/0036
摘要： A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.
摘要翻译：开关电路包括：具有第一电极，第二电极和控制电极的晶体管; 齐纳二极管; 和电容器。第一电极和第二电极之间的连接能够通过切换晶体管的控制电压来暂时地在状态和非导通状态之间切换。齐纳二极管和电容器串联耦合在晶体管的第一电极和控制电极之间。第一电极是漏极或集电极。

55. 发明申请

US20070167066A1 Connector in which two housings holding a cable are firmly engaged with each other 有权
标题翻译：连接器，其中保持电缆的两个壳体彼此牢固地接合
公开(公告)号：US20070167066A1
公开(公告)日：2007-07-19
申请号：US11645467
申请日：2006-12-26
申请人： Seiichi Hara , Kiminobu Tabata , Takeshi Kai , Tsutomu Fukui , Masaru Shinmura , Tadashi Inazu , Shigeki Takahashi
发明人： Seiichi Hara , Kiminobu Tabata , Takeshi Kai , Tsutomu Fukui , Masaru Shinmura , Tadashi Inazu , Shigeki Takahashi
IPC分类号： H01R13/58
CPC分类号： H01R13/582
摘要： A connector includes two housings coupled with each other to hold a cable therebetween. One of the housings includes a cable receiving portion for receiving the cable, a restricting portion adjacent to the cable receiving portion, a first wall portion formed outside the restricting portion and defining a space between the first wall portion and the restricting portion, and a first engaging portion inwardly protruding from the first wall portion. Another of the housings includes a cable pressing portion for pressing the cable towards the cable receiving portion and the restricting portion, and a second wall portion formed adjacent to the cable pressing portion and inserted into the space. The second wall portion has a second engaging portion extending outward from the second wall portion. The first and the second engaging potions are engaged with each other to prevent the housings from separating from each other.
摘要翻译：连接器包括彼此联接以在其间保持电缆的两个壳体。其中一个壳体包括用于接收电缆的电缆接收部分，与电缆接收部分相邻的限制部分，形成在限制部分外部并限定第一壁部分和限制部分之间的空间的第一壁部分，以及第一接合部从第一壁部向内突出。另一个壳体包括用于将电缆朝向电缆接收部分和限制部分按压的电缆按压部分，以及邻近电缆按压部分形成并插入到该空间中的第二壁部分。第二壁部具有从第二壁部向外延伸的第二接合部。第一和第二接合部分彼此接合以防止壳体彼此分离。

56. 发明授权

US07183802B2 Semiconductor output circuit 有权
标题翻译：半导体输出电路
公开(公告)号：US07183802B2
公开(公告)日：2007-02-27
申请号：US11079517
申请日：2005-03-15
申请人： Yoshinori Arashima , Hirofumi Abe , Shigeki Takahashi
发明人： Yoshinori Arashima , Hirofumi Abe , Shigeki Takahashi
IPC分类号： H03K19/0175
CPC分类号： H03K17/0822 , H01L27/0266 , H01L29/0696 , H01L29/7816
摘要： The semiconductor output circuit of the invention has an insulated gate transistor including a first terminal, a second terminal and a gate terminal, a conductive state of the insulated gate transistor being controlled by a drive circuit connected to the gate terminal, a capacitive element and a first resistor connected in series between the second terminal and the gate terminal, and a second resistor connected between the gate terminal and the first terminal. The insulated gate transistor has a cell area formed on a semiconductor substrate, in which a plurality of unit cells each defining a unit transistor connected between the first and second terminals are laid out. The second resistor has such a resistance that all of the unit transistors defined by the unit cells are turned on uniformly when electrostatic discharge is applied to the first or second terminal.
摘要翻译：本发明的半导体输出电路具有包括第一端子，第二端子和栅极端子的绝缘栅极晶体管，绝缘栅极晶体管的导通状态由连接到栅极端子的驱动电路，电容元件和第一电阻器串联连接在第二端子和栅极端子之间，第二电阻器连接在栅极端子和第一端子之间。绝缘栅极晶体管具有形成在半导体衬底上的单元区域，其中布置了连接在第一和第二端子之间的单元晶体管的多个单位单元。第二电阻器具有这样的电阻，即当静电放电施加到第一或第二端子时，由单电池限定的所有单位晶体管均匀地导通。

57. 发明申请

US20060204021A1 Controller of graphic equalizer 有权
标题翻译：图形均衡器控制器
公开(公告)号：US20060204021A1
公开(公告)日：2006-09-14
申请号：US11367087
申请日：2006-03-02
申请人： Masaaki Okabayashi , Shigeki Takahashi
发明人： Masaaki Okabayashi , Shigeki Takahashi
IPC分类号： H03G5/00 , H04B3/14 , H01P9/00
CPC分类号： H03G5/025
摘要： An apparatus is provided for controlling a graphic equalizer which is implemented by digital filters, each being assignable to a frequency band for regulating a level of the frequency band. In the apparatus, a set of control devices are provided in correspondence to respective frequency bands, each control device being operable to specify the level of the corresponding frequency band to either of a reference level or other level than the reference level. An assignment section operates when a number of the digital filters is less than a total number of the frequency bands, for assigning the digital filters to the frequency bands which are specified with the levels other than the reference level. A control section controls remaining digital filters which are not assigned to any of the frequency bands in a through state. A disabling section operates when the assignment section assigns all of the digital filters to the frequency bands which are specified with levels other than the reference level, for disabling operation of a control device which currently specifies the reference level.
摘要翻译：提供一种用于控制由数字滤波器实现的图形均衡器的装置，每个滤波器可分配给用于调节频带电平的频带。在该装置中，与各频带相对应地提供一组控制装置，每个控制装置可操作以将相应频带的电平指定为参考电平或与基准电平相比的其它电平。当多个数字滤波器小于频带的总数时，分配部分操作，用于将数字滤波器分配给用除参考电平之外的电平指定的频带。控制部分控制没有分配给通过状态的任何频带的剩余数字滤波器。禁用部分在分配部分将所有数字滤波器分配给以与参考电平以外的电平指定的频带时进行操作，以禁止当前指定参考电平的控制装置的操作。

58. 发明申请

US20060096419A1 Method for reduction treatment of metal oxide or ironmaking waste and method for concentration and recovery zinc and/or lead 有权
标题翻译：金属氧化物或炼铁废物的还原处理方法及锌和/或铅的浓缩和回收方法
公开(公告)号：US20060096419A1
公开(公告)日：2006-05-11
申请号：US10527809
申请日：2003-09-11
申请人： Hiroshi Ichikawa , Tetsuharu Ibaraki , Shoji Imura , Hiroshi Oda , Yoichi Abe , Shigeki Takahashi , Nobuyuki Kanemori , Satoshi Suzuki
发明人： Hiroshi Ichikawa , Tetsuharu Ibaraki , Shoji Imura , Hiroshi Oda , Yoichi Abe , Shigeki Takahashi , Nobuyuki Kanemori , Satoshi Suzuki
IPC分类号： C21B11/06 , C21B13/08
CPC分类号： C21B13/105 , C21B13/006 , C22B1/245 , C22B5/02 , C22B5/10 , C22B7/02 , C22B13/025 , C22B19/30 , C22B19/34 , Y02P10/136 , Y02P10/214 , Y02P10/216 , Y10S75/961
摘要： A method of reduction treatment of metal oxides characterized by using as a material a powder containing metal oxides and containing alkali metals and halogen elements and further, in accordance with need, carbon, mixing said material with water to produce a slurry, then dehydrating this and charging the dehydrated material, mixed with another material in accordance with need, into a rotary hearth type reduction furnace for reduction.
摘要翻译：一种金属氧化物的还原处理方法，其特征在于使用含有金属氧化物并含有碱金属和卤素元素的粉末作为材料，并且根据需要，还可以根据需要使用碳，将所述材料与水混合以产生浆料，然后将其脱水将脱水材料充满，根据需要与另一种材料混合，进入用于还原的旋转炉床式还原炉。

59. 发明申请

US20060034118A1 Magneto-resistance effect element, magnetic memory and magnetic head 有权
标题翻译：磁阻效应元件，磁记忆体和磁头
公开(公告)号：US20060034118A1
公开(公告)日：2006-02-16
申请号：US11202318
申请日：2005-08-12
申请人： Yoshiaki Saito , Katsuya Nishiyama , Shigeki Takahashi
发明人： Yoshiaki Saito , Katsuya Nishiyama , Shigeki Takahashi
IPC分类号： G11C11/00
CPC分类号： H01F10/3254 , B82Y10/00 , B82Y25/00 , G11C11/16 , H01F10/3272 , H01L27/224 , H01L27/228 , H01L43/08
摘要： The magneto-resistance effect element includes: a first ferromagnetic layer serving as a magnetization fixed layer; a magnetization free layer including a second ferromagnetic layer provided on one side of the first ferromagnetic layer, a third ferromagnetic layer which is formed on an opposite side of the second ferromagnetic layer from the first ferromagnetic layer and has a film face having an area larger than that of the second ferromagnetic layer and whose magnetization direction is changeable by an external magnetic field, and an intermediate layer which is provided between the second ferromagnetic layer and the third ferromagnetic layer and which transmits a change of magnetization direction of the third ferromagnetic layer to the second ferromagnetic layer; and a tunnel barrier layer provided between the first ferromagnetic layer and the second ferromagnetic layer.
摘要翻译：磁阻效应元件包括：用作磁化固定层的第一铁磁层; 包含设置在第一铁磁层的一侧上的第二铁磁层的无磁化层，第三铁磁层，其形成在第二铁磁层与第一铁磁层相反的一侧上，并具有面积大于第二铁磁层的磁化方向可由外部磁场变化的中间层，以及设置在第二铁磁层与第三铁磁层之间并将第三铁磁性层的磁化方向的变化向第第二铁磁层; 以及设置在第一铁磁层和第二铁磁层之间的隧道势垒层。

60. 发明授权

US06934184B2 Magnetic memory 失效
标题翻译：磁记忆
公开(公告)号：US06934184B2
公开(公告)日：2005-08-23
申请号：US10893915
申请日：2004-07-20
申请人： Minoru Amano , Tatsuya Kishi , Hiroaki Yoda , Yoshiaki Saito , Shigeki Takahashi , Tomomasa Ueda , Katsuya Nishiyama , Yoshiaki Asao , Yoshihisa Iwata
发明人： Minoru Amano , Tatsuya Kishi , Hiroaki Yoda , Yoshiaki Saito , Shigeki Takahashi , Tomomasa Ueda , Katsuya Nishiyama , Yoshiaki Asao , Yoshihisa Iwata
IPC分类号： H01L27/105 , G11C11/15 , H01L21/8246 , H01L43/08
CPC分类号： G11C11/15
摘要： A highly reliable magnetic memory exhibits enhanced data-holding stability at high storage density in a storage layer of a magnetoresistive effect element used for memory cells. A magnetic memory includes a memory cell array having first wirings, second wirings intersecting the first wirings and memory cells each provided at an intersection area of the corresponding first and second wirings. Each memory cell is selected when the corresponding first and second wirings are selected. Each memory cell includes a magnetoresistive effect element having a storage layer in which data is stored by magnetic fields generated when current flows the selected first and second wirings, a first magnetic member, having two ends, provided as partially surrounding each first wiring and the two ends being situated in a direction of easy axis of magnetization, to form a closed-loop magnetic circuitry with the storage layer, and a second magnetic member, having two ends, provided as partially surrounding each second wiring and the two ends being situated in a direction of hard axis of magnetization, to amplify magnetic fields applied to the storage layer in the direction of hard axis of magnetization. Each end of the first magnetic member is situated as closer than each end of the second magnetic member to the storage layer.
摘要翻译：在用于存储单元的磁阻效应元件的存储层中，高度可靠的磁存储器在高存储密度下表现出增强的数据保持稳定性。磁存储器包括具有第一布线的存储单元阵列，与第一布线相交的第二布线和各自设置在相应的第一布线和第二布线的交叉区域的存储单元。当选择对应的第一和第二布线时，选择每个存储单元。每个存储单元包括磁阻效应元件，其具有存储层，其中当电流流过所选择的第一和第二布线时，通过产生的磁场来存储数据;第一磁性构件，具有设置为部分地包围每个第一布线的两端，端部位于容易的磁化轴的方向上，以形成具有存储层的闭环磁路，以及具有两端的第二磁性构件，其设置为部分地包围每个第二布线，并且两端位于磁化强度轴的方向，放大沿着硬磁化轴的方向施加到存储层的磁场。第一磁性构件的每个端部被定位成比第二磁性构件的每个端部更靠近存储层。

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