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    • 62. 发明授权
    • Semiconductor device and power converter using same
    • 半导体器件和功率转换器使用相同
    • US06198126B1
    • 2001-03-06
    • US09190617
    • 1998-11-12
    • Mutsuhiro MoriYasumichi YasudaHiromi Hosoya
    • Mutsuhiro MoriYasumichi YasudaHiromi Hosoya
    • H01L2358
    • H01L29/404H01L29/408H01L2924/0002H01L2924/00
    • A high voltage semiconductor device is provided with a p layer which forms a main pn-junction, a plurality of p layers which surround the p layer in a ring form, a ring-like n+ layer which further surrounds those p layers, forward field plates extending in the peripheral direction and reverse field plates extending in the inside direction, the field plates being in contact at a low resistance with the p and n+ layers and reaching the surface of an n− layer through an insulating film, the area of the field plates being not less than one half of the n− surface. This arrangement is particularly effective in stabilizing the blocking voltage of a high voltage semiconductor device which is used in a severe environment, and is very effective in improving the reliability of a high voltage control unit.
    • 高电压半导体器件设置有形成主pn结的p层,围绕p层的环状的多个p层,进一步包围p层的环状n +层,向前延伸 在沿着内侧方向延伸的圆周方向和反向场板上,场板以p和n +层以低电阻接触并通过绝缘膜到达n层的表面,场板的面积 不小于n面的一半。 这种布置在稳定在恶劣环境中使用的高电压半导体器件的阻断电压方面特别有效,并且对提高高压控制单元的可靠性非常有效。
    • 67. 发明授权
    • Composite semiconductor device
    • 复合半导体器件
    • US4935799A
    • 1990-06-19
    • US285328
    • 1988-12-13
    • Mutsuhiro MoriTomoyuki TanakaYasumichi Yasuda
    • Mutsuhiro MoriTomoyuki TanakaYasumichi Yasuda
    • H01L27/06H01L21/8249H01L27/07H01L29/73
    • H01L27/0716H01L29/7302
    • Disclosed is a composite semiconductor device which comprises: a second and a third semiconductor regions of a second conductivity type formed in a first semiconductor region of a first conductivity type independently of each other and so as to be exposed on one main surface of a semiconductor substrate; a fourth and a fifth semiconductor regions of the first conductivity type formed in the second semiconductor region independently of each other and so as to be exposed on the one main surface of the semiconductor substrate; a first insulated gate electrode formed on the second semiconductor region located between the fifth and first semiconductor regions and exposed on the one main surface; a second insulated gate electrode formed on the first semiconductor region located between the second and third semiconductor regions and exposed on the one main surface; an electrode which shorts the fourth and third semiconductor regions; another electrode which shorts the second and fifth semiconductor regions; and a further electrode provided in the first semiconductor region.
    • 公开了一种复合半导体器件,其包括:第二导电类型的第二和第三半导体区域形成在第一导电类型的第一半导体区域中,并且彼此独立地暴露在半导体衬底的一个主表面上 ; 第一导电类型的第四和第五半导体区域彼此独立地形成在第二半导体区域中,并暴露在半导体衬底的一个主表面上; 第一绝缘栅电极,形成在位于第五半导体区域和第一半导体区域之间并暴露在一个主表面上的第二半导体区域上; 第二绝缘栅电极,形成在位于第二和第三半导体区之间的第一半导体区上并暴露在一个主表面上; 短路第四和第三半导体区域的电极; 另一个使第二和第五半导体区域短路的电极; 以及设置在所述第一半导体区域中的另一电极。
    • 68. 发明申请
    • Semiconductor Device and Power Converter
    • 半导体器件和电源转换器
    • US20140334212A1
    • 2014-11-13
    • US14364959
    • 2011-12-15
    • Takayuki HashimotoMutsuhiro Mori
    • Takayuki HashimotoMutsuhiro Mori
    • H01L29/739H01L29/10H02M7/537H01L29/88
    • H01L29/7397H01L27/0727H01L29/0834H01L29/1095H01L29/7395H01L29/861H01L29/88H02M7/537
    • A semiconductor device of this invention (an IGBT with a built-in diode) includes: an n−-type drift layer 1; a p-type channel region 2 that is arranged in contact with the surface side of this n−-type drift layer 1; a gate electrode 5 that is provided in a trench T provided so as to penetrate this p-type channel region 2 and reach to the n−-type drift layer 1 through a gate insulating film 3; an n-type source region 4 that is provided so as to contact the trench T on the surface side of the p-type channel region 2; a high-concentration n-type region 6 that is arranged in contact with the back side of the n−-type drift layer 1; and a high-concentration p-type region 7 that is arranged in contact with the back side of this high-concentration n-type region 6; in which a junction of the high-concentration n-type region 6 and the high-concentration p-type region 7 is a tunnel junction. According to this semiconductor device, it is possible to form the IGBT and the diode on a single chip. Moreover, it is possible to avoid problems of “snap back” and “current concentration.”
    • 本发明的半导体器件(具有内置二极管的IGBT)包括:n型漂移层1; 与该n型漂移层1的表面侧接触的p型沟道区域2; 设置在沟槽T中以设置成穿过该p型沟道区域2并通过栅极绝缘膜3到达n型漂移层1的栅电极5; n型源极区域4,其设置成与p型沟道区域2的表面侧的沟槽T接触; 配置成与n型漂移层1的背面接触的高浓度n型区域6; 以及与该高浓度n型区域6的背面接触的高浓度p型区域7; 其中高浓度n型区域6和高浓度p型区域7的结是隧道结。 根据该半导体器件,可以在单个芯片上形成IGBT和二极管。 此外,可以避免“回弹”和“当前集中”的问题。