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1. 发明授权

US08207703B2 Protection device for assembled battery and assembled battery system containing the same 有权
标题翻译：用于组装电池的保护装置和含有该电池的组合电池系统
公开(公告)号：US08207703B2
公开(公告)日：2012-06-26
申请号：US12399154
申请日：2009-03-06
申请人： Daisuke Kurose , Tetsuro Itakura , Yoshinao Tatebayashi , Nobuo Shibuya
发明人： Daisuke Kurose , Tetsuro Itakura , Yoshinao Tatebayashi , Nobuo Shibuya
IPC分类号： H02J7/00
CPC分类号： H02J7/0016 , B60L3/0046 , B60L11/1866 , H02J7/0021 , Y02T10/7005 , Y02T10/7061
摘要： A protection device for an assembled battery includes a sampling capacitor, first switches and second switches to sample the voltages of the battery cells and hold the voltages in the capacitor, a detection unit which detects the voltages of the battery cells based on the voltage sampled by any one of the first switches and the second switches and held on the capacitor and output the detected value, a computing unit which computes an average value of the detected values, a comparator which compares the detected value with the average value so as to obtain a result of comparison indicating a relation in size between the both, and a controller which controls the first switches and the second switches, for the second switches to sample if the detected value obtained by sampling by the first switches is higher than the average value according to the comparison result.
摘要翻译：一种用于组装电池的保护装置包括采样电容器，第一开关和第二开关，以对电池单元的电压进行采样并保持电容器中的电压;检测单元，其基于由第一开关和第二开关中的任一个，并且保持在电容器上并输出检测值，计算单元，其计算检测值的平均值;比较器，将检测值与平均值进行比较，以获得比较结果表示两者之间的尺寸关系，以及控制器，其控制第一开关和第二开关，如果通过第一开关采样获得的检测值高于根据第一开关的平均值，则第二开关进行采样比较结果。

2. 发明授权

US08049509B2 Battery information acquiring apparatus 有权
标题翻译：电池信息获取装置
公开(公告)号：US08049509B2
公开(公告)日：2011-11-01
申请号：US12406451
申请日：2009-03-18
申请人： Hiroki Sakurai , Tetsuro Itakura , Toshiyuki Umeda , Akiko Yamada , Nobuo Shibuya , Yoshinao Tatebayashi , Daisuke Kurose
发明人： Hiroki Sakurai , Tetsuro Itakura , Toshiyuki Umeda , Akiko Yamada , Nobuo Shibuya , Yoshinao Tatebayashi , Daisuke Kurose
IPC分类号： G01N27/416
CPC分类号： H01M10/482 , G01R31/362 , G01R31/3658 , H02J5/00 , H02J5/005 , H02J7/0021 , Y02T10/7055
摘要： A battery information acquiring apparatus includes a voltage acquiring unit which acquires an inter-terminal voltage of the battery cell; a battery information acquiring circuit which acquires battery information of the battery cell with the acquired voltage being supplied as a first power supply voltage and; a radio circuit which transmits a signal of the battery information to the management unit via the antenna with the acquired voltage being supplied as a second power supply voltage and; a rectification circuit which receives a radio signal from the management unit via the antenna, rectify the received radio signal and generate a DC voltage; and a control circuit which controls supply of the first and second power supply voltages to the battery information acquiring circuit and the radio circuit wherein the control circuit operates with the generated DC voltage being supplied as a third power supply voltage.
摘要翻译：电池信息获取装置包括获取电池单元的端子间电压的电压获取单元; 电池信息获取电路，其获取所获取的电压作为第一电源电压的电池信息; 无线电电路，其中获取的电压被提供作为第二电源电压，经由天线将电池信息的信号发送到管理单元; 整流电路，经由天线从管理单元接收无线信号，对接收到的无线信号进行整流，生成直流电压; 以及控制电路，其控制对电池信息获取电路和无线电电路的第一和第二电源电压的供应，其中控制电路以产生的直流电压作为第三电源电压供电。

3. 发明授权

US07839676B2 Magnetic memory device 有权
标题翻译：磁存储器件
公开(公告)号：US07839676B2
公开(公告)日：2010-11-23
申请号：US12407156
申请日：2009-03-19
申请人： Daisuke Kurose , Masanori Furuta , Tsutomu Sugawara
发明人： Daisuke Kurose , Masanori Furuta , Tsutomu Sugawara
IPC分类号： G11C11/14
CPC分类号： G11C11/1693 , G11C11/1673 , G11C11/1675
摘要： A magnetic memory device includes a plurality of word lines, a plurality of bit lines arranged to intersect with the word lines, an MRAM cell array including a plurality of magnetic random access memory (MRAM) cells arranged at intersection portions between the word lines and the bit lines, a read current source which supplies a read current to the MRAM cells in a read mode, a sense amplifier which detects terminal voltages of the MRAM cells generated by the read current to generate a detection output signal, a latch circuit which latches the detection output signal to output read data, and a data write circuit which supplies a write current to the MRAM cells depending on write data in a write mode to perform writing and which supplies the write current to the MRAM cells depending on the read data in the read mode to perform rewriting.
摘要翻译：一种磁存储器件包括多个字线，多个位线布置成与字线相交，MRAM单元阵列包括多个磁性随机存取存储器（MRAM）单元，布置在字线和位线，以读取模式向MRAM单元提供读取电流的读取电流源，检测由读取电流产生的MRAM单元的端子电压以产生检测输出信号的读出放大器，锁存电路检测输出信号以输出读取数据;以及数据写入电路，其根据写入模式中的写入数据向MRAM单元提供写入电流，以执行写入，并根据读取的数据将写入电流提供给MRAM单元读取模式进行重写。

4. 发明申请

US20100054034A1 READ CIRCUIT AND READ METHOD 有权
标题翻译：读取电路和读取方法
公开(公告)号：US20100054034A1
公开(公告)日：2010-03-04
申请号：US12547945
申请日：2009-08-26
申请人： Masanori Furuta , Daisuke KUROSE , Tsutomu SUGAWARA
发明人： Masanori Furuta , Daisuke KUROSE , Tsutomu SUGAWARA
IPC分类号： G11C11/14 , G11C7/22 , G11C7/06
CPC分类号： G11C29/12 , G11C11/1673 , G11C13/004 , G11C27/024 , G11C29/1201 , G11C29/50 , G11C2013/0057
摘要： In a read circuit, a write circuit writes a data to be stored and/or a test data to the memory cell. A control circuit controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase. An integrator integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage. A buffer stores the first integrated voltage. A comparator compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data.
摘要翻译：在读取电路中，写入电路将要存储的数据和/或测试数据写入存储单元。控制电路控制写入电路，以第一阶段将测试数据写入存储单元，并将与第一阶段相同的测试数据写入第二阶段的存储单元。积分器在第一阶段中将存储单元的一个端子处的电压进行积分，以获得第一积分电压，并且在第二阶段期间对存储单元的一个端子处的电压进行积分，以获得第二积分电压。缓冲器存储第一集成电压。比较器比较来自缓冲器的第一集成电压和来自积分器的第二集成电压以获得数据。

5. 发明授权

US07236118B2 Multiple input analog-to-digital conversion apparatus and radio receiver using the same 有权
公开(公告)号：US07236118B2
公开(公告)日：2007-06-26
申请号：US11409569
申请日：2006-04-24
申请人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
发明人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/38
CPC分类号： H03M1/123 , H03M1/0695 , H03M1/1205 , H03M1/44
摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

6. 发明授权

US08682264B2 Digital-to-analog converter and wireless communication apparatus 有权
标题翻译：数模转换器和无线通信装置
公开(公告)号：US08682264B2
公开(公告)日：2014-03-25
申请号：US13238033
申请日：2011-09-21
申请人： Daisuke Kurose
发明人： Daisuke Kurose
IPC分类号： H04B1/02 , H03M1/66
CPC分类号： H01L27/088 , H01L27/0207
摘要： According to one embodiment, a digital-to-analog converter includes a plurality of cells. Each cell includes a current source and a differential switch. The current source includes a first transistor arranged in a first region and connected to either a power source or a ground, a second transistor arranged in a second region which is different from the first region and connected directly or indirectly with the first transistor in a cascode configuration, and a metallic interconnect connecting the first region and the second region electrically. The differential switch includes a pair of transistors, each connected to the second transistor and arranged in the second region.
摘要翻译：根据一个实施例，数模转换器包括多个单元。每个单元包括电流源和差分开关。电流源包括布置在第一区域中并连接到电源或接地的第一晶体管，布置在第二区域中的第二晶体管，该第二区域与第一区域不同，并且与第一晶体管直接或间接连接在共源共栅配置，以及电连接第一区域和第二区域的金属互连。差分开关包括一对晶体管，每个晶体管连接到第二晶体管并且布置在第二区域中。

7. 发明申请

US20120071114A1 DIGITAL-TO-ANALOG CONVERTER AND WIRELESS COMMUNICATION APPARATUS 有权
标题翻译：数字到模拟转换器和无线通信设备
公开(公告)号：US20120071114A1
公开(公告)日：2012-03-22
申请号：US13238033
申请日：2011-09-21
申请人： Daisuke Kurose
发明人： Daisuke Kurose
IPC分类号： H04B1/02 , H03M1/66
CPC分类号： H01L27/088 , H01L27/0207
摘要： According to one embodiment, a digital-to-analog converter includes a plurality of cells. Each cell includes a current source and a differential switch. The current source includes a first transistor arranged in a first region and connected to either a power source or a ground, a second transistor arranged in a second region which is different from the first region and connected directly or indirectly with the first transistor in a cascode configuration, and a metallic interconnect connecting the first region and the second region electrically. The differential switch includes a pair of transistors, each connected to the second transistor and arranged in the second region.
摘要翻译：根据一个实施例，数模转换器包括多个单元。每个单元包括电流源和差分开关。电流源包括布置在第一区域中并连接到电源或接地的第一晶体管，布置在第二区域中的第二晶体管，该第二区域与第一区域不同，并且与第一晶体管直接或间接连接在共源共栅配置，以及电连接第一区域和第二区域的金属互连。差分开关包括一对晶体管，每个晶体管连接到第二晶体管并且布置在第二区域中。

8. 发明申请

US20110149640A1 MAGNETIC STORAGE DEVICE 失效
标题翻译：磁性存储器件
公开(公告)号：US20110149640A1
公开(公告)日：2011-06-23
申请号：US13039633
申请日：2011-03-03
申请人： Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
发明人： Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C7/02 , G11C7/067 , G11C11/1659 , G11C11/1673
摘要： A magnetic storage device includes a plurality of MRAM memory cells connected to a data transfer line, a clamp transistor connected between the data transfer line and a reading signal line and configured to fixedly hold the potential of the data transfer line, and a reading circuit which is connected to the reading signal line and which reads the storage information of the memory cell. The reading circuit includes a hold switch connected between the reading signal line and a reading node N and configured to hold the potential of the node N, a capacitor connected between the node N and a ground end, a precharging switch connected between the node N and a power source and configured to charge the capacitor, and an inverter to which the potential of the node N is input to generate a digital signal.
摘要翻译：磁存储装置包括连接到数据传输线的多个MRAM存储单元，连接在数据传送线和读取信号线之间并被配置为固定地保持数据传输线的电位的钳位晶体管，以及读取电路，连接到读取信号线并读出存储单元的存储信息。读取电路包括连接在读取信号线和读取节点N之间并被配置为保持节点N的电位的保持开关，连接在节点N和接地端之间的电容器，连接在节点N和节点N之间的预充电开关电源，并且被配置为对电容器充电;以及逆变器，输入节点N的电位以产生数字信号。

9. 发明申请

US20100079146A1 BATTERY INFORMATION ACQUIRING APPARATUS 有权
标题翻译：电池信息获取设备
公开(公告)号：US20100079146A1
公开(公告)日：2010-04-01
申请号：US12406534
申请日：2009-03-18
申请人： Daisuke KUROSE , Hiroki SAKURAI , Tetsuro ITAKURA , Yoshinao TATEBAYASHI , Nobuo SHIBUYA , Toshiyuki UMEDA
发明人： Daisuke KUROSE , Hiroki SAKURAI , Tetsuro ITAKURA , Yoshinao TATEBAYASHI , Nobuo SHIBUYA , Toshiyuki UMEDA
IPC分类号： G01N27/416
CPC分类号： G01R31/3658 , B60L3/0046 , B60L11/1864 , B60L2240/545 , B60L2240/547 , B60L2240/549 , G01R31/362 , H01M10/425 , H01M10/482 , H01M10/486 , Y02T10/7005 , Y02T10/7061 , Y02T90/16
摘要： There is an apparatus includes a voltage acquiring unit which acquires an inter-terminal voltage of the battery cell; a battery information acquiring circuit which acquires battery information of the battery cell with the acquired voltage being supplied as a power supply voltage and; a transformer configured to have a primary winding and a secondary winding, the primary winding being connected to a common wire; a communication circuit which transmits a signal of the battery information to a management unit, supplied with the acquired voltage as a power supply voltage; a rectification circuit which rectifies a signal of a predetermined frequency from the management unit to generate a DC voltage; and a control circuit which controls the supply of the power supply voltages to the battery information acquiring circuit and the communication circuit, the control circuit being supplied with the DC voltage as a power supply voltage.
摘要翻译：存在一种装置，包括获取电池单元的端子间电压的电压获取单元; 电池信息获取电路，其获取所获取的电压作为电源电压的电池信息; 被配置为具有初级绕组和次级绕组的变压器，所述初级绕组连接到公共线; 将电池信息的信号发送到管理单元的通信电路，提供所获取的电压作为电源电压; 整流电路，其从所述管理单元整流预定频率的信号，以产生DC电压; 以及控制电路，其控制对电池信息获取电路和通信电路的电源电压的供给，所述控制电路被提供有直流电压作为电源电压。

10. 发明申请

US20090045995A1 COMPARATOR AND ANALOG-TO-DIGITAL CONVERTER USING THE SAME 失效
标题翻译：使用相同的比较器和模拟数字转换器
公开(公告)号：US20090045995A1
公开(公告)日：2009-02-19
申请号：US12175209
申请日：2008-07-17
申请人： Mai NOZAWA , Daisuke Kurose , Takeshi Ueno , Tetsuro Itakura
发明人： Mai NOZAWA , Daisuke Kurose , Takeshi Ueno , Tetsuro Itakura
IPC分类号： H03M1/34
CPC分类号： H03K5/2481 , H03K5/249
摘要： A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.
摘要翻译：比较器包括插入在电源端子和第一可变电阻器的一端之间的第一反相器，包括：第一FinFET，其具有用于接收正相输出信号的第一栅极端子和用于接收时钟的第二栅极端子信号在第一电平和第二电平之间变化，使正相输出信号反相，并输出负相输出信号，并且插入在电源端和第二可变电阻的一端之间的第二反相器包括第二 FinFET具有用于接收负相输出信号的第三栅极端子，用于接收时钟信号的第四栅极端子和与第一FinFET相同的极性，反相负相输出信号，并输出正相输出信号。

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