专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07981773B2 Switchable memory diode—a new memory device 有权
标题翻译：可切换存储二极管 - 新的存储器件
公开(公告)号：US07981773B2
公开(公告)日：2011-07-19
申请号：US12470825
申请日：2009-05-22
申请人： Juri H. Krieger , Stuart Spitzer
发明人： Juri H. Krieger , Stuart Spitzer
IPC分类号： H01L21/20
CPC分类号： G11C11/5664 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/34 , G11C2213/56 , G11C2213/72 , G11C2213/73 , G11C2213/77 , H01L27/285 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0051 , H01L51/0077 , H01L51/0078 , H01L51/0094 , H01L51/0595 , Y10T29/41
摘要： Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.
摘要翻译：提供了系统和方法，用于形成与存储器单元一体的二极管部件，以便于由其创建的存储器单元的编程阵列。这种二极管部件可以是具有不对称半导体性质的无源和有源层的存储器单元的PN结的一部分。这种布置减少了晶体管型电压控制的数量和相关的功率消耗，同时使得能够将单独的存储器单元编程作为无源阵列的一部分。此外，该系统提供了在晶片表面上有效地放置存储器单元，并且增加了可用于电路设计的管芯空间的量。

2. 发明授权

US07307338B1 Three dimensional polymer memory cell systems 有权
标题翻译：三维聚合物记忆体系统
公开(公告)号：US07307338B1
公开(公告)日：2007-12-11
申请号：US10899344
申请日：2004-07-26
申请人： Aaron Mandell , Juri H Krieger , Igor Sokolik , Richard P Kingsborough , Stuart Spitzer
发明人： Aaron Mandell , Juri H Krieger , Igor Sokolik , Richard P Kingsborough , Stuart Spitzer
IPC分类号： H01L23/58
CPC分类号： H01L25/16 , H01L25/0657 , H01L27/285 , H01L51/0575 , H01L51/0591 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Systems and methodologies are provided for forming three dimensional memory structures that are fabricated from blocks of individual polymer memory cells stacked on top of each other. Such a polymer memory structure can be formed on top of control component circuitries employed for programming a plurality of memory cells that form the stacked three dimensional structure. Such an arrangement provides for an efficient placement of polymer memory cell on a wafer surface, and increases amount of die space available for circuit design.
摘要翻译：提供了用于形成三维存储器结构的系统和方法，所述三维存储器结构由堆叠在彼此顶部的单个聚合物存储器单元的块制造。这种聚合物存储器结构可以形成在用于编程形成堆叠三维结构的多个存储单元的控制元件电路之上。这种布置提供聚合物存储器单元在晶片表面上的有效放置，并且增加可用于电路设计的管芯空间的量。

3. 发明授权

US07289353B2 Systems and methods for adjusting programming thresholds of polymer memory cells 有权
标题翻译：用于调整聚合物存储器单元的编程阈值的系统和方法
公开(公告)号：US07289353B2
公开(公告)日：2007-10-30
申请号：US10919846
申请日：2004-08-17
申请人： Stuart Spitzer , Juri H Krieger , David Gaun
发明人： Stuart Spitzer , Juri H Krieger , David Gaun
IPC分类号： G11C11/00 , G11C11/34
CPC分类号： G11C13/0016 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/56
摘要： Systems and methodologies are provided for adjusting threshold associated with a polymer memory cell's operation by applying thereupon a regulated electric field and/or voltage pulse width, during a post fabrication stage. Such customization of programming thresholds can typically be obtained at any cycle of programming the memory cell, to increase flexibility in circuit design. Accordingly, the present invention supplies both a current-voltage domain, and/or a frequency-time domain, to facilitate adjusting the program thresholds of the polymer memory cell.
摘要翻译：提供了系统和方法，用于通过在后制造阶段中施加调节的电场和/或电压脉冲宽度来调整与聚合物存储器单元的操作相关联的阈值。编程阈值的定制通常可以在编程存储器单元的任何周期中获得，以增加电路设计的灵活性。因此，本发明提供电流 - 电压域和/或频率 - 时域，以便于调整聚合物存储单元的程序阈值。

4. 发明申请

US20060175598A1 Memory device including barrier layer for improved switching speed and data retention 有权
公开(公告)号：US20060175598A1
公开(公告)日：2006-08-10
申请号：US11052689
申请日：2005-02-07
申请人： Juri Krieger , Stuart Spitzer
发明人： Juri Krieger , Stuart Spitzer
IPC分类号： H01L47/00
CPC分类号： H01L45/12 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2213/51 , H01L45/085 , H01L45/1233 , H01L45/146
摘要： The present memory device includes a first electrode, a passive layer on and in contact with the first electrode, the passive layer including copper sulfide, a barrier layer on and in contact with the passive layer, an active layer on and in contact with the barrier layer, and a second electrode on and in contact with the active layer. The inclusion of the barrier layer in this environment increases switching speed of the memory device, while also improving data retention thereof.

5. 发明申请

US20060038982A1 Systems and methods for adjusting programming thresholds of polymer memory cells 有权
标题翻译：用于调整聚合物存储器单元的编程阈值的系统和方法
公开(公告)号：US20060038982A1
公开(公告)日：2006-02-23
申请号：US10919846
申请日：2004-08-17
申请人： Stuart Spitzer , Juri Krieger , David Gaun
发明人： Stuart Spitzer , Juri Krieger , David Gaun
IPC分类号： G01B1/00
CPC分类号： G11C13/0016 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/56
摘要： Systems and methodologies are provided for adjusting threshold associated with a polymer memory cell's operation by applying thereupon a regulated electric field and/or voltage pulse width, during a post fabrication stage. Such customization of programming thresholds can typically be obtained at any cycle of programming the memory cell, to increase flexibility in circuit design. Accordingly, the present invention supplies both a current-voltage domain, and/or a frequency-time domain, to facilitate adjusting the program thresholds of the polymer memory cell.
摘要翻译：提供了系统和方法，用于通过在后制造阶段中施加调节的电场和/或电压脉冲宽度来调整与聚合物存储器单元的操作相关联的阈值。编程阈值的定制通常可以在编程存储器单元的任何周期中获得，以增加电路设计的灵活性。因此，本发明提供电流 - 电压域和/或频率 - 时域，以便于调整聚合物存储单元的程序阈值。

6. 发明授权

US07378682B2 Memory element using active layer of blended materials 有权
标题翻译：记忆元素使用有源层的混合材料
公开(公告)号：US07378682B2
公开(公告)日：2008-05-27
申请号：US11052688
申请日：2005-02-07
申请人： David Gaun , Swaroop Kaza , Stuart Spitzer , Juri Krieger , Richard Kingsborough
发明人： David Gaun , Swaroop Kaza , Stuart Spitzer , Juri Krieger , Richard Kingsborough
IPC分类号： H01L51/00
CPC分类号： H01L27/285 , B82Y10/00 , G11C13/0014 , G11C13/0016
摘要： The present memory device has first and second electrodes, a passive layer between the first and second electrodes and on and in contact with the first electrode, and an active layer between the first and second electrodes and on and in contact with the passive layer and second electrode, for receiving a charged specie from the passive layer. The active layer is a mixture of (i) a first polymer, and (ii) a second polymer for enhancing ion transport, improving the interface and promoting a rapid and substantially uniform distribution of the charged specie in the active layer, i.e., preventing a localized injection of the charged species. These features result in a memory element with improved stability, a more controllable ON-state resistance, improved switching speed and a lower programming voltage.
摘要翻译：本存储器件具有第一和第二电极，在第一和第二电极之间并且与第一电极接触并且与第一电极接触的无源层以及在第一和第二电极之间并且与被动层和第二电极接触的有源层电极，用于从被动层接收带电物质。活性层是（i）第一聚合物和（ii）用于增强离子迁移的第二聚合物的混合物，改善界面并促进活性层中带电物质的快速且基本上均匀的分布，即防止局部注射带电物种。这些特征导致存储元件具有改进的稳定性，更可控的导通电阻，改进的开关速度和较低的编程电压。

7. 发明申请

US20070007585A1 Memory device with improved data retention 审中-公开
标题翻译：具有改善数据保留性能的内存设备
公开(公告)号：US20070007585A1
公开(公告)日：2007-01-11
申请号：US11174861
申请日：2005-07-05
申请人： Igor Sokolik , Richard Kingsborough , David Gaun , Swaroop Kaza , Stuart Spitzer , Suzette Pangrle
发明人： Igor Sokolik , Richard Kingsborough , David Gaun , Swaroop Kaza , Stuart Spitzer , Suzette Pangrle
IPC分类号： H01L29/792
CPC分类号： G11C13/0016 , B82Y10/00 , G11C13/0014 , G11C2213/11 , G11C2213/56
摘要： The present memory device includes first and second electrodes, a passive layer between the first and second electrodes and an active layer between the first and second electrodes, the active layer being of a material containing randomly oriented pores which are interconnected to form passages through the active layer.
摘要翻译：本存储器件包括第一和第二电极，第一和第二电极之间的无源层和第一和第二电极之间的有源层，活性层是含有随机取向的孔的材料，其互连以形成通过活性物质的通道层。

8. 发明授权

US07154769B2 Memory device including barrier layer for improved switching speed and data retention 有权
标题翻译：存储器件包括用于提高开关速度和数据保持的阻挡层
公开(公告)号：US07154769B2
公开(公告)日：2006-12-26
申请号：US11052689
申请日：2005-02-07
申请人： Juri Krieger , Stuart Spitzer
发明人： Juri Krieger , Stuart Spitzer
IPC分类号： G11C11/00
CPC分类号： H01L45/12 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2213/51 , H01L45/085 , H01L45/1233 , H01L45/146
摘要： The present memory device includes a first electrode, a passive layer on and in contact with the first electrode, the passive layer including copper sulfide, a barrier layer on and in contact with the passive layer, an active layer on and in contact with the barrier layer, and a second electrode on and in contact with the active layer. The inclusion of the barrier layer in this environment increases switching speed of the memory device, while also improving data retention thereof.
摘要翻译：本存储器件包括第一电极，与第一电极接触并与第一电极接触的钝化层，钝化层包括硫化铜，与钝化层接触并与其接触的阻挡层，与屏障接触并与屏障接触的有源层层，以及与活性层接触并与活性层接触的第二电极。在该环境中包含阻挡层增加了存储器件的切换速度，同时也提高了其数据保持性。

9. 发明授权

US08274073B2 Memory device with improved switching speed and data retention 有权
标题翻译：具有改进的开关速度和数据保持的存储器件
公开(公告)号：US08274073B2
公开(公告)日：2012-09-25
申请号：US11078873
申请日：2005-03-11
申请人： Juri Krieger , Stuart Spitzer
发明人： Juri Krieger , Stuart Spitzer
IPC分类号： H01L29/08
CPC分类号： H01L51/0595 , H01L27/285 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/148 , H01L51/0078
摘要： The present memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the passive layer and the second electrode. In undertaking an operation on the memory device, ions moves into within and from within the active layer, and the active layer is oriented so that the atoms of the active layer provide minimum obstruction to the movement of the ions into, within and from the active layer.
摘要翻译：本存储器件包括第一和第二电极，第一和第二电极之间的无源层以及无源层和第二电极之间的有源层。在对存储器件进行操作时，离子移动到有源层内部和从有源层内移动，并且有源层被定向成使得有源层的原子为离子进入活性层的活动提供了最小的阻碍，层。

10. 发明申请

US20090233422A1 SWITCHABLE MEMORY DIODE - A NEW MEMORY DEVICE 有权
标题翻译：可切换存储器二极管 - 新的存储器件
公开(公告)号：US20090233422A1
公开(公告)日：2009-09-17
申请号：US12470825
申请日：2009-05-22
申请人： Juri H. Krieger , Stuart Spitzer
发明人： Juri H. Krieger , Stuart Spitzer
IPC分类号： H01L21/20 , H01L21/64
CPC分类号： G11C11/5664 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/34 , G11C2213/56 , G11C2213/72 , G11C2213/73 , G11C2213/77 , H01L27/285 , H01L51/0034 , H01L51/0035 , H01L51/0036 , H01L51/0038 , H01L51/0051 , H01L51/0077 , H01L51/0078 , H01L51/0094 , H01L51/0595 , Y10T29/41
摘要： Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.
摘要翻译：提供了系统和方法，用于形成与存储器单元一体的二极管部件，以便于由其创建的存储器单元的编程阵列。这种二极管部件可以是具有不对称半导体性质的无源和有源层的存储器单元的PN结的一部分。这种布置减少了晶体管型电压控制的数量和相关的功率消耗，同时使得能够将单独的存储器单元编程作为无源阵列的一部分。此外，该系统提供了在晶片表面上有效地放置存储器单元，并且增加了可用于电路设计的管芯空间的量。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式