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1. 发明授权

US10020723B1 Power loss protection integrated circuit with autonomous capacitor health check 有权
公开(公告)号：US10020723B1
公开(公告)日：2018-07-10
申请号：US15201288
申请日：2016-07-01
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Brett E. Smith
IPC分类号： H02M1/32 , H01H85/02 , G01R31/36
CPC分类号： H02M1/32 , G01R19/2513 , G01R31/3835 , G05B11/28 , G05B15/02 , G05F1/66 , H01H85/0241 , H02H3/08 , H02J9/061 , H02M1/08 , H02M3/156 , H02M3/158 , H02M3/1582 , H02M3/1588 , H02M2001/0009 , H03M1/122 , H03M1/765
摘要： A power loss protection integrated circuit includes a storage capacitor terminal (STR), an autonomous capacitor health check circuit, and a capacitor fault terminal (CF). The capacitor health check circuit autonomously performs periodic capacitor check operations. In a check operation, current is sinked from the STR terminal for a predetermined time and in a predetermined way. If during this time the voltage on the STR terminal STR drops below a predetermined voltage, then a digital signal CF is asserted onto the CF terminal. Immediately following each capacitor check, a charging voltage is driven onto the STR terminal to recharge the external capacitors coupled to the STR terminal. In one example, the integrated circuit further includes a current switch circuit (eFuse) and a buck/boost controller. The capacitor health check circuit is only enabled during normal mode operation of the integrated circuit, and the check circuit disables boost operation during capacitor checks.

2. 发明授权

US10768244B2 Power loss protection integrated circuit with autonomous capacitor health check 有权
公开(公告)号：US10768244B2
公开(公告)日：2020-09-08
申请号：US16030865
申请日：2018-07-10
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Brett E. Smith
IPC分类号： G01R31/64 , H01H85/02 , H02J9/06 , G01R31/3835 , G01R27/26 , G01R31/392 , H02M1/08 , H02M1/32 , H02M3/156 , H02M3/158 , G01R19/25 , G05B11/28 , G05B15/02 , G05F1/66 , H02H3/08 , H03M1/12 , H03M1/76 , H02M1/00
摘要： A power loss protection integrated circuit includes a storage capacitor terminal (STR), an autonomous capacitor health check circuit, and a capacitor fault terminal (CF). The capacitor health check circuit autonomously performs periodic capacitor check operations. In a check operation, current is sinked from the STR terminal for a predetermined time and in a predetermined way. If during this time the voltage on the STR terminal STR drops below a predetermined voltage, then a digital signal CF is asserted onto the CF terminal. Immediately following each capacitor check, a charging voltage is driven onto the STR terminal to recharge the external capacitors coupled to the STR terminal. In one example, the integrated circuit further includes a current switch circuit (eFuse) and a buck/boost controller. The capacitor health check circuit is only enabled during normal mode operation of the integrated circuit, and the check circuit disables boost operation during capacitor checks.

3. 发明授权

US09887628B1 Power loss protection integrated circuit 有权
公开(公告)号：US09887628B1
公开(公告)日：2018-02-06
申请号：US15640402
申请日：2017-06-30
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Hiroshi Watanabe , Brett E. Smith
IPC分类号： H02M1/32 , H02M3/158 , H02M1/08 , H02M3/156 , H02M1/00
CPC分类号： H02M1/32 , G01R19/2513 , G01R31/362 , G05B11/28 , G05B15/02 , G05F1/66 , H01H85/0241 , H02H3/08 , H02J9/061 , H02M1/08 , H02M3/156 , H02M3/158 , H02M3/1582 , H02M3/1588 , H02M2001/0009 , H03M1/122 , H03M1/765
摘要： A power loss protection integrated circuit includes a current switch circuit (eFuse), a VIN terminal, a VOUT terminal, a buck/boost controller, and a storage capacitor terminal STR. The controller is adapted to work: 1) as a boost to take a low voltage from the VOUT terminal and to output a larger charging voltage onto the STR terminal, or 2) as a buck to take a higher voltage from the STR terminal and to buck it down to a lower voltage required on the VOUT terminal. The current switch circuit outputs a digital undervoltage signal (UV) and a digital high current signal (HC). These signals are communicated on-chip to the controller. Asserting UV causes the converter to begin operating in the buck mode. Asserting HC prevents the converter from operating in the boost mode.

4. 发明授权

US09817458B2 Adaptive USB port controller 有权
公开(公告)号：US09817458B2
公开(公告)日：2017-11-14
申请号：US14720968
申请日：2015-05-25
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Narasimhan Trichy , Sanjeeva Pindi
IPC分类号： G06F1/00 , G06F11/30 , G06F1/26
CPC分类号： G06F1/266 , G06F13/385
摘要： An adaptive USB port controller is disclosed. In an exemplary embodiment, a system comprises a source, a power adapter, a USB port controller, a USB plug and cable, and a device. In one example, the device includes a rechargeable battery. After connecting the device to the USB port controller via the USB plug and cable, a reconfigurable module within the USB port controller sets a power mode by: (1) configuring an impedance network to present impedance modes that indicate available power modes, (2) detecting voltages on one or more of the USB conductors in response to each impedance mode, and (3) comparing the detected voltages to reference voltage levels to set one of multiple power modes. The reconfigurable module then controls the power adapter to transfer power according to the determined power mode.

5. 发明授权

US09791482B1 Power integrated circuit with autonomous limit checking of ADC channel measurements 有权
公开(公告)号：US09791482B1
公开(公告)日：2017-10-17
申请号：US15607683
申请日：2017-05-30
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Brett E. Smith , Hiroshi Watanabe
IPC分类号： H01H85/00 , G01R19/25 , G05B15/02 , G05F1/66 , G05B11/28 , H02M1/08 , H02H3/08
CPC分类号： H02M1/32 , G01R19/2513 , G01R31/362 , G05B11/28 , G05B15/02 , G05F1/66 , H01H85/0241 , H02H3/08 , H02J9/061 , H02M1/08 , H02M3/156 , H02M3/158 , H02M3/1582 , H02M3/1588 , H02M2001/0009 , H03M1/122 , H03M1/765
摘要： A power loss protection integrated circuit includes a current switch circuit portion (eFuse) and an autonomous limit checking circuit. The limit checking circuit includes an input analog multiplexer, an ADC, a plurality of capture registers, a state machine, and a flag output terminal. For each capture register, the limit checking circuit further includes an associated lower limit register and an associated upper limit register. The state machine controls the multiplexer and the capture registers so the ADC digitizes voltages on various nodes to the monitored, and stores the results into corresponding capture registers. In integrated circuit has circuitry that allows both a high voltage as well as a high current to be monitored. The value in a capture register is compared to upper and lower limit values. If any capture value is determined to be outside the limits, then a digital flag signal is asserted onto the flag output terminal.

6. 发明授权

US09705402B1 Power loss protection integrated circuit 有权
公开(公告)号：US09705402B1
公开(公告)日：2017-07-11
申请号：US15201265
申请日：2016-07-01
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Brett E. Smith , Hiroshi Watanabe
IPC分类号： H02M3/158 , H02M1/32 , H02M1/08 , H02M3/156 , H02M1/00
CPC分类号： H02M1/32 , G01R19/2513 , G01R31/362 , G05B11/28 , G05B15/02 , G05F1/66 , H01H85/0241 , H02H3/08 , H02J9/061 , H02M1/08 , H02M3/156 , H02M3/158 , H02M3/1582 , H02M3/1588 , H02M2001/0009 , H03M1/122 , H03M1/765
摘要： A power loss protection integrated circuit includes a current switch circuit (eFuse), a VIN terminal, a VOUT terminal, a buck/boost controller, and a storage capacitor terminal STR. The controller is adapted to work: 1) as a boost to take a low voltage from the VOUT terminal and to output a larger charging voltage onto the STR terminal, or 2) as a buck to take a higher voltage from the STR terminal and to buck it down to a lower voltage required on the VOUT terminal. The current switch circuit outputs a digital undervoltage signal (UV) and a digital high current signal (HC). These signals are communicated on-chip to the controller. Asserting UV causes the converter to begin operating in the buck mode. Asserting HC prevents the converter from operating in the boost mode.

7. 发明授权

US09509162B2 Single-stage AC-to-DC switching converter that directly charges a battery requiring a multi-state charging profile 有权
标题翻译：单级AC-DC开关转换器，直接对需要多态充电曲线的电池充电
公开(公告)号：US09509162B2
公开(公告)日：2016-11-29
申请号：US14700363
申请日：2015-04-30
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Hong Mao , Wan Nian Huang
IPC分类号： H02J7/00 , H02M7/30
CPC分类号： H02J7/007 , H02J7/0052 , H02J7/0072 , H02J2007/0059 , H02M3/33523 , H02M7/30 , H02M2001/0009
摘要： A multi-state battery charger includes a single-stage AC-to-DC switching converter, where the single-stage converter receives an AC supply voltage and directly charges a rechargeable battery without there being any intervening second power stage. A novel battery charger controller integrated circuit in the converter's secondary side detects profile selection resistor values, monitors battery voltage, monitors charging current, monitors battery temperature, controls a protection transistor, and sends a control signal back to a PWM in the primary side. The controller includes a flexible preprogrammed digital state machine circuit that is configured to control the converter from charging state to charging state so that the battery is charged in accordance with a selected one of multiple preprogrammed different multi-state battery charging profiles, where at least one of the profiles has at least one CC (constant current) state and one CV (constant voltage) state.
摘要翻译：多状态电池充电器包括单级AC-DC开关转换器，其中单级转换器接收AC电源电压并且直接对可再充电电池充电，而没有任何中间的第二功率级。转换器次级侧的新型电池充电器控制器集成电路检测配置文件选择电阻值，监视电池电压，监视充电电流，监控电池温度，控制保护晶体管，并将控制信号发送回初级PWM。控制器包括灵活的预编程数字状态机电路，其被配置为将转换器从充电状态控制到充电状态，使得根据多个预编程的不同多状态电池充电简档中的所选择的一个来对电池进行充电，其中至少一个的轮廓具有至少一个CC（恒定电流）状态和一个CV（恒定电压）状态。

8. 发明授权

US09721742B1 Power integrated circuit with autonomous limit checking of ADC channel measurements 有权
公开(公告)号：US09721742B1
公开(公告)日：2017-08-01
申请号：US15201233
申请日：2016-07-01
申请人： Active-Semi, Inc.
发明人： John H. Carpenter, Jr. , Brett E. Smith , Hiroshi Watanabe
IPC分类号： H01H85/00 , H01H85/02 , H02J9/06 , H03M1/12
CPC分类号： H02M1/32 , G01R19/2513 , G01R31/362 , G05B11/28 , G05B15/02 , G05F1/66 , H01H85/0241 , H02H3/08 , H02J9/061 , H02M1/08 , H02M3/156 , H02M3/158 , H02M3/1582 , H02M3/1588 , H02M2001/0009 , H03M1/122 , H03M1/765
摘要： A power loss protection integrated circuit includes a current switch circuit portion (eFuse) and an autonomous limit checking circuit. The limit checking circuit includes an input analog multiplexer, an ADC, a plurality of capture registers, a state machine, and a flag output terminal. For each capture register, the limit checking circuit further includes an associated lower limit register and an associated upper limit register. The state machine controls the multiplexer and the capture registers so the ADC digitizes voltages on various nodes to the monitored, and stores the results into corresponding capture registers. In integrated circuit has circuitry that allows both a high voltage as well as a high current to be monitored. The value in a capture register is compared to upper and lower limit values. If any capture value is determined to be outside the limits, then a digital flag signal is asserted onto the flag output terminal.

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