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1. 发明授权

US5568651A Method for detection of configuration types and addressing modes of a dynamic RAM 失效
标题翻译：用于检测动态RAM的配置类型和寻址模式的方法
公开(公告)号：US5568651A
公开(公告)日：1996-10-22
申请号：US333809
申请日：1994-11-03
申请人： Eitan Medina , Simoni Ben-Michael , Yifat Ben-Shahar , Niamh Darcy
发明人： Eitan Medina , Simoni Ben-Michael , Yifat Ben-Shahar , Niamh Darcy
IPC分类号： G06F12/06 , H04L12/56 , H04Q11/04 , G06F13/00 , H04L12/28
CPC分类号： G06F12/0684 , H04Q11/0478 , H04L2012/5616 , H04L2012/5681
摘要： A method providing automating detection of configuration between an adapter device and a DRAM device. Such a method a determines, in the adapter memory, the DRAM configuration, making it easier to change DRAM configuration in an existing board without the need to modify configuration pins in the existing board. A method for determining a configuration type in an Asynchronous Transfer Mode (ATM) communications network comprising the steps of providing an ATM adapter, the ATM adapter having an ATM adapter memory, providing a DRAM device, the DRAM device having a DRAM configuration, providing a link to connect the ATM adapter and the DRAM device, assuming, in the ATM adapter memory, a first DRAM configuration, verifying the step of assuming, and repeating the steps of assuming and verifying until the first DRAM configuration is determined.
摘要翻译：一种提供在适配器装置和DRAM装置之间自动检测配置的方法。这种方法a在适配器存储器中确定DRAM配置，使得更容易地改变现有板中的DRAM配置，而不需要修改现有板中的配置引脚。一种用于确定异步传输模式（ATM）通信网络中的配置类型的方法，包括以下步骤：提供ATM适配器，所述ATM适配器具有ATM适配器存储器，提供DRAM设备，所述DRAM设备具有DRAM配置，链接以连接ATM适配器和DRAM设备，假设在ATM适配器存储器中，第一DRAM配置，验证假设的步骤，并且重复假定和验证的步骤直到确定第一DRAM配置。

2. 发明授权

US6078565A Method and apparatus to expand an on chip FIFO into local memory 失效
标题翻译：将片上FIFO扩展到本地存储器的方法和装置
公开(公告)号：US6078565A
公开(公告)日：2000-06-20
申请号：US879359
申请日：1997-06-20
申请人： Simoni Ben-Michael , Michael Ben-Nun , Yifat Ben-Shahar
发明人： Simoni Ben-Michael , Michael Ben-Nun , Yifat Ben-Shahar
IPC分类号： H04Q3/00 , G06F5/06 , H04L12/56 , H04Q11/04 , H04L12/28 , H04J1/16
CPC分类号： H04L12/5602 , G06F5/06 , H04Q11/0478 , H04L2012/5679 , H04L2012/5681
摘要： A relatively small FIFO queue is located on a semiconductor chip receiving and transmitting data in a computer system, typically a computer network. The FIFO queue has additional storage capability in the form of an expansion into the local memory of the computer system. The front and back ends of the FIFO, which are involved in receiving and transmitting data, are implemented on the chip. The FIFO expands into the space provided in the local memory only when the on-chip portion of the FIFO is full. The middle portion of the FIFO resides in expansion in the local memory. The local memory is accessed only in bursts of multiple credits, both for read transactions and for write transactions.
摘要翻译：相对较小的FIFO队列位于半导体芯片上，在计算机系统（通常为计算机网络）中接收和发送数据。 FIFO队列具有扩展到计算机系统的本地存储器形式的附加存储能力。涉及数据接收和发送的FIFO的前端和后端都在芯片上实现。只有当FIFO的片上部分已满时，FIFO才会扩展到本地存储器中提供的空间。 FIFO的中间部分驻留在本地存储器中。本地内存只能以多个学分的突发访问，无论是读取事务还是写入事务。

3. 发明授权

US6145102A Transmission of an error message over a network by a computer which fails a self-test 失效
标题翻译：由自动测试失败的计算机通过网络传输错误消息
公开(公告)号：US6145102A
公开(公告)日：2000-11-07
申请号：US9084
申请日：1998-01-20
申请人： Philippe Klein , Simoni Ben-Michael , Avraham Menachem , Sarit Shvimmer
发明人： Philippe Klein , Simoni Ben-Michael , Avraham Menachem , Sarit Shvimmer
IPC分类号： G06F11/07 , G06F11/22 , G06F11/20 , G01R31/38
CPC分类号： G06F11/0784 , G06F11/0745 , G06F11/0748 , G06F11/2284
摘要： A computer may have a management bus installed, where the management bus is coupled to sensors which monitor status of components of the computer. The management bus may also be coupled to a management bus processor, where the management bus processor receives status information from the management bus concerning status of components of the computer. An interface between the management bus and the network subsystem permits transmission of an error message in the event that the computer has a failure which inactivates the system CPU, the system bus, the system memory, or the system power supply.
摘要翻译：计算机可以安装管理总线，其中管理总线耦合到监测计算机的组件的状态的传感器。管理总线也可以耦合到管理总线处理器，其中管理总线处理器从管理总线接收关于计算机的组件的状态的状态信息。管理总线和网络子系统之间的接口允许在计算机具有使系统CPU，系统总线，系统存储器或系统电源无效的故障的情况下发送错误消息。

4. 发明申请

US20120117348A1 TECHNIQUES FOR SECURITY MANAGEMENT PROVISIONING AT A DATA STORAGE DEVICE 有权
标题翻译：用于在数据存储设备上提供安全管理的技术
公开(公告)号：US20120117348A1
公开(公告)日：2012-05-10
申请号：US12941915
申请日：2010-11-08
申请人： Nicholas D. Triantafillou , Paritosh Saxena , Robert W. Strong , Richard J. Heiler , Eliezer Tamir , Simoni Ben-Michael , Brad W. Stewart , Akshay R. Kadam , Men Long , James T. Doyle , Hormuzd M. Khosravi , Lokpraveen B. Mosur , Edward J. Pullin , Paul S. Schmitz , Carol L. Barrett , Paul J. Thadikaran
发明人： Nicholas D. Triantafillou , Paritosh Saxena , Robert W. Strong , Richard J. Heiler , Eliezer Tamir , Simoni Ben-Michael , Brad W. Stewart , Akshay R. Kadam , Men Long , James T. Doyle , Hormuzd M. Khosravi , Lokpraveen B. Mosur , Edward J. Pullin , Paul S. Schmitz , Carol L. Barrett , Paul J. Thadikaran
IPC分类号： G06F12/14
CPC分类号： G06F21/566
摘要： Techniques for a data storage device to locally implement security management functionality. In an embodiment, a security management process of the data storage device is to determine whether an access to non-volatile media of the data storage device is authorized. In certain embodiments, the data storage device is to restrict access to a secure region of the non-volatile storage media, the secure region to store information used and/or generated by a security management process of the data storage device.
摘要翻译：用于数据存储设备本地实现安全管理功能的技术。在一个实施例中，数据存储设备的安全管理过程是确定对数据存储设备的非易失性介质的访问是否被授权。在某些实施例中，数据存储设备将限制对非易失性存储介质的安全区域的访问，该安全区域用于存储由数据存储设备的安全管理过程使用和/或生成的信息。

5. 发明授权

US07302055B1 Discharging envelope detector 失效
标题翻译：放电包络检测器
公开(公告)号：US07302055B1
公开(公告)日：2007-11-27
申请号：US09516337
申请日：2000-03-01
申请人： Lior Horwitz , Noam Avni , Simoni Ben-Michael
发明人： Lior Horwitz , Noam Avni , Simoni Ben-Michael
IPC分类号： H04M1/00 , H04M9/00
CPC分类号： H04L12/2803 , H04L2012/2845
摘要： A receiver to detect pulses on a home phone wiring network using envelope detection. The receiver comprises an integrating capacitor charged by a first current source responsive to a differential signal propagated on the wiring network, and discharged by a FET in combination with a second current source. The combination of the FET and the second current source allows the capacitor to be quickly discharged in a smooth fashion. An application of this receiver is for a PHY according to the Home Phoneline Networking Alliance.
摘要翻译：使用信封检测在家用电话线路网络中检测脉冲的接收器。接收机包括由第一电流源充电的积分电容器，响应于在布线网络上传播的差分信号，并且由FET与第二电流源组合放电。 FET和第二电流源的组合允许电容器以平滑的方式快速放电。该接收机的应用是根据家庭电话网络联盟的PHY。

6. 发明授权

US5649110A Traffic shaping system with virtual circuit table time stamps for asynchronous transfer mode networks 失效
标题翻译：具有用于异步传输模式网络的虚拟电路表时间戳的流量整形系统
公开(公告)号：US5649110A
公开(公告)日：1997-07-15
申请号：US335281
申请日：1994-11-07
申请人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon , Peter John Roman , Kadangode K. Ramakrishnan , G. Paul Koning
发明人： Michael Ben-Nun , Simoni Ben-Michael , Moshe De-Leon , Peter John Roman , Kadangode K. Ramakrishnan , G. Paul Koning
IPC分类号： H04L12/56 , G06F3/00
CPC分类号： H04L12/5602 , H04L2012/5679 , H04L2012/568
摘要： A system for controlling the transmission of cells from a network node over multiple virtual circuit is disclosed. The disclosed system performs traffic shaping for all virtual circuits connected with the network node. The system includes a virtual circuit table with one or more entries. Each virtual circuit table entry corresponds to a virtual circuit established with the network node. Each virtual circuit table further includes one or more Cell Rate Accumulator fields and a Time Stamp field. The system includes a schedule table having one or more entries. Each schedule table entry further includes one or more Cell Rate Accumulator fields and corresponding predetermined value fields. A schedule table loading process determines a virtual circuit on which a packet is to be transmitted, and then calculates a time elapsed since a last previous write of a virtual circuit table entry corresponding with that virtual circuit. The schedule table loading process then adds the time elapsed to the value of the Cell Rate Accumulator fields in that virtual circuit table entry, and stores the result of the addition into the corresponding Cell Rate Accumulator fields of the schedule table entry. The system further includes a process for periodically incrementing the Cell Rate Accumulator fields in the schedule table entry. A scanning process periodically increments the Cell Rate Accumulator fields. A transmitting process transmits a cell on the virtual circuit when the value of the Cell Rate Accumulator fields is greater than or equal to the corresponding predetermined values.
摘要翻译：公开了一种用于通过多个虚拟电路来控制来自网络节点的小区的传输的系统。所公开的系统对与网络节点连接的所有虚拟电路执行流量整形。该系统包括具有一个或多个条目的虚拟电路表。每个虚拟电路表条目对应于与网络节点建立的虚拟电路。每个虚拟电路表还包括一个或多个单元速率累加器字段和时间戳字段。该系统包括具有一个或多个条目的日程表。每个调度表条目还包括一个或多个信元速率累加器字段和对应的预定值字段。调度表加载过程确定要在其上发送分组的虚拟电路，然后计算自上一次写入与该虚拟电路相对应的虚拟电路表条目以来经过的时间。调度表加载过程然后将经过的时间加到该虚拟电路表条目中的单元速率累加器字段的值，并将相加的结果存储到调度表条目的相应的单元速率累加器字段中。系统还包括用于周期地增加调度表条目中的信元速率累加器字段的过程。扫描过程周期性地增加单元速率累加器字段。当小区费率累加器字段的值大于或等于相应的预定值时，发送处理在虚拟电路上发送小区。

7. 发明授权

US09064116B2 Techniques for security management provisioning at a data storage device 有权
标题翻译：在数据存储设备上进行安全管理配置的技术
公开(公告)号：US09064116B2
公开(公告)日：2015-06-23
申请号：US12941915
申请日：2010-11-08
申请人： Nicholas D. Triantafillou , Paritosh Saxena , Robert W. Strong , Richard J. Heiler , Eliezer Tamir , Simoni Ben-Michael , Brad W. Stewart , Akshay R. Kadam , Men Long , James T. Doyle , Hormuzd M. Khosravi , Lokpraveen B. Mosur , Edward J. Pullin , Paul S. Schmitz , Carol L. Barrett , Paul J. Thadikaran
发明人： Nicholas D. Triantafillou , Paritosh Saxena , Robert W. Strong , Richard J. Heiler , Eliezer Tamir , Simoni Ben-Michael , Brad W. Stewart , Akshay R. Kadam , Men Long , James T. Doyle , Hormuzd M. Khosravi , Lokpraveen B. Mosur , Edward J. Pullin , Paul S. Schmitz , Carol L. Barrett , Paul J. Thadikaran
IPC分类号： G06F12/00 , G06F21/56
CPC分类号： G06F21/566
摘要： Techniques for a data storage device to locally implement security management functionality. In an embodiment, a security management process of the data storage device is to determine whether an access to non-volatile media of the data storage device is authorized. In certain embodiments, the data storage device is to restrict access to a secure region of the non-volatile storage media, the secure region to store information used and/or generated by a security management process of the data storage device.
摘要翻译：用于数据存储设备本地实现安全管理功能的技术。在一个实施例中，数据存储设备的安全管理过程是确定对数据存储设备的非易失性介质的访问是否被授权。在某些实施例中，数据存储设备将限制对非易失性存储介质的安全区域的访问，该安全区域用于存储由数据存储设备的安全管理过程使用和/或生成的信息。

8. 发明申请

US20140059266A1 METHODS AND APPARATUS FOR SHARING A NETWORK INTERFACE CONTROLLER 有权
标题翻译：用于共享网络接口控制器的方法和装置
公开(公告)号：US20140059266A1
公开(公告)日：2014-02-27
申请号：US13593591
申请日：2012-08-24
申请人： Simoni Ben-Michael , Eliel Louzoun
发明人： Simoni Ben-Michael , Eliel Louzoun
IPC分类号： G06F13/20
CPC分类号： G06F13/385 , G06F13/14 , Y02D10/14 , Y02D10/151
摘要： Methods, apparatus, and systems for enhancing communication between compute resources and networks in a micro-server environment. Micro-server modules configured to be installed in a server chassis include a plurality of processor subsystems coupled in communication to a shared Network Interface Controller (NIC) via PCIe links. The shared NIC includes at least one Ethernet port and a PCIe block including a shared PCIe interface having a first number of lanes. The PCIe lines between the processor sub-systems and the shared PCIe interface employ a number of lanes that is less than the first number of lanes, and during operation of the micro-server module, the shared NIC is configured to enable each processor sub-system to access the at least one Ethernet port using the PCIe link between that processor sub-system and the shared PCIe block on the shared NIC.
摘要翻译：用于增强微服务器环境中的计算资源和网络之间的通信的方法，装置和系统。被配置为安装在服务器机箱中的微服务器模块包括经由PCIe链路与通信到共享网络接口控制器（NIC）耦合的多个处理器子系统。共享NIC包括至少一个以太网端口和PCIe块，其包括具有第一数量车道的共享PCIe接口。处理器子系统和共享PCIe接口之间的PCIe线路使用少于第一通道数量的通道，并且在微服务器模块的操作期间，共享NIC被配置为使得每个处理器子系统系统使用该处理器子系统与共享NIC上的共享PCIe块之间的PCIe链路访问至少一个以太网端口。

9. 发明授权

US6134665A Computer with remote wake up and transmission of a status packet when the computer fails a self test 失效
标题翻译：计算机具有远程唤醒和当计算机自检失败时传送状态数据包
公开(公告)号：US6134665A
公开(公告)日：2000-10-17
申请号：US9809
申请日：1998-01-20
申请人： Philippe Klein , Simoni Ben-Michael , Avraham Menachem , Sarit Shvimmer
发明人： Philippe Klein , Simoni Ben-Michael , Avraham Menachem , Sarit Shvimmer
IPC分类号： G06F1/32 , H04L12/12 , H04L12/407 , H04L29/14 , E06F1/26
CPC分类号： H04L12/10 , G06F1/3209 , H04L12/12 , H04L69/40 , H04L12/40032 , Y02B60/34 , Y02B60/35
摘要： An apparatus for use in a computer has a network interface subsystem having power applied thereto when power is removed from other components of the computer. A receiver in the network interface subsystem receives a packet directed to the computer from the network, and in response to receipt of a selected packet, restores power to the other components of the computer. Upon restoration of power to the other components of the computer, a signalling device reports status of at least one of the other components of the computer to the network interface subsystem. A transmitter in the network interface subsystem sends, in response to the signalling device, a status packet onto the network giving a status of the computer in the event that a component is not functional, following restoration of power to the other components of the computer. The computer has a processor which executes a self test upon restoration of power to the processor, and a self test signalling device to signal to the network interface subsystem the results of the self test, to initiate transmission of a status packet by the network interface onto the network in the event that the computer fails the self test. The signalling device may be a management bus, and the management bus may operate under the I2C protocol. The receiver uses imperfect filtering to identify a wake up packet, and also may use a mask in performing imperfect filtering.
摘要翻译：用于计算机的装置具有网络接口子系统，当从计算机的其它部件移除电源时，该网络接口子系统具有施加到其上的功率。网络接口子系统中的接收机从网络接收指向计算机的分组，并且响应于接收到所选择的分组，恢复计算机的其他组件的电力。当恢复到计算机的其他部件的电力时，信令装置将计算机的其他部件中的至少一个的状态报告给网络接口子系统。网络接口子系统中的发射机在恢复对计算机的其他部件的电源之后，响应于信令装置向网络发送状态分组，该状态分组在组件不起作用的情况下给出计算机的状态。计算机具有处理器，其在恢复对处理器的电力时执行自检;以及自检信号装置，向网络接口子系统发信号通知自测试结果，以启动由网络接口传送状态分组到计算机无法自检的情况下的网络。信令设备可以是管理总线，并且管理总线可以在I2C协议下操作。接收机使用不完美的过滤来识别唤醒分组，并且也可以在执行不完美的过滤时使用掩码。

10. 发明授权

US06085328A Wake up of a sleeping computer using I/O snooping and imperfect packet filtering 失效
标题翻译：使用I / O监听和不完美的包过滤唤醒睡眠电脑
公开(公告)号：US06085328A
公开(公告)日：2000-07-04
申请号：US9788
申请日：1998-01-20
申请人： Philippe Klein , Simoni Ben-Michael
发明人： Philippe Klein , Simoni Ben-Michael
IPC分类号： G06F1/32 , H04L12/12 , G06F1/30
CPC分类号： G06F1/3209 , H04L12/12 , Y02B60/32 , Y02B60/34
摘要： A reliable and simple means to awaken sleeping computers is to maintain the network interface subsystem at full power, and to filter detected packets so that when desired packets are detected, full power is restored to the entire computer. An interface to connect a computer to a network is provided, where, the computer has a high power state and a low power state, and the computer is capable of normal operation when in the high power state, and the computer is substantially inactivated when in the low power state. A packet is received from the network. The packet is filtered by computing a hash function using at least one byte selected from the packet. A transition is initiated, responsive to a result of filtering the packet, to transition the computer from the low power state to the high power state. A mask may be used to select the at least one byte. Several bytes may be selected by the mask. A first register may be used to hold the mask. A second register may be used to hold a desired result of the hash function calculation. A result of the hash function calculation is compared with a contents of the second register to determine whether or not the result of the hash function calculation matches the contents of the second register. A perfect filtering or a second hash function filtering may be combined by AND or NOT logical operations, in making the decision whether or not to awaken the computer.
摘要翻译：唤醒睡眠电脑的可靠而简单的方法是将网络接口子系统维持在全功率状态，并对所检测到的数据包进行过滤，以便在需要时检测到数据包，从而恢复整个计算机的全部电源。提供将计算机连接到网络的接口，其中计算机具有高功率状态和低功率状态，并且当处于高功率状态时，计算机能够正常操作，并且当计算机在低功率状态。从网络接收到数据包。通过使用从分组中选择的至少一个字节计算散列函数来过滤分组。响应于过滤分组的结果，启动转换，以将计算机从低功率状态转换到高功率状态。可以使用掩码来选择至少一个字节。掩码可以选择几个字节。可以使用第一寄存器来保持掩码。可以使用第二寄存器来保持散列函数计算的期望结果。将散列函数计算的结果与第二寄存器的内容进行比较，以确定散列函数计算的结果是否与第二寄存器的内容匹配。完美过滤或第二散列函数滤波可以通过AND或NOT逻辑运算来组合，以决定是否唤醒计算机。

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