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1. 发明申请

US20110141788A1 PAGE REGISTER OUTSIDE ARRAY AND SENSE AMPLIFIER INTERFACE 有权
标题翻译：页面寄存器外部阵列和感测放大器接口
公开(公告)号：US20110141788A1
公开(公告)日：2011-06-16
申请号：US12638719
申请日：2009-12-15
申请人： Gopinath Balakrishnan , Jeffrey Koon Yee Lee , Yuheng Zhang , Tz-Yi Liu , Luca Fasoli
发明人： Gopinath Balakrishnan , Jeffrey Koon Yee Lee , Yuheng Zhang , Tz-Yi Liu , Luca Fasoli
IPC分类号： G11C5/02 , G11C11/00 , G11C7/18
CPC分类号： G11C5/025 , B82Y10/00 , G11C5/02 , G11C13/0002 , G11C13/0007 , G11C13/025 , G11C17/16 , G11C2213/19 , G11C2213/32 , G11C2213/33 , G11C2213/34 , G11C2213/71
摘要： A non-volatile storage device includes a substrate, a monolithic three-dimensional memory array of non-volatile storage elements arranged above a portion of the substrate, a plurality of sense amplifiers in communication with the non-volatile storage elements, a plurality of temporary storage devices in communication with the sense amplifiers, a page register in communication with the temporary storage devices, and one or more control circuits. The one or more control circuits are in communication with the page register, the temporary storage devices and the sense amplifiers. The sense amplifiers are arranged on the substrate underneath the monolithic three-dimensional memory array. The temporary storage devices are arranged on the substrate underneath the monolithic three-dimensional memory array. The page register is arranged on the substrate in an area that is not underneath the monolithic three-dimensional memory array. Data read from the non-volatile storage elements by the sense amplifiers is transferred to the temporary storage devices and then to the page register in response to the one or more control circuits. Data to be programmed into the non-volatile storage elements is transferred to the temporary storage devices from the page register in response to the one or more control circuits.
摘要翻译：非易失性存储装置包括衬底，布置在衬底的一部分上方的非易失性存储元件的单片三维存储器阵列，与非易失性存储元件通信的多个读出放大器，多个临时与读出放大器通信的存储装置，与临时存储装置通信的页寄存器，以及一个或多个控制电路。一个或多个控制电路与页寄存器，临时存储设备和读出放大器通信。读出放大器布置在单片三维存储器阵列下方的衬底上。临时存储装置布置在单片三维存储器阵列下面的衬底上。页面寄存器在不在单片三维存储器阵列下方的区域中布置在基板上。由感测放大器从非易失性存储元件读取的数据响应于一个或多个控制电路传送到临时存储设备，然后传送到页寄存器。要编程到非易失性存储元件中的数据响应于一个或多个控制电路从页寄存器传送到临时存储设备。

2. 发明授权

US08223525B2 Page register outside array and sense amplifier interface 有权
标题翻译：页面寄存器外部阵列和读出放大器接口
公开(公告)号：US08223525B2
公开(公告)日：2012-07-17
申请号：US12638719
申请日：2009-12-15
申请人： Gopinath Balakrishnan , Jeffrey Koon Yee Lee , Yuheng Zhang , Tz-Yi Liu , Luca Fasoli
发明人： Gopinath Balakrishnan , Jeffrey Koon Yee Lee , Yuheng Zhang , Tz-Yi Liu , Luca Fasoli
IPC分类号： G11C5/06
CPC分类号： G11C5/025 , B82Y10/00 , G11C5/02 , G11C13/0002 , G11C13/0007 , G11C13/025 , G11C17/16 , G11C2213/19 , G11C2213/32 , G11C2213/33 , G11C2213/34 , G11C2213/71
摘要： A non-volatile storage device includes a substrate, a monolithic three-dimensional memory array of non-volatile storage elements arranged above a portion of the substrate, a plurality of sense amplifiers in communication with the non-volatile storage elements, a plurality of temporary storage devices in communication with the sense amplifiers, a page register in communication with the temporary storage devices, and one or more control circuits. The one or more control circuits are in communication with the page register, the temporary storage devices and the sense amplifiers. The sense amplifiers are arranged on the substrate underneath the monolithic three-dimensional memory array. The temporary storage devices are arranged on the substrate underneath the monolithic three-dimensional memory array. The page register is arranged on the substrate in an area that is not underneath the monolithic three-dimensional memory array. Data read from the non-volatile storage elements by the sense amplifiers is transferred to the temporary storage devices and then to the page register in response to the one or more control circuits. Data to be programmed into the non-volatile storage elements is transferred to the temporary storage devices from the page register in response to the one or more control circuits.
摘要翻译：非易失性存储装置包括衬底，布置在衬底的一部分上方的非易失性存储元件的单片三维存储器阵列，与非易失性存储元件通信的多个读出放大器，多个临时与读出放大器通信的存储装置，与临时存储装置通信的页寄存器，以及一个或多个控制电路。一个或多个控制电路与页寄存器，临时存储设备和读出放大器通信。读出放大器布置在单片三维存储器阵列下方的衬底上。临时存储装置布置在单片三维存储器阵列下面的衬底上。页面寄存器在不在单片三维存储器阵列下方的区域中布置在基板上。由感测放大器从非易失性存储元件读取的数据响应于一个或多个控制电路传送到临时存储设备，然后传送到页寄存器。要编程到非易失性存储元件中的数据响应于一个或多个控制电路从页寄存器传送到临时存储设备。

3. 发明授权

US08213243B2 Program cycle skip 有权
标题翻译：程序循环跳过
公开(公告)号：US08213243B2
公开(公告)日：2012-07-03
申请号：US12638729
申请日：2009-12-15
申请人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
发明人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C5/02 , G11C13/0007 , G11C13/0061 , G11C17/165 , G11C17/18 , G11C2013/0076 , G11C2013/0085 , G11C2213/71
摘要： A non-volatile storage system includes technology for skipping programming cycles while programming a page (or other unit) of data. While programming a current subset of the page (or other unit) of data, the system will evaluate whether the next subsets of the page (or other unit) of data should be programmed into non-volatile storage elements or skipped. Subsets of the page (or other unit) of data that should not be skipped are programmed into non-volatile storage elements. Some embodiments include transferring the appropriate data to temporary latches/registers, in preparation for programming, concurrently with the evaluation of whether to program or skip the programming.
摘要翻译：非易失性存储系统包括在编程页面（或其他单元）数据时跳过编程周期的技术。在对页面（或其他单元）数据的当前子集进行编程时，系统将评估页面（或其他单元）的下一个子集是否应编程为非易失性存储元素或跳过。不应被跳过的页面（或其他单元）的子集被编程到非易失性存储元件中。一些实施例包括将适当数据传送到临时锁存器/寄存器，以准备编程，同时评估是编程还是跳过编程。

4. 发明申请

US20120236663A1 PROGRAM CYCLE SKIP 有权
标题翻译：程序循环跳
公开(公告)号：US20120236663A1
公开(公告)日：2012-09-20
申请号：US13488600
申请日：2012-06-05
申请人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
发明人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C5/02 , G11C13/0007 , G11C13/0061 , G11C17/165 , G11C17/18 , G11C2013/0076 , G11C2013/0085 , G11C2213/71
摘要： A non-volatile storage system includes technology for skipping programming cycles while programming a page (or other unit) of data. While programming a current subset of the page (or other unit) of data, the system will evaluate whether the next subsets of the page (or other unit) of data should be programmed into non-volatile storage elements or skipped. Subsets of the page (or other unit) of data that should not be skipped are programmed into non-volatile storage elements. Some embodiments include transferring the appropriate data to temporary latches/registers, in preparation for programming, concurrently with the evaluation of whether to program or skip the programming.
摘要翻译：非易失性存储系统包括在编程页面（或其他单元）数据时跳过编程周期的技术。在对页面（或其他单元）数据的当前子集进行编程时，系统将评估页面（或其他单元）的下一个子集是否应编程为非易失性存储元素或跳过。不应被跳过的页面（或其他单元）的子集被编程到非易失性存储元件中。一些实施例包括将适当数据传送到临时锁存器/寄存器，以准备编程，同时评估是编程还是跳过编程。

5. 发明授权

US08427890B2 Program cycle skip 有权
标题翻译：程序循环跳过
公开(公告)号：US08427890B2
公开(公告)日：2013-04-23
申请号：US13488609
申请日：2012-06-05
申请人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
发明人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C5/02 , G11C13/0007 , G11C13/0061 , G11C17/165 , G11C17/18 , G11C2013/0076 , G11C2013/0085 , G11C2213/71
摘要： A non-volatile storage system includes technology for skipping programming cycles while programming a page (or other unit) of data. While programming a current subset of the page (or other unit) of data, the system will evaluate whether the next subsets of the page (or other unit) of data should be programmed into non-volatile storage elements or skipped. Subsets of the page (or other unit) of data that should not be skipped are programmed into non-volatile storage elements. Some embodiments include transferring the appropriate data to temporary latches/registers, in preparation for programming, concurrently with the evaluation of whether to program or skip the programming.
摘要翻译：非易失性存储系统包括在编程页面（或其他单元）数据时跳过编程周期的技术。在对页面（或其他单元）数据的当前子集进行编程时，系统将评估页面（或其他单元）的下一个子集是否应编程为非易失性存储元素或跳过。不应被跳过的页面（或其他单元）的子集被编程到非易失性存储元件中。一些实施例包括将适当数据传送到临时锁存器/寄存器，以准备编程，同时评估是编程还是跳过编程。

6. 发明授权

US08395948B2 Program cycle skip 有权
公开(公告)号：US08395948B2
公开(公告)日：2013-03-12
申请号：US13488600
申请日：2012-06-05
申请人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
发明人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C5/02 , G11C13/0007 , G11C13/0061 , G11C17/165 , G11C17/18 , G11C2013/0076 , G11C2013/0085 , G11C2213/71
摘要： A non-volatile storage system includes technology for skipping programming cycles while programming a page (or other unit) of data. While programming a current subset of the page (or other unit) of data, the system will evaluate whether the next subsets of the page (or other unit) of data should be programmed into non-volatile storage elements or skipped. Subsets of the page (or other unit) of data that should not be skipped are programmed into non-volatile storage elements. Some embodiments include transferring the appropriate data to temporary latches/registers, in preparation for programming, concurrently with the evaluation of whether to program or skip the programming.

7. 发明申请

US20120243349A1 PROGRAM CYCLE SKIP 有权
公开(公告)号：US20120243349A1
公开(公告)日：2012-09-27
申请号：US13488609
申请日：2012-06-05
申请人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
发明人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
IPC分类号： G11C7/00
CPC分类号： G11C13/0069 , G11C5/02 , G11C13/0007 , G11C13/0061 , G11C17/165 , G11C17/18 , G11C2013/0076 , G11C2013/0085 , G11C2213/71
摘要： A non-volatile storage system includes technology for skipping programming cycles while programming a page (or other unit) of data. While programming a current subset of the page (or other unit) of data, the system will evaluate whether the next subsets of the page (or other unit) of data should be programmed into non-volatile storage elements or skipped. Subsets of the page (or other unit) of data that should not be skipped are programmed into non-volatile storage elements. Some embodiments include transferring the appropriate data to temporary latches/registers, in preparation for programming, concurrently with the evaluation of whether to program or skip the programming.

8. 发明申请

US20110141832A1 PROGRAM CYCLE SKIP 有权
标题翻译：程序循环跳
公开(公告)号：US20110141832A1
公开(公告)日：2011-06-16
申请号：US12638729
申请日：2009-12-15
申请人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
发明人： Gopinath Balakrishnan , Luca Fasoli , Tz-Yi Liu , Yuheng Zhang , Yan Li
IPC分类号： G11C11/416 , G11C7/10
CPC分类号： G11C13/0069 , G11C5/02 , G11C13/0007 , G11C13/0061 , G11C17/165 , G11C17/18 , G11C2013/0076 , G11C2013/0085 , G11C2213/71
摘要： A non-volatile storage system includes technology for skipping programming cycles while programming a page (or other unit) of data. While programming a current subset of the page (or other unit) of data, the system will evaluate whether the next subsets of the page (or other unit) of data should be programmed into non-volatile storage elements or skipped. Subsets of the page (or other unit) of data that should not be skipped are programmed into non-volatile storage elements. Some embodiments include transferring the appropriate data to temporary latches/registers, in preparation for programming, concurrently with the evaluation of whether to program or skip the programming.
摘要翻译：非易失性存储系统包括在编程页面（或其他单元）数据时跳过编程周期的技术。在对页面（或其他单元）数据的当前子集进行编程时，系统将评估页面（或其他单元）的下一个子集是否应编程为非易失性存储元素或跳过。不应被跳过的页面（或其他单元）的子集被编程到非易失性存储元件中。一些实施例包括将适当数据传送到临时锁存器/寄存器，以准备编程，同时评估是编程还是跳过编程。

9. 发明授权

US06842380B2 Method and apparatus for erasing memory 有权
标题翻译：擦除存储器的方法和装置
公开(公告)号：US06842380B2
公开(公告)日：2005-01-11
申请号：US10228597
申请日：2002-08-27
申请人： Vinod Lakhani , Tz-Yi Liu
发明人： Vinod Lakhani , Tz-Yi Liu
IPC分类号： G11C16/16 , G11C16/04
CPC分类号： G11C16/16
摘要： The present invention provides a method and apparatus for erasing memory blocks. The apparatus includes a first plurality of memory cells formed in a substrate and a second plurality of memory cells formed in the substrate. The apparatus further includes a bias circuit adapted to provide an erasing voltage differential to the first plurality of memory cells and a compensating voltage differential to the second plurality of memory cells, wherein the erasing voltage differential is larger than the compensating voltage differential.
摘要翻译：本发明提供一种擦除存储块的方法和装置。该装置包括形成在基板中的第一多个存储单元和形成在基板中的第二多个存储单元。该装置还包括偏置电路，其适于向第一多个存储单元提供擦除电压差，以及向第二多个存储单元提供补偿电压差，其中擦除电压差大于补偿电压差。

10. 发明申请

US20120236624A1 Balanced Method for Programming Multi-Layer Cell Memories 有权
标题翻译：用于编程多层单元存储器的平衡方法
公开(公告)号：US20120236624A1
公开(公告)日：2012-09-20
申请号：US13051885
申请日：2011-03-18
申请人： Xiying Costa , Yibo Nian , Roy Scheuerlein , Tz-Yi Liu , Chandrasekhar Reddy Gorla
发明人： Xiying Costa , Yibo Nian , Roy Scheuerlein , Tz-Yi Liu , Chandrasekhar Reddy Gorla
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/56 , G11C11/5664 , G11C11/5678 , G11C11/5685 , G11C13/0007 , G11C13/0064 , G11C2013/0071 , G11C2013/0073 , G11C2013/0076 , G11C2013/0092 , G11C2213/32
摘要： Improved methods for programming multi-level metal oxide memory cells balance applied voltage and current to provide improved performance. Set programming, which transitions the memory cell to a lower resistance state, is accomplished by determining an appropriate programming voltage and current limit for the objective resistance state to be achieved in the programming and then applying a pulse having the determined set electrical characteristics. Reset programming, which transitions the memory cell to a higher resistance state, is accomplished by determining an appropriate programming voltage and optionally current limit for the state to be achieved in the programming and then applying a pulse having the determined electrical characteristics. The algorithm used to determine the appropriate set or reset programming voltage and current values provides for effective programming without stressing the memory element. The electrical characteristics for programming pulses may be stored in a data table used in a table look up algorithm.
摘要翻译：改进的多级金属氧化物存储单元的编程方法平衡施加的电压和电流，以提供更好的性能。通过为编程中要实现的目标电阻状态确定适当的编程电压和电流限制，然后施加具有确定的设定电气特性的脉冲来实现将存储器单元转换到较低电阻状态的设置编程。将存储器单元转换到较高电阻状态的复位编程通过确定编程中要实现的状态的适当编程电压和可选的电流限制，然后施加具有确定的电特性的脉冲来实现。用于确定适当的设置或复位编程电压和电流值的算法提供有效的编程，而不会对存储元件造成影响。编程脉冲的电气特性可以存储在表查找算法中使用的数据表中。

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