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1. 发明申请

US20130128660A1 READING METHOD OF NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件的读取方法
公开(公告)号：US20130128660A1
公开(公告)日：2013-05-23
申请号：US13475204
申请日：2012-05-18
申请人： Hyun-Seung YOO , Sung-Joo HONG , Seiichi ARITOME , Seok-Kiu LEE , Sung-Kye PARK , Gyu-Seog CHO , Eun-Seok CHOI , Han-Soo JOO
发明人： Hyun-Seung YOO , Sung-Joo HONG , Seiichi ARITOME , Seok-Kiu LEE , Sung-Kye PARK , Gyu-Seog CHO , Eun-Seok CHOI , Han-Soo JOO
IPC分类号： G11C16/04 , G11C16/26
CPC分类号： G11C16/0483 , G11C16/26 , G11C16/3418
摘要： A reading method of a non-volatile memory device that includes a plurality memory cells that each include one floating gate and two control gates disposed adjacent to the floating gate on two alternate sides of the floating gate, respectively, and two adjacent memory cells share one control gate, the reading method comprising applying a read voltage to control gates of a selected memory cell, applying a second pass voltage to alternate control gates of the memory cells different from the control gates of the selected memory cells starting from the control gates next to the selected memory cell, and applying a first pass voltage that is lower than the second pass voltage to alternate the control gates of the memory cells different from the control gates of the selected memory cells starting from the control gates secondly next to the selected memory cell.
摘要翻译：一种非易失性存储器件的读取方法，包括分别包括一个浮动栅极和两个控制栅极的多个存储器单元，两个控制栅极分别与浮置栅极的两个交替侧相邻设置，并且两个相邻的存储单元共享一个所述读取方法包括将读取电压施加到所选择的存储器单元的控制栅极，将第二通过电压施加到与所选择的存储器单元的控制栅极不同的存储单元的控制栅极的替代控制栅极，所述存储器单元从控制栅极开始，所选择的存储单元，以及施加低于第二通过电压的第一通过电压，以从控制栅极开始的第二选择的存储单元开始，将不同于所选存储单元的控制栅极的存储单元的控制栅极交替。

2. 发明申请

US20120299076A1 NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20120299076A1
公开(公告)日：2012-11-29
申请号：US13304551
申请日：2011-11-25
申请人： Hyun-Seung YOO , Eun-Seok Choi
发明人： Hyun-Seung YOO , Eun-Seok Choi
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： A nonvolatile memory device includes a channel vertically extending from a substrate and comprising a first region that is doped with first impurities and a second region that is disposed under the first region, a plurality of memory cells and a selection transistor stacked over the substrate along the channel, and a diffusion barrier interposed between the first region and the second region, wherein a density of the first impurities is higher than a density of impurities of the second region.
摘要翻译：非易失性存储器件包括从衬底垂直延伸并包括掺杂有第一杂质的第一区和设置在第一区下的第二区的通道，多个存储单元和选择晶体管沿着衬底沿堆叠在衬底上通道和插入在第一区域和第二区域之间的扩散阻挡层，其中第一杂质的密度高于第二区域的杂质密度。

3. 发明申请

US20120213009A1 NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US20120213009A1
公开(公告)日：2012-08-23
申请号：US13398397
申请日：2012-02-16
申请人： Seiichi ARITOME , Hyun-Seung YOO , Sung-Jin WHANG
发明人： Seiichi ARITOME , Hyun-Seung YOO , Sung-Jin WHANG
IPC分类号： G11C16/14 , H01L29/788
CPC分类号： G11C16/14 , G11C16/0408 , H01L27/11556 , H01L27/11582
摘要： A nonvolatile memory device includes a channel vertically extending from a substrate, a plurality of memory cells stacked along the channel; a source region connected to a first end portion of the channel, and a bit line connected to a second end portion of the channel, wherein the first end portion of the channel that adjoins the source region is formed as an undoped semiconductor layer or a semiconductor layer doped with P-type impurities.
摘要翻译：非易失性存储器件包括从衬底垂直延伸的沟道，沿着沟道堆叠的多个存储单元; 连接到所述沟道的第一端部的源极区域和与所述沟道的第二端部连接的位线，其中与所述源极区域相邻的所述沟道的所述第一端部形成为未掺杂的半导体层或半导体层掺杂有P型杂质。

4. 发明申请

US20130234234A1 NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20130234234A1
公开(公告)日：2013-09-12
申请号：US13607050
申请日：2012-09-07
申请人： Hyun-Seung YOO
发明人： Hyun-Seung YOO
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66833 , H01L27/11582 , H01L29/7926
摘要： A method for fabricating a non-volatile memory device includes forming a stacked structure where a plurality of inter-layer dielectric layers and a plurality of second sacrificial layers are alternately stacked over a substrate, forming a channel layer that is coupled with a portion of the substrate by penetrating through the stacked structure, forming a slit that penetrates through the second sacrificial layers by selectively etching the stacked structure, removing the second sacrificial layers that are exposed through the slit, forming an epitaxial layer over the channel layer exposed as a result of the removal of the second sacrificial layers, and forming a gate electrode layer filling a space from which the second sacrificial layers are removed, and a memory layer interposed between the gate electrode layer and the epitaxial layer.
摘要翻译：一种用于制造非易失性存储器件的方法包括形成层叠结构，其中多个层间电介质层和多个第二牺牲层交替堆叠在衬底上，形成沟道层，该沟道层与通过穿过层叠结构形成穿过第二牺牲层的狭缝，通过选择性地蚀刻层叠结构，去除通过狭缝暴露的第二牺牲层，在通过暴露的通道层上形成外延层，作为由去除第二牺牲层，以及形成填充去除第二牺牲层的空间的栅电极层，以及插入在栅电极层和外延层之间的存储层。

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