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1. 发明申请

US20140223210A1 Tunable Sector Buffer for Wide Bandwidth Resonant Global Clock Distribution 有权
标题翻译：用于宽带宽共振全局时钟分配的可调谐扇区缓冲区
公开(公告)号：US20140223210A1
公开(公告)日：2014-08-07
申请号：US13759646
申请日：2013-02-05
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Thomas J. Bucelot , Alan J. Drake , Robert A. Groves , Jason D. Hibbeler , Yong I. Kim , Liang-Teck Pang , William R. Reohr , Phillip J. Restle , Michael G.R. Thomson
IPC分类号： G06F1/10 , G06F1/32
CPC分类号： G06F1/10 , G06F1/324 , Y02D10/126
摘要： A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.
摘要翻译：宽带谐振时钟分布包括被配置为将时钟信号分配给集成电路的多个分量的时钟网格和被配置为接收时钟信号并向时钟网格提供输出的可调谐扇区缓冲器。可调谐扇区缓冲器被配置为基于所识别的谐振或非谐振模式来设置时钟信号的延迟和转换速率。

2. 发明申请

US20140173229A1 Method and Apparatus for Automated Migration of Data Among Storage Centers 有权
公开(公告)号：US20140173229A1
公开(公告)日：2014-06-19
申请号：US13717216
申请日：2012-12-17
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： William R. Reohr , Birgit M. Pfitzmann , Kevin M. Kingsbury , Laura A. Richardson , Peter Urbanetz , William B. Yoes
IPC分类号： G06F3/06
CPC分类号： G06F3/067 , G06F3/0611 , G06F3/0647 , H04L67/1097 , H04L67/2852
摘要： A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at least one ruleset for determining where to store the dataset; obtaining information regarding a demand for the dataset through one or more data requesting entities operating in the global storage system; and determining, as a function of the ruleset, information regarding a location for storing the dataset among regional storage centers having available resources that reduces the total distance traversed by the dataset in serving at least a given one of the data requesting entities and/or reduces the latency of delivery of the dataset to the given one of the data requesting entities.

3. 发明申请

US20140167832A1 CHANGING RESONANT CLOCK MODES 有权
标题翻译：改变时钟模式
公开(公告)号：US20140167832A1
公开(公告)日：2014-06-19
申请号：US13719408
申请日：2012-12-19
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Thomas J. Bucelot , Alan Drake , Joshua D. Friedrich , Jason D. Hibbeler , Liang-Teck Pang , William R. Reohr , Phillip John Restle , Gregory S. Still , Michael G.R. Thomson
IPC分类号： H03K3/00
CPC分类号： G06F1/10
摘要： Described is an integrated circuit having a clock distribution network capable of transitioning from a non-resonant clock mode to a first resonant clock mode Transitions between clock modes or between various resonant clock frequencies are done gradually over a series of clock cycles. In example, when transitioning from a non-resonant clock mode to a first resonant clock mode, a strength of a clock sector driver is reduced over a series of clock cycles, and individual ones of a plurality of resonant switches associated with resonant circuits are modified in coordination with reducing the strength of the clock sector driver.
摘要翻译：描述了具有能够从非共振时钟模式转换到第一谐振时钟模式的时钟分配网络的集成电路。在一系列时钟周期内，逐渐完成在时钟模式之间或各种谐振时钟频率之间的转换。例如，当从非共振时钟模式转换到第一谐振时钟模式时，时钟扇区驱动器的强度在一系列时钟周期内减小，并且与谐振电路相关联的多个谐振开关中的各个谐振开关被修改协调减少时钟扇区驱动程序的实力。

4. 发明授权

US09317223B2 Method and apparatus for automated migration of data among storage centers 有权
公开(公告)号：US09317223B2
公开(公告)日：2016-04-19
申请号：US13717216
申请日：2012-12-17
申请人： International Business Machines Corporation
发明人： William R. Reohr , Birgit M. Pfitzmann , Kevin M. Kingsbury , Laura A. Richardson , Peter Urbanetz , William B. Yoes
IPC分类号： G06F12/00 , G06F3/06 , H04L29/08
CPC分类号： G06F3/067 , G06F3/0611 , G06F3/0647 , H04L67/1097 , H04L67/2852
摘要： A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at least one ruleset for determining where to store the dataset; obtaining information regarding a demand for the dataset through one or more data requesting entities operating in the global storage system; and determining, as a function of the ruleset, information regarding a location for storing the dataset among regional storage centers having available resources that reduces the total distance traversed by the dataset in serving at least a given one of the data requesting entities and/or reduces the latency of delivery of the dataset to the given one of the data requesting entities.

5. 发明授权

US08887118B2 Setting switch size and transition pattern in a resonant clock distribution system 有权
标题翻译：在谐振时钟分配系统中设置开关尺寸和转换模式
公开(公告)号：US08887118B2
公开(公告)日：2014-11-11
申请号：US13773854
申请日：2013-02-22
申请人： International Business Machines Corporation
发明人： Jason D. Hibbeler , William R. Reohr , Phillip J. Restle
IPC分类号： G06F17/50
CPC分类号： G06F17/5009 , G06F17/5045 , G06F17/5068 , G06F2217/62 , G06F2217/78 , H03K5/00 , H03K2005/00195
摘要： Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.
摘要翻译：提供了时钟分配网络中的回收能量。一种方法包括创建包括时钟网格的谐振时钟电路。该方法还包括提供分布在时钟网格中的谐振结构。该方法还包括提供控制谐振结构以在非谐振模式和谐振模式之间切换的开关。该方法还包括确定通过迭代地增加开关的尺寸来最小化谐振时钟电路的功耗的开关尺寸，并且对于每个迭代增加的尺寸，确定谐振时钟电路消耗的功率。

6. 发明授权

US08736342B1 Changing resonant clock modes 有权
标题翻译：改变谐振时钟模式
公开(公告)号：US08736342B1
公开(公告)日：2014-05-27
申请号：US13719408
申请日：2012-12-19
申请人： International Business Machines Corporation
发明人： Thomas J. Bucelot , Alan Drake , Joshua D. Friedrich , Jason D. Hibbeler , Liang-Teck Pang , William R. Reohr , Phillip John Restle , Gregory S. Still , Michael G. R. Thomson
IPC分类号： G06F1/10
CPC分类号： G06F1/10
摘要： Described is an integrated circuit having a clock distribution network capable of transitioning from a non-resonant clock mode to a first resonant clock mode Transitions between clock modes or between various resonant clock frequencies are done gradually over a series of clock cycles. In example, when transitioning from a non-resonant clock mode to a first resonant clock mode, a strength of a clock sector driver is reduced over a series of clock cycles, and individual ones of a plurality of resonant switches associated with resonant circuits are modified in coordination with reducing the strength of the clock sector driver.
摘要翻译：描述了具有能够从非共振时钟模式转换到第一谐振时钟模式的时钟分配网络的集成电路。在一系列时钟周期内，逐渐完成在时钟模式之间或各种谐振时钟频率之间的转换。例如，当从非共振时钟模式转换到第一谐振时钟模式时，时钟扇区驱动器的强度在一系列时钟周期内减小，并且与谐振电路相关联的多个谐振开关中的各个谐振开关被修改协调减少时钟扇区驱动程序的实力。

7. 发明授权

US08850373B2 Setting switch size and transition pattern in a resonant clock distribution system 有权
公开(公告)号：US08850373B2
公开(公告)日：2014-09-30
申请号：US14136770
申请日：2013-12-20
申请人： International Business Machines Corporation
发明人： Jason D. Hibbeler , William R. Reohr , Phillip J. Restle
IPC分类号： G06F17/50
CPC分类号： G06F17/5009 , G06F17/5045 , G06F17/5068 , G06F2217/62 , G06F2217/78 , H03K5/00 , H03K2005/00195
摘要： Recycling energy in a clock distribution network is provided. A method includes creating a resonant clocking circuit including a clock grid. The method further includes providing resonant structures distributed in the clock grid. The method further includes providing switches that control the resonant structures to switch between a non-resonant mode and a resonant mode. The method further includes determining a switch size that minimizes power consumption of the resonant clocking circuit by iteratively increasing sizes of the switches and, for each iterative increase in size, determining power consumed by the resonant clocking circuit.

8. 发明申请

US20140218087A1 Wide Bandwidth Resonant Global Clock Distribution 有权
标题翻译：宽带宽共振全局时钟分配
公开(公告)号：US20140218087A1
公开(公告)日：2014-08-07
申请号：US13759311
申请日：2013-02-05
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Thomas J. Bucelot , Alan J. Drake , Robert A. Groves , Jason D. Hibbeler , Yong I. Kim , Liang-Teck Pang , William R. Reohr , Phillip J. Restle , Michael G.R. Thomson
IPC分类号： H03K5/06
CPC分类号： H03K5/06 , G06F1/10
摘要： A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit, a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid, at least one inductor, at least one tunable resistance switch, and a capacitor network. The tunable sector buffer is programmable to set latency and slew rate of the clock signal. The inductor, tunable resistance switch, and capacitor network are connected between the clock grid and a reference voltage. The at least one tunable resistance switch is programmable to dynamically switch the at least one inductor in or out of the clock distribution to effect at least one resonant mode of operation or a non-resonant mode of operation based on a frequency of the clock signal.
摘要翻译：宽带谐振时钟分配包括被配置为将时钟信号分配给集成电路的多个分量的时钟网格，配置成接收时钟信号并向时钟网格提供输出的可调谐扇区缓冲器，至少一个电感器，至少一个可调谐电阻开关和电容器网络。可调谐扇区缓冲器可编程设置时钟信号的延时和转换速率。电感，可调电阻开关和电容网络连接在时钟网格和参考电压之间。所述至少一个可调谐电阻开关是可编程的，以基于所述时钟信号的频率，将所述至少一个电感器动态地切换到所述时钟分布中或者从所述时钟分布中产生至少一个谐振模式或非谐振模式。

9. 发明申请

US20140173232A1 Method and Apparatus for Automated Migration of Data Among Storage Centers 有权
标题翻译：存储中心数据自动迁移的方法和装置
公开(公告)号：US20140173232A1
公开(公告)日：2014-06-19
申请号：US13970357
申请日：2013-08-19
申请人： International Business Machines Corporation
发明人： William R. Reohr , Birgit M. Pfitzmann , Kevin M. Kingsbury , Laura A. Richardson , Peter Urbanetz , William B. Yoes
IPC分类号： G06F3/06
CPC分类号： G06F3/067 , G06F3/0611 , G06F3/0647 , H04L67/1097 , H04L67/2852
摘要： A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at least one ruleset for determining where to store the dataset; obtaining information regarding a demand for the dataset through one or more data requesting entities operating in the global storage system; and determining, as a function of the ruleset, information regarding a location for storing the dataset among regional storage centers having available resources that reduces the total distance traversed by the dataset in serving at least a given one of the data requesting entities and/or reduces the latency of delivery of the dataset to the given one of the data requesting entities.
摘要翻译：提供一种用于控制通过全球存储系统中的网络耦合的多个区域存储中心之间的数据存储的方法。该方法包括以下步骤：定义包括存储在全局存储系统中的数据的至少一个子集的至少一个数据集; 定义至少一个规则集，用于确定在哪里存储数据集; 通过在全局存储系统中操作的一个或多个数据请求实体获取关于数据集的需求的信息; 以及确定作为所述规则集的函数的关于用于在具有可用资源的区域存储中心之间存储所述数据集的位置的信息，所述可用资源减少所述数据集在至少给定的一个所述数据请求实体中服务时所经过的总距离和/或减少将数据集传送给给定的一个数据请求实体的延迟。

10. 发明授权

US09612612B2 Tunable sector buffer for wide bandwidth resonant global clock distribution 有权
公开(公告)号：US09612612B2
公开(公告)日：2017-04-04
申请号：US14706166
申请日：2015-05-07
申请人： International Business Machines Corporation
发明人： Thomas J. Bucelot , Alan J. Drake , Robert A. Groves , Jason D. Hibbeler , Yong I. Kim , Liang-Teck Pang , William R. Reohr , Phillip J. Restle , Michael G. R. Thomson
IPC分类号： H03K3/00 , G06F1/10 , G06F1/04
CPC分类号： G06F1/10 , G06F1/324 , Y02D10/126
摘要： A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.

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