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1. 发明授权

US07551035B2 Fast converter for crossing voltage domains 有权
标题翻译：用于交叉电压域的快速转换器
公开(公告)号：US07551035B2
公开(公告)日：2009-06-23
申请号：US11508966
申请日：2006-08-24
申请人： Jan Roelof Westra , Franciscus Maria Leonardus van der Goes , Erol Arslan
发明人： Jan Roelof Westra , Franciscus Maria Leonardus van der Goes , Erol Arslan
IPC分类号： H03F3/04
CPC分类号： H03F3/343
摘要： A voltage domain crossing circuit and method are disclosed. In one embodiment, the voltage domain crossing circuit comprises an AC coupling component, a DC biasing component and a high voltage output amplifier. The AC coupling component receives an input low voltage signal and AC couples and splits the signal into two voltages. The two voltages are then DC biased to a predetermined bias voltage using the DC biasing component. The high voltage output amplifier then amplifies the biased voltages in the high voltage domain yielding a signal in the high voltage domain. Other embodiments of the voltage domain crossing circuit and method are also disclosed.
摘要翻译：公开了一种电压域交叉电路和方法。在一个实施例中，电压域交叉电路包括AC耦合部件，DC偏置部件和高压输出放大器。 AC耦合组件接收输入低电压信号，并且AC将信号分离成两个电压。然后使用DC偏置组件将两个电压直流偏置到预定的偏置电压。然后，高电压输出放大器放大高电压域中的偏置电压，产生高电压域中的信号。还公开了电压域交叉电路和方法的其他实施例。

2. 发明申请

US20070182605A1 Fast converter for crossing voltage domains 有权
标题翻译：用于交叉电压域的快速转换器
公开(公告)号：US20070182605A1
公开(公告)日：2007-08-09
申请号：US11508966
申请日：2006-08-24
申请人： Jan Roelof Westra , Franciscus Maria Leonardus van der Goes , Erol Arslan
发明人： Jan Roelof Westra , Franciscus Maria Leonardus van der Goes , Erol Arslan
IPC分类号： H03M1/06
CPC分类号： H03F3/343
摘要： A voltage domain crossing circuit and method are disclosed. In one embodiment, the voltage domain crossing circuit comprises an AC coupling component, a DC biasing component and a high voltage output amplifier. The AC coupling component receives an input low voltage signal and AC couples and splits the signal into two voltages. The two voltages are then DC biased to a predetermined bias voltage using the DC biasing component. The high voltage output amplifier then amplifies the biased voltages in the high voltage domain yielding a signal in the high voltage domain. Other embodiments of the voltage domain crossing circuit and method are also disclosed.
摘要翻译：公开了一种电压域交叉电路和方法。在一个实施例中，电压域交叉电路包括AC耦合部件，DC偏置部件和高压输出放大器。 AC耦合组件接收输入低电压信号，并且AC将信号分离成两个电压。然后使用DC偏置组件将两个电压直流偏置到预定的偏置电压。然后，高电压输出放大器放大高电压域中的偏置电压，产生高电压域中的信号。还公开了电压域交叉电路和方法的其他实施例。

3. 发明申请

US20120038393A1 Mode Dependent Driving of the Center Tap in Ethernet Communications 有权
标题翻译：以太网通信中的中心点的方式驱动
公开(公告)号：US20120038393A1
公开(公告)日：2012-02-16
申请号：US12855432
申请日：2010-08-12
申请人： Frank VAN DER GOES , Christopher Ward , Ovidiu Bajdechi , Erol Arslan
发明人： Frank VAN DER GOES , Christopher Ward , Ovidiu Bajdechi , Erol Arslan
IPC分类号： H03K3/00
CPC分类号： H04L25/0266 , H04L12/10 , H04L25/0272 , H04L25/028 , H04L25/0282
摘要： An output stage comprising a current mode line driver, a voltage mode line driver, and a center-tapped transformer for coupling data provided by the line drivers to a transmission line is provided herein. The output stage is configured to operate in a backwards compatible Ethernet communication device. For example, the Ethernet communication device is configured to support 10G Ethernet and legacy Ethernet modes of 10BASE-T, 100BASE-T, and 1000BASE-T. The current mode line driver can be utilized while operating in the 10G Ethernet mode to provide high linearity. The voltage mode line driver can be utilized while operating in legacy mode to conserve power. In order to accommodate the use of two different line drivers, a switch and/or a voltage regulator is used to couple/decouple a dc voltage to a center-tap of the transformer based on which of the two different line drivers is currently active.
摘要翻译：本文提供了一种包括电流模式线驱动器，电压模式线驱动器和用于将线驱动器提供给传输线的数据耦合的中心抽头变压器的输出级。输出级被配置为在向后兼容的以太网通信设备中操作。例如，以太网通信设备被配置为支持10BASE-T，100BASE-T和1000BASE-T的10G以太网和传统以太网模式。当在10G以太网模式下工作时，可以利用当前的模式线路驱动器来提供高线性度。电压模式线路驱动器可以在传统模式下工作以节省电力。为了适应两种不同的线路驱动器的使用，开关和/或电压调节器用于基于两个不同的线路驱动器当前处于活动状态，将直流电压耦合到/去耦合到变压器的中心抽头。

4. 发明申请

US20070176666A1 Level translator for adapting a signal to a voltage level 审中-公开
标题翻译：电平转换器，用于将信号调整到电压电平
公开(公告)号：US20070176666A1
公开(公告)日：2007-08-02
申请号：US11341383
申请日：2006-01-30
申请人： Erol Arslan , Ovidiu Bajdechi
发明人： Erol Arslan , Ovidiu Bajdechi
IPC分类号： H03L5/00
CPC分类号： H03K3/012 , H03K3/35613
摘要： A level translator for translating a digital signal from a first voltage level to another voltage level having a higher voltage assigned to the high state of the signal comprises a latch and a pair of N-MOS transistors being coupled to the latch. This design is improved in that the N-MOS transistors are native thick oxide N-MOS transistors, each having a thin oxide layer N-MOS transistor coupled to native thick oxide transistors for reducing leakage current and improving speed in the transient state.
摘要翻译：用于将数字信号从第一电压电平转换为具有分配给信号的高状态的较高电压的另一电压电平的电平转换器包括锁存器和耦合到锁存器的一对N-MOS晶体管。改进了这种设计，因为N-MOS晶体管是天然厚氧化物N-MOS晶体管，每个都具有耦合到天然厚氧化物晶体管的薄氧化层N-MOS晶体管，用于减少漏电流并改善瞬态状态下的速度。

5. 发明授权

US07199737B2 Disconnecting a time discrete circuit from a track-and-hold circuit in track mode 有权
标题翻译：在跟踪模式下断开跟踪保持电路的时间离散电路
公开(公告)号：US07199737B2
公开(公告)日：2007-04-03
申请号：US10857844
申请日：2004-06-02
申请人： Erol Arslan
发明人： Erol Arslan
IPC分类号： H03M1/00
CPC分类号： G11C27/026 , H03M1/1245
摘要： A system and method for an improved analog front-end system is disclosed. By coupling a switch to the output of a track-and-hold circuit and to the input of a time-discrete circuit, such as an analog-to-digital converter, the time-discrete circuit can be disconnected from the track-and-hold circuit during the track mode of the track-and-hold circuit. This improved system reduces the load of the T/H circuit from the full input capacitance of the time-discrete circuit to the smaller parasitics of the switch thereby providing a T/H circuit with lower power consumption and smaller area while maintaining high speed and high accuracy. When the time-discrete circuit is an analog-to-digital converter, the system and method may also include a second shorted switch coupled between the first switch and the analog-to-digital converter for canceling the charge injection of the first switch and thereby enabling the analog-to-digital converter to convert an analog signal to a digital signal during the track phase of the track-and-hold circuit.
摘要翻译：公开了一种用于改进的模拟前端系统的系统和方法。通过将开关耦合到轨道保持电路的输出和诸如模数转换器的时间离散电路的输入，时分离电路可以与轨道 - 在跟踪和保持电路的跟踪模式期间保持电路。这种改进的系统将T / H电路的负载从时间离散电路的全输入电容减小到开关的较小寄生电容，从而提供具有较低功耗和较小面积的T / H电路，同时保持高速和高准确性。当时间离散电路是模数转换器时，系统和方法还可以包括耦合在第一开关和模数转换器之间的第二短路开关，用于消除第一开关的电荷注入，从而使得模数转换器在跟踪保持电路的跟踪阶段期间将模拟信号转换为数字信号。

6. 发明授权

US08446184B2 Mode dependent driving of the center tap in ethernet communications 有权
标题翻译：以太网通讯中心抽头的方式驱动
公开(公告)号：US08446184B2
公开(公告)日：2013-05-21
申请号：US12855432
申请日：2010-08-12
申请人： Frank Van Der Goes , Christopher Ward , Ovidiu Bajdechi , Erol Arslan
发明人： Frank Van Der Goes , Christopher Ward , Ovidiu Bajdechi , Erol Arslan
IPC分类号： H03K3/00
CPC分类号： H04L25/0266 , H04L12/10 , H04L25/0272 , H04L25/028 , H04L25/0282
摘要： An output stage comprising a current mode line driver, a voltage mode line driver, and a center-tapped transformer for coupling data provided by the line drivers to a transmission line is provided herein. The output stage is configured to operate in a backwards compatible Ethernet communication device. For example, the Ethernet communication device is configured to support 10G Ethernet and legacy Ethernet modes of 10BASE-T, 100BASE-T, and 1000BASE-T. The current mode line driver can be utilized while operating in the 10G Ethernet mode to provide high linearity. The voltage mode line driver can be utilized while operating in legacy mode to conserve power. In order to accommodate the use of two different line drivers, a switch and/or a voltage regulator is used to couple/decouple a dc voltage to a center-tap of the transformer based on which of the two different line drivers is currently active.
摘要翻译：本文提供了一种包括电流模式线驱动器，电压模式线驱动器和用于将线驱动器提供给传输线的数据耦合的中心抽头变压器的输出级。输出级被配置为在向后兼容的以太网通信设备中操作。例如，以太网通信设备被配置为支持10BASE-T，100BASE-T和1000BASE-T的10G以太网和传统以太网模式。当在10G以太网模式下工作时，可以利用当前的模式线路驱动器来提供高线性度。电压模式线路驱动器可以在传统模式下工作以节省电力。为了适应两种不同的线路驱动器的使用，开关和/或电压调节器用于基于两个不同的线路驱动器当前处于活动状态来将直流电压耦合到/去耦合到变压器的中心抽头。

7. 发明申请

US20050270210A1 Disconnecting a time discrete circuit from a track-and-hold circuit in track mode 有权
标题翻译：在跟踪模式下断开跟踪保持电路的时间离散电路
公开(公告)号：US20050270210A1
公开(公告)日：2005-12-08
申请号：US10857844
申请日：2004-06-02
申请人： Erol Arslan
发明人： Erol Arslan
IPC分类号： G11C27/02 , H03M1/12
CPC分类号： G11C27/026 , H03M1/1245
摘要： A system and method for an improved analog front-end system is disclosed. By coupling a switch to the output of a track-and-hold circuit and to the input of a time-discrete circuit, such as an analog-to-digital converter, the time-discrete circuit can be disconnected from the track-and-hold circuit during the track mode of the track-and-hold circuit. This improved system reduces the load of the T/H circuit from the full input capacitance of the time-discrete circuit to the smaller parasitics of the switch thereby providing a T/H circuit with lower power consumption and smaller area while maintaining high speed and high accuracy. When the time-discrete circuit is an analog-to-digital converter, the system and method may also include a second shorted switch coupled between the first switch and the analog-to-digital converter for canceling the charge injection of the first switch and thereby enabling the analog-to-digital converter to convert an analog signal to a digital signal during the track phase of the track-and-hold circuit.
摘要翻译：公开了一种用于改进的模拟前端系统的系统和方法。通过将开关耦合到轨道保持电路的输出和诸如模数转换器的时间离散电路的输入，时分离电路可以与轨道 - 在跟踪和保持电路的跟踪模式期间保持电路。这种改进的系统将T / H电路的负载从时间离散电路的全输入电容减小到开关的较小寄生电容，从而提供具有较低功耗和较小面积的T / H电路，同时保持高速和高准确性。当时间离散电路是模数转换器时，系统和方法还可以包括耦合在第一开关和模数转换器之间的第二短路开关，用于消除第一开关的电荷注入使得模数转换器在跟踪保持电路的跟踪阶段期间将模拟信号转换为数字信号。

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