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1. 发明授权

US08039347B2 Semiconductor device having vertically aligned pillar structures that have flat side surfaces and method for manufacturing the same 有权
标题翻译：具有垂直排列的具有平坦侧表面的柱结构的半导体器件及其制造方法
公开(公告)号：US08039347B2
公开(公告)日：2011-10-18
申请号：US12491565
申请日：2009-06-25
申请人： Jong Han Shin , Hyung Soon Park , Jum Yong Park , Sung Jun Kim , Young Ju Lee
发明人： Jong Han Shin , Hyung Soon Park , Jum Yong Park , Sung Jun Kim , Young Ju Lee
IPC分类号： H01L21/336
CPC分类号： H01L21/823487 , H01L29/66666
摘要： A semiconductor device having vertically aligned transistors made from pillar structures that have flat side surfaces is presented. The semiconductor device includes a semiconductor substrate, spacers, and gates. The semiconductor substrate has pillar structures that have flat side surfaces. The spacers are on sidewalls only on the upper portions of the pillar structures. The gates surround lower portions of the pillar structures.
摘要翻译：提出了具有由具有平坦侧表面的柱结构制成的垂直排列的晶体管的半导体器件。半导体器件包括半导体衬底，间隔物和栅极。半导体衬底具有平坦的侧表面的柱结构。间隔物仅在支柱结构的上部的侧壁上。门围绕柱结构的下部。

2. 发明授权

US07871913B2 Method for manufacturing semiconductor device having vertical transistor 有权
标题翻译：具有垂直晶体管的半导体器件的制造方法
公开(公告)号：US07871913B2
公开(公告)日：2011-01-18
申请号：US12335668
申请日：2008-12-16
申请人： Jong Han Shin , Hyung Soon Park , Jum Yong Park , Sung Jun Kim
发明人： Jong Han Shin , Hyung Soon Park , Jum Yong Park , Sung Jun Kim
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L29/66666 , H01L29/4236 , H01L29/42376 , H01L29/7827
摘要： A method for manufacturing a semiconductor device having a vertical transistor includes forming hard masks on a semiconductor substrate to expose portions of the semiconductor substrate. Then the exposed portions of the semiconductor substrate are etched to define grooves in the semiconductor substrate. A gate conductive layer is formed on the hard masks and surfaces of the grooves to a thickness that does not completely fill the grooves. A sacrificial layer is formed on the gate conductive layer to completely fill the grooves. A partial thickness of the sacrificial layer is removed to expose the gate conductive layer and portions of the gate conductive layer formed on the hard masks and on sidewalls of upper portions of the grooves are removed. The remaining sacrificial layer is completely removed. Gates are formed on sidewalls of lower portions of the grooves by etching the gate conductive layer.
摘要翻译：一种制造具有垂直晶体管的半导体器件的方法包括：在半导体衬底上形成硬掩模以暴露半导体衬底的部分。然后蚀刻半导体衬底的暴露部分以在半导体衬底中限定凹槽。在硬掩模和凹槽的表面上形成栅极导电层至不完全填充凹槽的厚度。牺牲层形成在栅极导电层上以完全填充凹槽。去除牺牲层的部分厚度以露出栅极导电层，并且去除形成在硬掩模上的栅极导电层的部分以及沟槽上部的侧壁上的部分。剩余的牺牲层被完全去除。通过蚀刻栅极导电层在栅极的下部的侧壁上形成栅极。

3. 发明授权

US08384135B2 Phase-change random access memory device and method of manufacturing the same 有权
标题翻译：相变随机存取存储器件及其制造方法
公开(公告)号：US08384135B2
公开(公告)日：2013-02-26
申请号：US13164490
申请日：2011-06-20
申请人： Cheol Hwi Ryu , Hyung Soon Park , Jong Han Shin , Jum Yong Park , Sung Jun Kim
发明人： Cheol Hwi Ryu , Hyung Soon Park , Jong Han Shin , Jum Yong Park , Sung Jun Kim
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H01L27/101 , H01L45/06 , H01L45/124 , H01L45/1683
摘要： A phase-change random access memory device includes a semiconductor substrate, a bottom electrode structure formed on the semiconductor substrate, a cylindrical bottom electrode contact that includes a conductive material layer, which is in contact with the bottom electrode, and a cylindrical phase-change material layer that is in contact with the bottom electrode contact. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.
摘要翻译：相变随机存取存储器件包括半导体衬底，形成在半导体衬底上的底部电极结构，包括与底部电极接触的导电材料层的圆柱形底部电极接触和圆柱形相变与底部电极接触的材料层。因此，可以使底部电极接触和相变材料层之间的接触面积最小化。

4. 发明申请

US20110240950A1 PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：相变随机访问存储器件及其制造方法
公开(公告)号：US20110240950A1
公开(公告)日：2011-10-06
申请号：US13164490
申请日：2011-06-20
申请人： Cheol Hwi Ryu , Hyung Soon Park , Jong Han Shin , Jum Yong Park , Sung Jun Kim
发明人： Cheol Hwi Ryu , Hyung Soon Park , Jong Han Shin , Jum Yong Park , Sung Jun Kim
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , H01L45/06 , H01L45/124 , H01L45/1683
摘要： A phase-change random access memory device includes a semiconductor substrate, a bottom electrode structure formed on the semiconductor substrate, a cylindrical bottom electrode contact that includes a conductive material layer, which is in contact with the bottom electrode, and a cylindrical phase-change material layer that is in contact with the bottom electrode contact. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.
摘要翻译：相变随机存取存储器件包括半导体衬底，形成在半导体衬底上的底部电极结构，包括与底部电极接触的导电材料层的圆柱形底部电极接触和圆柱形相变与底部电极接触的材料层。因此，可以使底部电极接触和相变材料层之间的接触面积最小化。

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