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1. 发明申请

US20120228619A1 DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：显示面板及其制造方法
公开(公告)号：US20120228619A1
公开(公告)日：2012-09-13
申请号：US13472716
申请日：2012-05-16
申请人： Joo-Ae YOUN , Yang-Ho BAE , Chang-Oh JEONG , Chong-Chul CHAI , Pil-Sang YUN , Honglong NING , Byeong-Beom KIM
发明人： Joo-Ae YOUN , Yang-Ho BAE , Chang-Oh JEONG , Chong-Chul CHAI , Pil-Sang YUN , Honglong NING , Byeong-Beom KIM
IPC分类号： H01L29/786 , H01L33/08
CPC分类号： H01L33/0041 , H01L27/124 , H01L29/458
摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.
摘要翻译：显示面板包括：下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层，下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线线和与TFT连接的像素电极。

2. 发明申请

US20090212290A1 DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：显示面板及其制造方法
公开(公告)号：US20090212290A1
公开(公告)日：2009-08-27
申请号：US12354115
申请日：2009-01-15
申请人： Joo-Ae YOUN , Yang-Ho BAE , Chang-Oh JEONG , Chong-Chul CHAI , Pil-Sang YUN , Honglong NING , Byeong-Beom KIM
发明人： Joo-Ae YOUN , Yang-Ho BAE , Chang-Oh JEONG , Chong-Chul CHAI , Pil-Sang YUN , Honglong NING , Byeong-Beom KIM
IPC分类号： H01L27/088 , H01L21/77
CPC分类号： H01L33/0041 , H01L27/124 , H01L29/458
摘要： A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.
摘要翻译：显示面板包括：下栅极线，基本上垂直于下栅极线设置的下数据线，连接到下栅极线和下数据线的薄膜晶体管（“TFT”），设置在下栅极线上的绝缘层，下数据线和TFT，并且具有暴露下栅极线和下数据线的多个沟槽，设置在下栅极线上的沟槽中的上栅极线，设置在下数据上的沟槽中的上数据线线和与TFT连接的像素电极。

3. 发明申请

US20080213702A1 METHOD FOR PATTERNING CONDUCTIVE POLYMER 审中-公开
标题翻译：用于形成导电聚合物的方法
公开(公告)号：US20080213702A1
公开(公告)日：2008-09-04
申请号：US11932496
申请日：2007-10-31
申请人： Yang-Ho BAE , Chang-Oh JEONG , Byeong-Beom KIM , Jae-Gab LEE , Tae-Wook KWON
发明人： Yang-Ho BAE , Chang-Oh JEONG , Byeong-Beom KIM , Jae-Gab LEE , Tae-Wook KWON
IPC分类号： G03F7/00
CPC分类号： H01L51/0021 , G03F7/0755 , G03F7/165 , H01L51/0023
摘要： A method for patterning a conductive polymer that adheres well to an oxide layer is presented. The method includes forming a self-assembled monolayer on a substrate, patterning the self-assembled monolayer, forming a catalyst layer on the self-assembled monolayer, and forming a conductive polymer layer on the self-assembled monolayer.
摘要翻译：提出了一种用于图案化粘附到氧化物层的导电聚合物的方法。该方法包括在衬底上形成自组装单层，图案化自组装单层，在自组装单层上形成催化剂层，并在自组装单层上形成导电聚合物层。

4. 发明申请

US20100149476A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20100149476A1
公开(公告)日：2010-06-17
申请号：US12534300
申请日：2009-08-03
申请人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
发明人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
IPC分类号： G02F1/1333 , B05D5/12 , B44C1/22
CPC分类号： G02F1/136286 , G02F2001/133302 , G02F2001/136295
摘要： A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate.
摘要翻译：显示基板包括：基底基板，设置在基底基板的下表面的变形防止层，其中变形防止层向基底基板施加力以防止基底基板弯曲，设置在基底基板的上表面上的栅极线设置在基底基板上的数据线，以及配置在基底基板上的像素电极。

5. 发明申请

US20120286272A1 THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20120286272A1
公开(公告)日：2012-11-15
申请号：US13487409
申请日：2012-06-04
申请人： Hong-Long NING , Byeong-Beom KIM , Chang-Oh JEONG , Sang-Won SHIN , Hyeong-Suk YOO , Xin-Xing LI , Joon-Yong PARK , Hyun-Ju KANG , Su-Kyoung YANG , Kyung-Seop KIM
发明人： Hong-Long NING , Byeong-Beom KIM , Chang-Oh JEONG , Sang-Won SHIN , Hyeong-Suk YOO , Xin-Xing LI , Joon-Yong PARK , Hyun-Ju KANG , Su-Kyoung YANG , Kyung-Seop KIM
IPC分类号： H01L29/786 , H01L33/08
CPC分类号： H01L29/78693 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor includes a gate electrode on a substrate, a main active layer in electrical connection with the gate electrode and including an exposed channel portion, a source electrode in electrical connection with the main active layer, a drain electrode which is spaced apart from the source electrode and in electrical connection with the main active layer, and a sub active layer in electrical connection to the main active layer.
摘要翻译：薄膜晶体管包括在基板上的栅电极，与栅电极电连接并包括暴露的沟道部分的主有源层，与主有源层电连接的源电极，与主有源层电连接的漏电极，源电极并与主有源层电连接，以及与主活性层电连接的子有源层。

6. 发明申请

US20100148169A1 THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20100148169A1
公开(公告)日：2010-06-17
申请号：US12498816
申请日：2009-07-07
申请人： Do-Hyun KIM , Pil-Sang YUN , Ki-Won KIM , Dong-Hoon LEE , Chang-Oh JEONG
发明人： Do-Hyun KIM , Pil-Sang YUN , Ki-Won KIM , Dong-Hoon LEE , Chang-Oh JEONG
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/12 , H01L27/1225 , H01L27/124 , H01L29/45 , H01L29/66969 , H01L29/78618
摘要： A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material.
摘要翻译：薄膜晶体管（TFT）基板具有改善的电性能和减少的外观缺陷以及制造TFT基板的方法。 TFT基板包括：形成在绝缘基板的表面上的栅极布线; 氧化物活性层图案，其形成在栅极布线上并且包括第一材料的氧化物; 缓冲层图案，其设置在所述氧化物活性层图案上以直接接触所述氧化物活性层图案并且包括第二材料; 以及形成在所述缓冲层图案上以绝缘地穿过所述栅极布线的数据布线，其中所述第一材料的氧化物的吉布斯自由能低于所述第二材料的氧化物的吉布斯自由能。

7. 发明申请

US20080138942A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080138942A1
公开(公告)日：2008-06-12
申请号：US12031121
申请日：2008-02-14
申请人： Je-Hun LEE , Yang-Ho BAE , Beom-Seok CHO , Chang-Oh JEONG
发明人： Je-Hun LEE , Yang-Ho BAE , Beom-Seok CHO , Chang-Oh JEONG
IPC分类号： H01L21/336
CPC分类号： H01L27/3279 , H01L27/124 , H01L27/1288 , H01L51/0023 , H01L51/56
摘要： The invention provides a thin film transistor (TFT) array panel that includes an insulating substrate; a gate line formed on the insulating substrate and having a first layer of an Al containing metal, a second layer of a Cu containing metal that is thicker than the first layer, and a gate electrode; a gate insulating layer arranged on the gate line; a semiconductor arranged on the gate insulating layer; a data line having a source electrode and arranged on the gate insulating layer and the semiconductor; a drain electrode arranged on the gate insulating layer and the semiconductor and facing the source electrode; a passivation layer having a contact hole and arranged on the data line and the drain electrode; and a pixel electrode arranged on the passivation layer and coupled with the drain electrode through the contact hole.
摘要翻译：本发明提供一种薄膜晶体管（TFT）阵列面板，其包括绝缘基板; 形成在所述绝缘基板上并具有含有Al的金属的第一层，比所述第一层更厚的含Cu金属的第二层的栅极线和栅电极; 栅极绝缘层，布置在栅极线上; 布置在栅绝缘层上的半导体; 数据线，其具有源电极并且布置在所述栅极绝缘层和所述半导体上; 布置在所述栅绝缘层和所述半导体上并面对所述源电极的漏电极; 钝化层，其具有接触孔并且布置在所述数据线和所述漏电极上; 以及设置在钝化层上并通过接触孔与漏电极耦合的像素电极。

8. 发明申请

US20120043545A1 THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管显示面板及其制造方法
公开(公告)号：US20120043545A1
公开(公告)日：2012-02-23
申请号：US13010656
申请日：2011-01-20
申请人： Hyung-Jun KIM , Chang-Oh JEONG , Jae-Hong KIM
发明人： Hyung-Jun KIM , Chang-Oh JEONG , Jae-Hong KIM
IPC分类号： H01L29/12 , H01L21/336
CPC分类号： H01L29/6675 , G02F1/136213 , G02F1/136286 , G02F2001/13629 , H01L27/124 , H01L29/42384
摘要： A thin film transistor display panel includes a substrate, a gate wire on the substrate and including a gate line and a gate electrode; a gate insulating layer on the gate wire; a semiconductor layer on the gate insulating layer; a data wire including a source electrode on the semiconductor layer, a drain electrode opposing the source electrode with respect to the gate electrode, and a data line; a passivation layer on the data wire having a contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the contact hole. The gate wire has a first region and second region where the gate line and the gate electrode are positioned, respectively. The thickness of the gate wire in the first region is greater than the thickness of the gate wire in the second region.
摘要翻译：薄膜晶体管显示面板包括衬底，衬底上的栅极线，并且包括栅极线和栅电极; 栅极线上的栅极绝缘层; 栅极绝缘层上的半导体层; 数据线，包括半导体层上的源电极，与源电极相对于栅电极相对的漏电极和数据线; 数据线上的钝化层具有暴露漏电极的接触孔; 以及钝化层上的像素电极，并通过接触孔与漏电极连接。栅极线分别具有栅极线和栅电极所在的第一区域和第二区域。第一区域中的栅极线的厚度大于第二区域中的栅极线的厚度。

9. 发明申请

US20080099765A1 THIN FILM TRANSISTOR SUBSTRATE AND FABRICATING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US20080099765A1
公开(公告)日：2008-05-01
申请号：US11923914
申请日：2007-10-25
申请人： Do-Hyun KIM , Je-Hun LEE , Chang-Oh JEONG
发明人： Do-Hyun KIM , Je-Hun LEE , Chang-Oh JEONG
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/4908 , H01L27/124 , H01L29/458
摘要： A thin film transistor substrate and fabricating method thereof, the thin film transistor substrate including a substrate, a gate line and a gate electrode, each including a metal adhesion layer and a Cu alloy layer disposed on the substrate, an active layer and an ohmic contact layer disposed over the gate electrode, a gate insulating layer disposed between the gate electrode and the active and ohmic contact layers, source and drain electrodes disposed on the ohmic contact layer, and a data line connected to the source electrode.
摘要翻译：一种薄膜晶体管基板及其制造方法，所述薄膜晶体管基板包括基板，栅极线和栅电极，每个薄膜晶体管基板包括设置在基板上的金属粘合层和Cu合金层，有源层和欧姆接触设置在栅极电极上的栅极绝缘层，设置在栅电极与有源欧姆接触层之间的栅极绝缘层，设置在欧姆接触层上的源电极和漏电极以及连接到源电极的数据线。

10. 发明申请

US20080017862A1 ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：阵列基板，具有该基板的显示装置及其制造方法
公开(公告)号：US20080017862A1
公开(公告)日：2008-01-24
申请号：US11779534
申请日：2007-07-18
申请人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
发明人： Je-Hun LEE , Do-Hyun KIM , Eun-Guk LEE , Chang-Oh JEONG
IPC分类号： H01L29/04 , H01L21/00
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/124
摘要： An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.
摘要翻译：阵列基板包括开关元件，信号传输线，钝化层和像素电极。开关元件设置在绝缘基板上。信号传输线连接到开关元件，并且包括阻挡层，导电线和氮化铜层。阻挡层设置在绝缘基板上。导电线设置在阻挡层上并且包括铜或铜合金。氮化铜层覆盖导电线。钝化层覆盖开关元件和信号传输线，并且具有接触孔，开关元件的漏电极通过该接触孔部分露出。像素电极设置在绝缘基板上，并通过接触孔与开关元件的漏电极连接。

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