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1. 发明授权

US09041638B2 Liquid crystal driving circuit having a common-signal output circuit and a segment-signal output circuit and method 有权
标题翻译：具有公共信号输出电路和段信号输出电路及方法的液晶驱动电路
公开(公告)号：US09041638B2
公开(公告)日：2015-05-26
申请号：US13191075
申请日：2011-07-26
申请人： Norikazu Katagiri , Tetsuya Tokunaga , Mamoru Yamaguchi , Hiroyuki Nakamura
发明人： Norikazu Katagiri , Tetsuya Tokunaga , Mamoru Yamaguchi , Hiroyuki Nakamura
IPC分类号： G09G3/36 , G09G3/18
CPC分类号： G09G3/18 , G09G2310/0267 , G09G2310/0275
摘要： A liquid-crystal-driving circuit includes: a plurality of resistors connected in series between a first and second potentials; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid-crystal panel, respectively, the common signals each being at the first and second potentials, and the intermediate potentials; and a segment-signal-output circuit to supply segment signals to segment electrodes of the panel, respectively, the segment signals each being at the first and second potentials, and the intermediate potentials according to the common signals, the segment-signal output circuit to change the potentials of the segment signals in a ramp form, at least if the potentials of the segment signals are changed with a maximum-possible-potential difference.
摘要翻译：液晶驱动电路包括：串联连接在第一和第二电位之间的多个电阻器; 一个或多个电压跟随器电路，用于阻抗转换第一和第二电位之间的一个或多个中间电位，分别输出在电阻器之间的一个或多个连接点产生的中间电位; 公共信号输出电路，分别向液晶面板的公共电极提供公共信号，每个共同信号处于第一和第二电位以及中间电位; 以及分段信号输出电路，分别将分段信号提供给面板的分段电极，每个分别处于第一和第二电位的分段信号和根据公共信号的中间电位，分段信号输出电路至少如果段信号的电位以最大可能电位差改变，则以斜坡形式改变段信号的电位。

2. 发明申请

US20120026153A1 Liquid Crystal Driving Circuit 有权
标题翻译：液晶驱动电路
公开(公告)号：US20120026153A1
公开(公告)日：2012-02-02
申请号：US13191075
申请日：2011-07-26
申请人： Norikazu Katagiri , Tetsuya Tokunaga , Mamoru Yamaguchi , Hiroyuki Nakamura
发明人： Norikazu Katagiri , Tetsuya Tokunaga , Mamoru Yamaguchi , Hiroyuki Nakamura
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G3/18 , G09G2310/0267 , G09G2310/0275
摘要： A liquid-crystal-driving circuit includes: a plurality of resistors connected in series between a first and second potentials; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid-crystal panel, respectively, the common signals each being at the first and second potentials, and the intermediate potentials; and a segment-signal-output circuit to supply segment signals to segment electrodes of the panel, respectively, the segment signals each being at the first and second potentials, and the intermediate potentials according to the common signals, the segment-signal output circuit to change the potentials of the segment signals in a ramp form, at least if the potentials of the segment signals are changed with a maximum-possible-potential difference.
摘要翻译：液晶驱动电路包括：串联连接在第一和第二电位之间的多个电阻器; 一个或多个电压跟随器电路，用于阻抗转换第一和第二电位之间的一个或多个中间电位，分别输出在电阻器之间的一个或多个连接点产生的中间电位; 公共信号输出电路，分别向液晶面板的公共电极提供公共信号，每个共同信号处于第一和第二电位以及中间电位; 以及分段信号输出电路，分别将分段信号提供给面板的分段电极，每个分别处于第一和第二电位的分段信号和根据公共信号的中间电位，分段信号输出电路至少如果段信号的电位以最大可能电位差改变，则以斜坡形式改变段信号的电位。

3. 发明授权

US08941571B2 Liquid crystal driving circuit 有权
标题翻译：液晶驱动电路
公开(公告)号：US08941571B2
公开(公告)日：2015-01-27
申请号：US13584397
申请日：2012-08-13
申请人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
发明人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
IPC分类号： G09G3/36 , G09G3/04
CPC分类号： G09G3/3655 , G09G3/04 , G09G3/3614 , G09G3/3696 , G09G2330/025
摘要： A liquid-crystal-driving circuit includes: resistors connected in series between first and second potentials lower than the first potential; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid crystal panel, respectively, the common signals being at the first, second, or one or more intermediate potentials in a predetermined order; and a segment-signal output circuit supplies segment signals to segment electrodes of the liquid crystal panel, respectively, the segment signals being at the first and second potentials, or the intermediate potentials according to the common signals, wherein the segment-signal output circuit increases impedances of the segment signals only for a first period when the of segment signals potentials are switched.
摘要翻译：液晶驱动电路包括：电阻器，其串联连接在低于第一电位的第一和第二电位之间; 一个或多个电压跟随器电路，用于阻抗转换第一和第二电位之间的一个或多个中间电位，分别输出在电阻器之间的一个或多个连接点产生的中间电位; 公共信号输出电路，分别向液晶面板的公共电极提供公共信号，共同信号处于第一，第二或一个或多个中间电位，以预定顺序; 分段信号输出电路分别将分段信号提供给液晶面板的分段电极，根据公共信号分段信号处于第一和第二电位或中间电位，其中分段信号输出电路增加段信号的阻抗仅在片段信号电位切换时的第一周期。

4. 发明申请

US20130038805A1 LIQUID CRYSTAL DRIVING CIRCUIT 有权
标题翻译：液晶驱动电路
公开(公告)号：US20130038805A1
公开(公告)日：2013-02-14
申请号：US13584397
申请日：2012-08-13
申请人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
发明人： Norikazu Katagiri , Tetsuya Tokunaga , Tomoshi Yoshida , Kensuke Goto , Mamoru Yamaguchi
IPC分类号： G02F1/1333 , G02F1/136
CPC分类号： G09G3/3655 , G09G3/04 , G09G3/3614 , G09G3/3696 , G09G2330/025
摘要： A liquid-crystal-driving circuit includes: resistors connected in series between first and second potentials lower than the first potential; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid crystal panel, respectively, the common signals being at the first, second, or one or more intermediate potentials in a predetermined order; and a segment-signal output circuit supplies segment signals to segment electrodes of the liquid crystal panel, respectively, the segment signals being at the first and second potentials, or the intermediate potentials according to the common signals, wherein the segment-signal output circuit increases impedances of the segment signals only for a first period when the of segment signals potentials are switched.
摘要翻译：液晶驱动电路包括：电阻器，其串联连接在低于第一电位的第一和第二电位之间; 一个或多个电压跟随器电路，用于阻抗转换第一和第二电位之间的一个或多个中间电位，分别输出在电阻器之间的一个或多个连接点产生的中间电位; 公共信号输出电路，分别向液晶面板的公共电极提供公共信号，共同信号处于第一，第二或一个或多个中间电位，以预定顺序; 分段信号输出电路分别将分段信号提供给液晶面板的分段电极，根据公共信号分段信号处于第一和第二电位或中间电位，其中分段信号输出电路增加段信号的阻抗仅在片段信号电位切换时的第一周期。

5. 发明申请

US20100103157A1 LIQUID CRYSTAL DISPLAY DRIVE CIRCUIT 审中-公开
标题翻译：液晶显示驱动电路
公开(公告)号：US20100103157A1
公开(公告)日：2010-04-29
申请号：US12604779
申请日：2009-10-23
申请人： Kensuke Goto , Tetsuya Tokunaga , Norikazu Katagiri
发明人： Kensuke Goto , Tetsuya Tokunaga , Norikazu Katagiri
IPC分类号： G09G5/00 , G09G3/36
CPC分类号： G09G3/3614 , G09G3/3696 , G09G2310/066 , G09G2320/0209
摘要： A liquid crystal display drive circuit that suppresses a pulse noise in a liquid crystal display panel without increasing a mounting area is offered. A common signal COMi is varied in a staircase waveform with an increment of 1/3 VLCD in such a way that a high electric potential VLCD→a first intermediate electric potential VLCD1→a second intermediate electric potential VLCD2→a low electric potential VSS, when the common signal COMi varies by the maximum amplitude, in other words, when the common signal COMi makes a transition from the high electric potential VLCD to the low electric potential VSS. The segment signal SEGj is varied similarly in a staircase waveform in such a way that the low electric potential VSS→the second intermediate electric potential VLCD2→the first intermediate electric potential VLCD1→the high electric potential VLCD when the segment signal SEGj makes a transition from the low electric potential VSS to the high electric potential VLCD. A peak value of the pulse noise due to a capacitive coupling can be reduced to 1/3 of that in the prior art.
摘要翻译：提供了不增加安装面积来抑制液晶显示面板中的脉冲噪声的液晶显示驱动电路。公共信号COMi在阶梯波形中以1/3VLCD的增量变化，使得高电位VLCD→第一中间电位VLCD1→第二中间电位VLCD2→低电位VSS，当公共信号COMi根据最大幅度变化，换句话说，当公共信号COMi从高电位VLCD向低电位VSS转变时，段状信号SEGj以梯形波形相似地变化，使得当段信号SEGj从...中转变时，低电位VSS→第二中间电位VLCD2→第一中间电位VLCD1→高电位VLCD 低电位VSS到高电位VLCD。由于电容耦合引起的脉冲噪声的峰值可以减小到现有技术中的峰值的1/3。

6. 发明申请

US20060033583A1 Frequency adjustment circuit 有权
标题翻译：频率调节电路
公开(公告)号：US20060033583A1
公开(公告)日：2006-02-16
申请号：US11196512
申请日：2005-08-04
申请人： Tetsuya Tokunaga , Hiroyuki Arai , Takeshi Kimura , Ryouichi Ando , Mamoru Yamaguchi
发明人： Tetsuya Tokunaga , Hiroyuki Arai , Takeshi Kimura , Ryouichi Ando , Mamoru Yamaguchi
IPC分类号： H03L7/00
CPC分类号： H03K3/0231 , H03K2005/00084
摘要： A frequency adjustment circuit that maintains a target frequency even when frequency adjustment data of zapping circuit is changed by an external noise is offered. The frequency adjustment circuit includes a reset signal generation circuit, a frequency adjustment data latch circuit that latches and retains the frequency adjustment data ZP1 and ZP2 generated by a first zapping circuit and a second zapping circuit based on a latch clock ZCLK and a latch clock generation circuit that generates the latch clock ZCLK. The reset signal generation circuit generates a periodic reset signal ZRES that is synchronized with a rise of an enable signal EN generated from an interface circuit. The latch clock generation circuit generates the latch clock ZCLK that is synchronized with a fall of the enable signal EN.
摘要翻译：提供即使在由于外部噪声而使切换电路的频率调整数据变化的情况下也能够维持目标频率的频率调整电路。频率调整电路包括复位信号生成电路，频率调整数据锁存电路，其锁存并保持由第一切换电路产生的频率调整数据ZP 1和ZP 2，以及基于锁存时钟ZCLK和锁存器的第二切换电路时钟生成电路，生成锁存时钟ZCLK。复位信号产生电路产生与从接口电路产生的使能信号EN的上升同步的周期性复位信号ZRES。锁存时钟产生电路产生与使能信号EN的下降同步的锁存时钟ZCLK。

7. 发明授权

US07199676B2 Frequency adjustment circuit 有权
标题翻译：频率调节电路
公开(公告)号：US07199676B2
公开(公告)日：2007-04-03
申请号：US11196512
申请日：2005-08-04
申请人： Tetsuya Tokunaga , Hiroyuki Arai , Takeshi Kimura , Ryouichi Ando , Mamoru Yamaguchi
发明人： Tetsuya Tokunaga , Hiroyuki Arai , Takeshi Kimura , Ryouichi Ando , Mamoru Yamaguchi
IPC分类号： H03K3/02
CPC分类号： H03K3/0231 , H03K2005/00084
摘要： A frequency adjustment circuit that maintains a target frequency even when frequency adjustment data of zapping circuit is changed by an external noise is offered. The frequency adjustment circuit includes a reset signal generation circuit, a frequency adjustment data latch circuit that latches and retains the frequency adjustment data ZP1 and ZP2 generated by a first zapping circuit and a second zapping circuit based on a latch clock ZCLK and a latch clock generation circuit that generates the latch clock ZCLK. The reset signal generation circuit generates a periodic reset signal ZRES that is synchronized with a rise of an enable signal EN generated from an interface circuit. The latch clock generation circuit generates the latch clock ZCLK that is synchronized with a fall of the enable signal EN.
摘要翻译：提供即使在由于外部噪声而使切换电路的频率调整数据变化的情况下也能够维持目标频率的频率调整电路。频率调整电路包括复位信号生成电路，频率调整数据锁存电路，其锁存并保持由第一切换电路产生的频率调整数据ZP 1和ZP 2，以及基于锁存时钟ZCLK和锁存器的第二切换电路时钟生成电路，生成锁存时钟ZCLK。复位信号产生电路产生与从接口电路产生的使能信号EN的上升同步的周期性复位信号ZRES。锁存时钟产生电路产生与使能信号EN的下降同步的锁存时钟ZCLK。

8. 发明授权

US08081095B2 Data output circuit 有权
标题翻译：数据输出电路
公开(公告)号：US08081095B2
公开(公告)日：2011-12-20
申请号：US12134525
申请日：2008-06-06
申请人： Yasuo Osawa , Hiroyuki Arai , Tetsuya Tokunaga , Yoshiyuki Yamagata
发明人： Yasuo Osawa , Hiroyuki Arai , Tetsuya Tokunaga , Yoshiyuki Yamagata
IPC分类号： H03M9/00
CPC分类号： G09G3/3685
摘要： A data output circuit includes: a data generating circuit configured to generate output data; and a serial output circuit configured to receive an address corresponding to the data generating circuit, hold a parallel data input during a time period over which the address is being received, and serially output the output data generated by the data generating circuit and the held parallel data in accordance with an output direction signal for directing output of the data.
摘要翻译：数据输出电路包括：数据产生电路，被配置为产生输出数据; 以及串行输出电路，被配置为接收对应于数据产生电路的地址，在接收地址的时间段内保持并行数据输入，并且串行输出由数据产生电路产生的输出数据和所保持的并行根据用于引导数据输出的输出方向信号的数据。

9. 发明授权

US08018445B2 Serial data input system 有权
标题翻译：串行数据输入系统
公开(公告)号：US08018445B2
公开(公告)日：2011-09-13
申请号：US11542640
申请日：2006-10-04
申请人： Tetsuya Tokunaga , Hiroyuki Arai , Takeshi Kimura
发明人： Tetsuya Tokunaga , Hiroyuki Arai , Takeshi Kimura
IPC分类号： G09G5/00 , G06F3/038
CPC分类号： G11C7/02 , G11C7/1036 , G11C7/1078 , G11C7/1087
摘要： Increase in power consumption and increase in power supply noise of a serial data input system are suppressed, while clock skew is more easily prevented. The serial data input system of this invention includes a shift register that takes in and shifts serially transferred display data in synchronization with a clock SCL, a clock counter that counts the number of clock pulses of the clock SCL and outputs each of clock count signals BIT08, BIT16 and BIT24 when the counted number of the clock pulses of the clock SCL reaches each of count numbers 8, 16 and 24 respectively, and registers into each of which the data stored in the shift register is transferred and stored collectively and in parallel in response to each of the clock count signals BIT08, BIP16 and BIT24 respectively.
摘要翻译：抑制串行数据输入系统的功耗增加和电源噪声增加，同时更容易防止时钟偏移。本发明的串行数据输入系统包括一个移位寄存器，其与时钟SCL同步地接收和移位串行传送的显示数据，时钟计数器对时钟SCL的时钟脉冲数进行计数，并输出每个时钟计数信号BIT08 ，BIT16和BIT24，当时钟SCL的时钟脉冲的计数数量分别达到计数数8,16和24的每一个时，并且寄存到每个存储在移位寄存器中的数据被共同并且并行存储分别响应于每个时钟计数信号BIT08，BIP16和BIT24。

10. 发明授权

US4220441A Apparatus for making prills from melted substance 失效
标题翻译：用于从熔化物质制造颗粒的装置
公开(公告)号：US4220441A
公开(公告)日：1980-09-02
申请号：US960692
申请日：1978-11-14
申请人： Shoji Tomita , Tetsuya Tokunaga
发明人： Shoji Tomita , Tetsuya Tokunaga
IPC分类号： C08J3/12 , B01J2/02 , B05B1/00 , B29B9/00 , B22D11/01
CPC分类号： B01J2/02
摘要： An improved prilling tower is provided for the prilling of molten substances wherein a receiver equipped with an exhaust conduit is positioned below the nozzle during pre-heating of the nozzle prior to normal operation, after the end of a normal operating cycle or when the nozzle is replaced during operation of the prilling tower. Means are provided for moving either the receiver or the nozzle in a horizontal direction so that the nozzle is out of proximity with the receiver during normal operation of the prilling tower. More than one nozzle or more than one receiver can be employed in a prilling tower to provide for continuous operation of the prilling tower during replacement or cleaning of the nozzles.
摘要翻译：提供了一种改进的造粒塔，用于造粒熔融物质，其中在正常操作之前，在正常操作循环结束之后，或者当喷嘴是在正常操作循环结束时，配备有排气导管的接收器在喷嘴预热之前位于喷嘴下方在造血塔的运作期间更换。提供了用于在水平方向上移动接收器或喷嘴的装置，使得在造粒塔的正常操作期间喷嘴与接收器不接近。可以在造粒塔中使用多于一个的喷嘴或多于一个的接收器，以在更换或清洁喷嘴期间提供造粒塔的连续操作。

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