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1. 发明授权

US08705287B2 Semiconductor memory device and method of operating the same 有权
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US08705287B2
公开(公告)日：2014-04-22
申请号：US13282029
申请日：2011-10-26
申请人： Seiichi Aritome , Soo Jin Wi , Angelo Visconti , Mattia Robustelli
发明人： Seiichi Aritome , Soo Jin Wi , Angelo Visconti , Mattia Robustelli
IPC分类号： G11C11/34 , G11C16/06
CPC分类号： G11C16/3459 , G11C16/06 , G11C16/3454 , G11C16/3468
摘要： A method of operating a semiconductor memory device includes performing a first program operation in order to raise threshold voltages of memory cells, performing a program verification operation for detecting fast program memory cells, each having a threshold voltage risen higher than a first sub-verification voltage from a second sub-verification voltage or lower, by using a target verification voltage and the first sub-verification voltage and the second sub-verification voltage which are sequentially lower than the target verification voltage, and performing a second program operation under a condition that an increment of each of threshold voltages of memory cells, which is lower than the target verification voltage, is greater than an increment of the threshold voltage of each of the fast program memory cells.
摘要翻译：一种操作半导体存储器件的方法包括执行第一程序操作以提高存储单元的阈值电压，执行用于检测快速程序存储单元的程序验证操作，每个程序存储单元的阈值电压升高高于第一次验证电压通过使用目标验证电压和顺序地低于目标验证电压的第一子验证电压和第二子验证电压，从第二子验证电压或更低的次级验证电压进行第二子验证电压，并且在低于目标验证电压的存储单元的每个阈值电压的增量大于每个快速程序存储单元的阈值电压的增量。

2. 发明申请

US20120106260A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US20120106260A1
公开(公告)日：2012-05-03
申请号：US13282029
申请日：2011-10-26
申请人： Seiichi ARITOME , Soo Jin Wi , Angelo Visconti , Mattia Robustelli
发明人： Seiichi ARITOME , Soo Jin Wi , Angelo Visconti , Mattia Robustelli
IPC分类号： G11C16/06
CPC分类号： G11C16/3459 , G11C16/06 , G11C16/3454 , G11C16/3468
摘要： A method of operating a semiconductor memory device includes performing a first program operation in order to raise threshold voltages of memory cells, performing a program verification operation for detecting fast program memory cells, each having a threshold voltage risen higher than a first sub-verification voltage from a second sub-verification voltage or lower, by using a target verification voltage and the first sub-verification voltage and the second sub-verification voltage which are sequentially lower than the target verification voltage, and performing a second program operation under a condition that an increment of each of threshold voltages of memory cells, which is lower than the target verification voltage, is greater than an increment of the threshold voltage of each of the fast program memory cells.
摘要翻译：一种操作半导体存储器件的方法包括执行第一程序操作以提高存储单元的阈值电压，执行用于检测快速程序存储单元的程序验证操作，每个程序存储单元的阈值电压升高高于第一次验证电压通过使用目标验证电压和顺序地低于目标验证电压的第一子验证电压和第二子验证电压，从第二子验证电压或更低的次级验证电压进行第二子验证电压，并且在低于目标验证电压的存储单元的每个阈值电压的增量大于每个快速程序存储单元的阈值电压的增量。

3. 发明授权

US08451662B2 Reading memory cell history during program operation for adaptive programming 有权
公开(公告)号：US08451662B2
公开(公告)日：2013-05-28
申请号：US13040200
申请日：2011-03-03
申请人： Angelo Visconti , Mattia Robustelli , Silvia Beltrami , Laura Czeppel , Massimo Bertuccio
发明人： Angelo Visconti , Mattia Robustelli , Silvia Beltrami , Laura Czeppel , Massimo Bertuccio
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3495 , G11C16/0483 , G11C16/10 , G11C16/3459
摘要： Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a memory device.

4. 发明授权

US08274832B2 Dynamic polarization for reducing stress induced leakage current 有权
标题翻译：用于减小应力引起的漏电流的动态极化
公开(公告)号：US08274832B2
公开(公告)日：2012-09-25
申请号：US13089259
申请日：2011-04-18
申请人： Luca Chiavarone , Mattia Robustelli , Angelo Visconti
发明人： Luca Chiavarone , Mattia Robustelli , Angelo Visconti
IPC分类号： G11C7/00
CPC分类号： G11C16/10
摘要： Subject matter disclosed herein relates to non-volatile flash memory, and more particularly to a method of reducing stress induced leakage current.
摘要翻译：本文公开的主题涉及非易失性闪速存储器，更具体地，涉及一种减少应力诱发的漏电流的方法。

5. 发明授权

US07940568B1 Dynamic polarization for reducing stress induced leakage current 有权
标题翻译：用于减小应力引起的漏电流的动态极化
公开(公告)号：US07940568B1
公开(公告)日：2011-05-10
申请号：US12346472
申请日：2008-12-30
申请人： Luca Chiavarone , Mattia Robustelli , Angelo Visconti
发明人： Luca Chiavarone , Mattia Robustelli , Angelo Visconti
IPC分类号： G11C11/34
CPC分类号： G11C16/10
摘要： Subject matter disclosed herein relates to non-volatile flash memory, and more particularly to a method of reducing stress induced leakage current.
摘要翻译：本文公开的主题涉及非易失性闪速存储器，更具体地，涉及一种减少应力诱发的漏电流的方法。

6. 发明申请

US20110249501A1 DYNAMIC POLARIZATION FOR REDUCING STRESS INDUCED LEAKAGE CURRENT 有权
标题翻译：用于减少应力诱发漏电流的动态极化
公开(公告)号：US20110249501A1
公开(公告)日：2011-10-13
申请号：US13089259
申请日：2011-04-18
申请人： Luca Chiavarone , Mattia Robustelli , Angelo Visconti
发明人： Luca Chiavarone , Mattia Robustelli , Angelo Visconti
IPC分类号： G11C16/04 , G11C16/30
CPC分类号： G11C16/10
摘要： Subject matter disclosed herein relates to non-volatile flash memory, and more particularly to a method of reducing stress induced leakage current.
摘要翻译：本文公开的主题涉及非易失性闪速存储器，更具体地，涉及一种减少应力诱发的漏电流的方法。

7. 发明申请

US20120224430A1 READING MEMORY CELL HISTORY DURING PROGRAM OPERATION FOR ADAPTIVE PROGRAMMING 有权
标题翻译：在自适应编程程序运行期间读取存储单元历史
公开(公告)号：US20120224430A1
公开(公告)日：2012-09-06
申请号：US13040200
申请日：2011-03-03
申请人： Angelo Visconti , Mattia Robustelli , Silvia Beltrami , Laura Czeppel , Massimo Bertuccio
发明人： Angelo Visconti , Mattia Robustelli , Silvia Beltrami , Laura Czeppel , Massimo Bertuccio
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3495 , G11C16/0483 , G11C16/10 , G11C16/3459
摘要： Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a memory device.
摘要翻译：本文公开的主题涉及存储器件，更具体地涉及写入存储器件的性能。

8. 发明申请

US20130033937A1 METHODS FOR PROGRAM VERIFYING A MEMORY CELL AND MEMORY DEVICES CONFIGURED TO PERFORM THE SAME 有权
标题翻译：用于程序验证存储器单元的方法和配置为执行其的存储器件
公开(公告)号：US20130033937A1
公开(公告)日：2013-02-07
申请号：US13204029
申请日：2011-08-05
申请人： Seiichi Aritome , Soojin Wi , Angelo Visconti , Silvia Beltrami , Christian Monzio Compagnoni , Alessandro Sottocornola Spinelli
发明人： Seiichi Aritome , Soojin Wi , Angelo Visconti , Silvia Beltrami , Christian Monzio Compagnoni , Alessandro Sottocornola Spinelli
IPC分类号： G11C16/10
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/3454
摘要： A method for program verify is disclosed, such as one in which a threshold voltage of a memory cell that has been biased with a programming voltage can be determined and its relationship with multiple program verify voltage ranges can be determined. The program verify voltage range in which the threshold voltage is located determines the subsequent bit line voltage. The subsequent bit line voltage may be less than a previous bit line voltage used to program the memory cell.
摘要翻译：公开了一种用于程序验证的方法，例如可以确定已经用编程电压偏置的存储器单元的阈值电压并且可以确定其与多个程序验证电压范围的关系的方法。程序验证阈值电压所在的电压范围决定后续的位线电压。随后的位线电压可以小于用于对存储器单元进行编程的先前位线电压。

9. 发明授权

US08670273B2 Methods for program verifying a memory cell and memory devices configured to perform the same 有权
标题翻译：用于程序验证被配置为执行相同的存储器单元和存储器件的方法
公开(公告)号：US08670273B2
公开(公告)日：2014-03-11
申请号：US13204029
申请日：2011-08-05
申请人： Seiichi Aritome , Soojin Wi , Angelo Visconti , Silvia Beltrami , Christian Monzio Compagnoni , Alessandro Sottocornola Spinelli
发明人： Seiichi Aritome , Soojin Wi , Angelo Visconti , Silvia Beltrami , Christian Monzio Compagnoni , Alessandro Sottocornola Spinelli
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/3454
摘要： A method for program verify is disclosed, such as one in which a threshold voltage of a memory cell that has been biased with a programming voltage can be determined and its relationship with multiple program verify voltage ranges can be determined. The program verify voltage range in which the threshold voltage is located determines the subsequent bit line voltage. The subsequent bit line voltage may be less than a previous bit line voltage used to program the memory cell.
摘要翻译：公开了一种用于程序验证的方法，例如可以确定已经用编程电压偏置的存储器单元的阈值电压并且可以确定其与多个程序验证电压范围的关系的方法。程序验证阈值电压所在的电压范围决定后续的位线电压。随后的位线电压可以小于用于对存储器单元进行编程的先前位线电压。

10. 发明授权

US08619475B2 Methods to operate a memory cell 有权
标题翻译：操作存储单元的方法
公开(公告)号：US08619475B2
公开(公告)日：2013-12-31
申请号：US13204014
申请日：2011-08-05
申请人： Seiichi Aritome , Soojin Wi , Angelo Visconti , Silvia Beltrami , Christian Monzio Compagnoni , Alessandro Sottocornola Spinelli
发明人： Seiichi Aritome , Soojin Wi , Angelo Visconti , Silvia Beltrami , Christian Monzio Compagnoni , Alessandro Sottocornola Spinelli
IPC分类号： G11C11/34
CPC分类号： G11C16/3404 , G11C11/5628 , G11C16/3459
摘要： Memory devices and methods for operating a memory cell are disclosed, such as a method that uses two program verify levels (e.g., low program verify level and program verify level) to determine how a data line voltage should be increased. A threshold voltage of a memory cell that has been biased with a programming voltage is determined and its relationship with the two program verify levels is determined. If the threshold voltage is less than the low program verify level, the data line can be biased at a ground voltage (e.g., 0V) for a subsequent programming pulse. If the threshold voltage is greater than the program verify level, the data line can be biased at an inhibit voltage for a subsequent programming pulse. If the threshold voltage is between the two program verify levels, the data line voltage can be increased for each subsequent programming pulse in which the threshold voltage is between the two program verify levels.
摘要翻译：公开了用于操作存储器单元的存储器件和方法，诸如使用两个程序验证电平（例如，低程序验证电平和程序验证电平）来确定如何增加数据线电压的方法。确定已经用编程电压偏置的存储单元的阈值电压，并确定其与两个程序验证电平的关系。如果阈值电压小于低编程验证电平，则可以将数据线偏置在接地电压（例如0V）以用于随后的编程脉冲。如果阈值电压大于程序验证电平，则数据线可以被偏置在用于后续编程脉冲的禁止电压。如果阈值电压在两个程序验证电平之间，则对于其中阈值电压在两个程序验证电平之间的每个后续编程脉冲，可以增加数据线电压。

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