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1. 发明授权

US09373675B2 Capacitor structure and method of forming the same 有权
标题翻译：电容器结构及其形成方法
公开(公告)号：US09373675B2
公开(公告)日：2016-06-21
申请号：US13367064
申请日：2012-02-06
申请人： Tai-Chun Lin , Wen-Tsao Chen , Chih-Ho Tai , Ming-Ray Mao , Kuan-Chi Tsai
发明人： Tai-Chun Lin , Wen-Tsao Chen , Chih-Ho Tai , Ming-Ray Mao , Kuan-Chi Tsai
IPC分类号： H01L29/92 , H01L49/02 , H01L21/3105 , H01L21/02
CPC分类号： H01L28/40 , H01L21/02164 , H01L21/0217 , H01L21/3105
摘要： Disclosed embodiments include a capacitor structure and a method for forming a capacitor structure. An embodiment is a structure comprising a conductor-insulator-conductor capacitor on a substrate. The conductor-insulator-conductor capacitor comprises a first conductor on the substrate, a dielectric stack over the first conductor, and a second conductor over the dielectric stack. The dielectric stack comprises a first nitride layer, a first oxide layer over the first nitride layer, and a second nitride layer over the first oxide layer. A further embodiment is a method comprising forming a first conductor on a substrate; forming a first nitride layer over the first conductor; treating the first nitride layer with a first nitrous oxide (N2O) treatment to form an oxide layer on the first nitride layer; forming a second nitride layer over the oxide layer; and forming a second conductor over the second nitride layer.
摘要翻译：公开的实施例包括电容器结构和形成电容器结构的方法。实施例是在基板上包括导体 - 绝缘体 - 导体电容器的结构。导体 - 绝缘体 - 导体电容器包括在基板上的第一导体，在第一导体上的电介质堆叠，以及位于介电叠层上的第二导体。电介质堆叠包括第一氮化物层，第一氮化物层上的第一氧化物层和第一氧化物层上的第二氮化物层。另一实施例是一种方法，包括在衬底上形成第一导体; 在所述第一导体上形成第一氮化物层; 用第一氧化亚氮（N2O）处理第一氮化物层以在第一氮化物层上形成氧化物层; 在所述氧化物层上形成第二氮化物层; 以及在所述第二氮化物层上形成第二导体。

2. 发明申请

US20130200490A1 Capacitor Structure and Method of Forming the Same 有权
标题翻译：电容器结构及其形成方法
公开(公告)号：US20130200490A1
公开(公告)日：2013-08-08
申请号：US13367064
申请日：2012-02-06
申请人： Tai-Chun Lin , Wen-Tsao Chen , Chih-Ho Tai , Ming-Ray Mao , Kuan-Chi Tsai
发明人： Tai-Chun Lin , Wen-Tsao Chen , Chih-Ho Tai , Ming-Ray Mao , Kuan-Chi Tsai
IPC分类号： H01L29/92 , H01L21/02
CPC分类号： H01L28/40 , H01L21/02164 , H01L21/0217 , H01L21/3105
摘要： Disclosed embodiments include a capacitor structure and a method for forming a capacitor structure. An embodiment is a structure comprising a conductor-insulator-conductor capacitor on a substrate. The conductor-insulator-conductor capacitor comprises a first conductor on the substrate, a dielectric stack over the first conductor, and a second conductor over the dielectric stack. The dielectric stack comprises a first nitride layer, a first oxide layer over the first nitride layer, and a second nitride layer over the first oxide layer. A further embodiment is a method comprising forming a first conductor on a substrate; forming a first nitride layer over the first conductor; treating the first nitride layer with a first nitrous oxide (N2O) treatment to form an oxide layer on the first nitride layer; forming a second nitride layer over the oxide layer; and forming a second conductor over the second nitride layer.
摘要翻译：公开的实施例包括电容器结构和形成电容器结构的方法。实施例是在基板上包括导体 - 绝缘体 - 导体电容器的结构。导体 - 绝缘体 - 导体电容器包括在基板上的第一导体，在第一导体上的电介质堆叠，以及位于介电叠层上的第二导体。电介质堆叠包括第一氮化物层，第一氮化物层上的第一氧化物层和第一氧化物层上的第二氮化物层。另一实施例是一种方法，包括在衬底上形成第一导体; 在所述第一导体上形成第一氮化物层; 用第一氧化亚氮（N2O）处理第一氮化物层以在第一氮化物层上形成氧化物层; 在所述氧化物层上形成第二氮化物层; 以及在所述第二氮化物层上形成第二导体。

3. 发明申请

US20130207264A1 Stress Reduction Apparatus 有权
标题翻译：减压装置
公开(公告)号：US20130207264A1
公开(公告)日：2013-08-15
申请号：US13370161
申请日：2012-02-09
申请人： Ying-Ti Lu , Wen-Tsao Chen , Ming-Ray Mao , Kuan-Chi Tsai
发明人： Ying-Ti Lu , Wen-Tsao Chen , Ming-Ray Mao , Kuan-Chi Tsai
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/5227 , H01L21/76802 , H01L21/76804 , H01L21/76816 , H01L21/76831 , H01L21/76834 , H01L21/7684 , H01L21/76843 , H01L21/76877 , H01L23/5226 , H01L23/5283 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： A stress reduction apparatus comprises a metal structure formed over a substrate, an inter metal dielectric layer formed over the substrate, wherein a lower portion of the metal structure is embedded in the inter metal dielectric layer and an inverted cup shaped stress reduction layer formed over the metal structure, wherein an upper portion of the metal structure is embedded in the inverted cup shaped stress reduction layer.
摘要翻译：一种应力降低装置，包括：在基板上形成的金属结构体，在基板上形成的金属间介电层，金属结构体的下部嵌入在金属间介电层内，倒置杯状的应力降低层金属结构，其中金属结构的上部嵌入倒杯形应力减少层中。

4. 发明授权

US08629559B2 Stress reduction apparatus with an inverted cup-shaped layer 有权
标题翻译：减压装置具有倒杯形层
公开(公告)号：US08629559B2
公开(公告)日：2014-01-14
申请号：US13370161
申请日：2012-02-09
申请人： Ying-Ti Lu , Wen-Tsao Chen , Ming-Ray Mao , Kuan-Chi Tsai
发明人： Ying-Ti Lu , Wen-Tsao Chen , Ming-Ray Mao , Kuan-Chi Tsai
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/5227 , H01L21/76802 , H01L21/76804 , H01L21/76816 , H01L21/76831 , H01L21/76834 , H01L21/7684 , H01L21/76843 , H01L21/76877 , H01L23/5226 , H01L23/5283 , H01L23/53228 , H01L2924/0002 , H01L2924/00
摘要： A stress reduction apparatus comprises a metal structure formed over a substrate, an inter metal dielectric layer formed over the substrate, wherein a lower portion of the metal structure is embedded in the inter metal dielectric layer and an inverted cup shaped stress reduction layer formed over the metal structure, wherein an upper portion of the metal structure is embedded in the inverted cup shaped stress reduction layer.
摘要翻译：一种应力降低装置，包括：在基板上形成的金属结构体，在基板上形成的金属间介电层，金属结构体的下部嵌入在金属间介电层内，倒置杯状的应力降低层金属结构，其中金属结构的上部嵌入倒杯形应力减少层中。

5. 发明申请

US20120190152A1 Methods for Fabricating Integrated Passive Devices on Glass Substrates 审中-公开
标题翻译：在玻璃基板上制造集成无源器件的方法
公开(公告)号：US20120190152A1
公开(公告)日：2012-07-26
申请号：US13013393
申请日：2011-01-25
申请人： Wen-Chao Chen , Ming-Ray Mao , Shih-Hsien Yang , Kuan-Chi Tsai
发明人： Wen-Chao Chen , Ming-Ray Mao , Shih-Hsien Yang , Kuan-Chi Tsai
IPC分类号： H01L21/02
CPC分类号： H01L24/97 , H01G4/30 , H01G4/306 , H01G4/40 , H01L24/11 , H01L2224/131 , H01L2224/16238 , H01L2224/16268 , H01L2924/14 , H01L2924/15788 , H01L2924/014 , H01L2924/00
摘要： A method includes forming a plurality of dielectric layers over a semiconductor substrate; and forming integrated passive devices in the plurality of dielectric layers. The semiconductor substrate is then removed from the plurality of dielectric layers. A dielectric substrate is bonded onto the plurality of dielectric layers.
摘要翻译：一种方法包括在半导体衬底上形成多个电介质层; 以及在所述多个电介质层中形成集成的无源器件。然后从多个电介质层去除半导体衬底。电介质基板被接合到多个电介质层上。

6. 发明授权

US6046475A Structure and method for manufacturing devices having inverse T-shaped well regions 失效
标题翻译：用于制造具有反T形阱区的器件的结构和方法
公开(公告)号：US6046475A
公开(公告)日：2000-04-04
申请号：US864988
申请日：1997-05-29
申请人： Kow-Ming Chang , Ji-yi Yang , Ming-Ray Mao
发明人： Kow-Ming Chang , Ji-yi Yang , Ming-Ray Mao
IPC分类号： H01L29/10 , H01L31/119
CPC分类号： H01L29/1079
摘要： A structure for manufacturing devices having inverse T-shaped well regions, which are formed on a substrate, comprises a first doped region and second doped region which have higher impurity concentrations and two third doped regions which have a lower impurity concentration. The first doped region formed on the substrate by a high-energy ion-implantation process is kept at a predetermined distance from the surface of the substrate. The second doped region extends from the surface of the substrate toward the downside to connect to the first doped region, such that two third doped regions are formed. The second doped region is formed by an ion-implantation process through an opening of a mask. Furthermore, a gate is formed above the second doped region, and source and drain regions are formed on the substrate. Therefore, a device having an inverse T-shaped well region is completely fabricated.
摘要翻译：用于制造具有反T形阱区的器件的结构，其形成在衬底上，包括具有较高杂质浓度的第一掺杂区和第二掺杂区和具有较低杂质浓度的两个第三掺杂区。通过高能离子注入工艺在衬底上形成的第一掺杂区域保持在离衬底表面预定距离处。第二掺杂区域从衬底的表面向下延伸以连接到第一掺杂区域，使得形成两个第二掺杂区域。第二掺杂区域通过离子注入工艺通过掩模的开口形成。此外，在第二掺杂区域上方形成栅极，并且在衬底上形成源极和漏极区域。因此，具有逆T形阱区域的器件被完全制造。

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