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1. 发明授权

US07432579B2 Semiconductor device with horizontal MOSFET and Schottky barrier diode provided on single substrate 失效
标题翻译：在单个基板上提供具有水平MOSFET和肖特基势垒二极管的半导体器件
公开(公告)号：US07432579B2
公开(公告)日：2008-10-07
申请号：US10959201
申请日：2004-10-07
申请人： Tomoko Matsudai , Kazutoshi Nakamura , Akio Nakagawa
发明人： Tomoko Matsudai , Kazutoshi Nakamura , Akio Nakagawa
IPC分类号： H01L29/47 , H01L29/872
CPC分类号： H01L27/0727
摘要： A MOS field-effect transistor includes a semiconductor substrate of a first-conductivity type, a semiconductor layer of the first-conductivity type, a source region of a second-conductivity type, a first drain region of the second-conductivity type, a resurf layer of the second-conductivity type provided in the surface of the semiconductor layer between the source region and the first drain region in contact with the first drain region, and having a lower impurity concentration than the first drain region, a gate insulation film, and a gate electrode provided on the gate insulation film between the source region and resurf layer. A Schottky barrier diode includes a second drain region of the second-conductivity type provided in the surface of the semiconductor layer separate from the first drain region in a direction away from the gate electrode, and a Schottky electrode provided on the semiconductor layer between the first and second drain regions.
摘要翻译： MOS场效应晶体管包括第一导电类型的半导体衬底，第一导电类型的半导体层，第二导电类型的源极区域，第二导电类型的第一漏极区域，第二导电类型的半导体层，所述第二导电型层设置在与所述第一漏极区域接触的所述源极区域和所述第一漏极区域之间的所述半导体层的表面中，并且具有比所述第一漏极区域低的杂质浓度，栅极绝缘膜和栅电极，设置在源极区域和复合层之间的栅极绝缘膜上。肖特基势垒二极管包括设置在半导体层的表面上的第二导电类型的第二漏极区域，该第二漏极区域在远离栅极电极的方向上与第一漏极区域分开，以及肖特基电极，设置在第一和第二漏区。

2. 发明授权

US06914294B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06914294B2
公开(公告)日：2005-07-05
申请号：US10438069
申请日：2003-05-15
申请人： Kazutoshi Nakamura , Tomoko Matsudai , Yusuke Kawaguchi , Akio Nakagawa
发明人： Kazutoshi Nakamura , Tomoko Matsudai , Yusuke Kawaguchi , Akio Nakagawa
IPC分类号： H01L21/8234 , H01L27/088 , H01L29/08 , H01L29/10 , H01L29/78 , H01L31/113
CPC分类号： H01L29/7835 , H01L29/0847 , H01L29/1083 , H01L29/7801
摘要： A semiconductor device comprises a semiconductor substrate having a main surface; a semiconductor layer of a first conduction type provided on the main surface of said semiconductor substrate; a first buried layer of the first conduction type provided between said semiconductor layer and said semiconductor substrate; a first connection region of the first conduction type provided around said first buried layer, said first connection region extending from the surface of said semiconductor layer to said first buried layer; a switching element provided in the surface region of said semiconductor layer on said first buried layer; and a low breakdown-voltage element provided in a surface region of said semiconductor layer, said low breakdown-voltage element being closer to said first connection region than said switching element and having lower breakdown voltage than that of said switching element.
摘要翻译：半导体器件包括具有主表面的半导体衬底; 设置在所述半导体衬底的主表面上的第一导电类型的半导体层; 设置在所述半导体层和所述半导体衬底之间的第一导电类型的第一掩埋层; 所述第一导电类型的第一连接区域设置在所述第一掩埋层周围，所述第一连接区域从所述半导体层的表面延伸到所述第一掩埋层; 设置在所述第一掩埋层的所述半导体层的表面区域中的开关元件; 以及设置在所述半导体层的表面区域中的低击穿电压元件，所述低击穿电压元件比所述开关元件更靠近所述第一连接区域，并且具有比所述开关元件的击穿电压低的击穿电压。

3. 发明授权

US07579669B2 Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof 失效
标题翻译：包括功率MOS场效应晶体管和其驱动电路驱动的半导体器件
公开(公告)号：US07579669B2
公开(公告)日：2009-08-25
申请号：US11549297
申请日：2006-10-16
申请人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
发明人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
IPC分类号： H01L27/00
CPC分类号： H02M3/158 , H01L27/0922 , H01L29/41758 , H01L29/41775 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H02M1/08 , H02M7/003 , H01L2924/00
摘要： A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has a current path to one end of which an input voltage is supplied, and the other end of the current path is connected to an inductance. The driver circuit is formed on the first semiconductor substrate, on which the high side switching element is formed, and drives the high side switching element. The low side switching element is formed on a second semiconductor substrate separate from the first semiconductor substrate, and has a drain connected to the inductance and a source supplied with a reference potential.
摘要翻译：半导体器件包括高侧开关元件，驱动电路和低侧开关元件。高侧开关元件形成在第一半导体基板上，其一端具有输入电压的电流通路，电流路径的另一端与电感连接。驱动电路形成在形成有高侧开关元件的第一半导体基板上，驱动高侧开关元件。低侧开关元件形成在与第一半导体衬底分离的第二半导体衬底上，并且具有连接到电感的漏极和被提供参考电位的源极。

4. 发明授权

US07138698B2 Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof 失效
公开(公告)号：US07138698B2
公开(公告)日：2006-11-21
申请号：US11007254
申请日：2004-12-09
申请人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
发明人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
IPC分类号： H01L23/58
CPC分类号： H02M3/158 , H01L27/0922 , H01L29/41758 , H01L29/41775 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H02M1/08 , H02M7/003 , H01L2924/00
摘要： A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has a current path to one end of which an input voltage is supplied, and the other end of the current path is connected to an inductance. The driver circuit is formed on the first semiconductor substrate, on which the high side switching element is formed, and drives the high side switching element. The low side switching element is formed on a second semiconductor substrate separate from the first semiconductor substrate, and has a drain connected to the inductance and a source supplied with a reference potential.

5. 发明申请

US20050098845A1 Semiconductor device with horizontal MOSFET and schottky barrier diode provided on single substrate 失效
标题翻译：在单个衬底上提供具有水平MOSFET和肖特基势垒二极管的半导体器件
公开(公告)号：US20050098845A1
公开(公告)日：2005-05-12
申请号：US10959201
申请日：2004-10-07
申请人： Tomoko Matsudai , Kazutoshi Nakamura , Akio Nakagawa
发明人： Tomoko Matsudai , Kazutoshi Nakamura , Akio Nakagawa
IPC分类号： H01L29/872 , H01L21/8234 , H01L27/06 , H01L27/07 , H01L29/47 , H01L29/76
CPC分类号： H01L27/0727
摘要： A MOS field-effect transistor includes a semiconductor substrate of a first-conductivity type, a semiconductor layer of the first-conductivity type, a source region of a second-conductivity type, a first drain region of the second-conductivity type, a resurf layer of the second-conductivity type provided in the surface of the semiconductor layer between the source region and the first drain region in contact with the first drain region, and having a lower impurity concentration than the first drain region, a gate insulation film, and a gate electrode provided on the gate insulation film between the source region and resurf layer. A Schottky barrier diode includes a second drain region of the second-conductivity type provided in the surface of the semiconductor layer separate from the first drain region in a direction away from the gate electrode, and a Schottky electrode provided on the semiconductor layer between the first and second drain regions.
摘要翻译： MOS场效应晶体管包括第一导电类型的半导体衬底，第一导电类型的半导体层，第二导电类型的源极区域，第二导电类型的第一漏极区域，第二导电类型的半导体层，所述第二导电型层设置在与所述第一漏极区域接触的所述源极区域和所述第一漏极区域之间的所述半导体层的表面中，并且具有比所述第一漏极区域低的杂质浓度，栅极绝缘膜和栅电极，设置在源极区域和复合层之间的栅极绝缘膜上。肖特基势垒二极管包括设置在半导体层的表面上的第二导电类型的第二漏极区域，该第二漏极区域在远离栅极电极的方向上与第一漏极区域分开，以及肖特基电极，设置在第一和第二漏区。

6. 发明授权

US06563193B1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06563193B1
公开(公告)日：2003-05-13
申请号：US09670548
申请日：2000-09-27
申请人： Yusuke Kawaguchi , Kazutoshi Nakamura , Tomoko Matsudai , Hirofumi Nagano , Akio Nakagawa
发明人： Yusuke Kawaguchi , Kazutoshi Nakamura , Tomoko Matsudai , Hirofumi Nagano , Akio Nakagawa
IPC分类号： H01L27082
CPC分类号： H01L29/7317 , H01L21/76286 , H01L21/763 , H01L29/735
摘要： A semiconductor device comprises a substrate the surface of which is formed of an insulation region, a high resistance active layer of a first conductivity type formed on the substrate, a first semiconductor region of the first conductivity type having an impurity concentration higher than that of the active layer and selectively formed on a surface of the active layer, an emitter region of the second conductivity type selectively formed on a surface of the semiconductor region, a collector region of the second conductivity type selectively formed on a surface of the active layer, and a base contact region of the first conductivity type selectively formed on a surface of the active layer in separation from the emitter region and the collector region, respectively. When an inversion layer is formed at an interface between the insulation region and the active layer due to the voltage of the substrate, the semiconductor region suppresses an emitter current flowing via the inversion layer thereby allowing the emitter current to flow on the surface side of the active layer.
摘要翻译：半导体器件包括其表面由绝缘区域形成的衬底，形成在衬底上的第一导电类型的高电阻有源层，第一导电类型的第一半导体区域的杂质浓度高于有源层，并且选择性地形成在有源层的表面上，选择性地形成在半导体区域的表面上的第二导电类型的发射极区域，选择性地形成在有源层的表面上的第二导电类型的集电极区域，以及分别在与发射极区域和集电极区域分离的有源层的表面上分别形成有第一导电类型的基极接触区域。当由于衬底的电压而在绝缘区域和有源层之间的界面处形成反型层时，半导体区域抑制通过反转层流动的发射极电流，从而允许发射极电流在活动层

7. 发明申请

US20070063307A1 Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof 失效
标题翻译：包括功率MOS场效应晶体管和其驱动电路驱动的半导体器件
公开(公告)号：US20070063307A1
公开(公告)日：2007-03-22
申请号：US11549297
申请日：2006-10-16
申请人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
发明人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
IPC分类号： H01L23/58
CPC分类号： H02M3/158 , H01L27/0922 , H01L29/41758 , H01L29/41775 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H02M1/08 , H02M7/003 , H01L2924/00
摘要： A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has a current path to one end of which an input voltage is supplied, and the other end of the current path is connected to an inductance. The driver circuit is formed on the first semiconductor substrate, on which the high side switching element is formed, and drives the high side switching element. The low side switching element is formed on a second semiconductor substrate separate from the first semiconductor substrate, and has a drain connected to the inductance and a source supplied with a reference potential.
摘要翻译：半导体器件包括高侧开关元件，驱动电路和低侧开关元件。高侧开关元件形成在第一半导体基板上，其一端具有输入电压的电流通路，电流路径的另一端与电感连接。驱动电路形成在形成有高侧开关元件的第一半导体基板上，驱动高侧开关元件。低侧开关元件形成在与第一半导体衬底分离的第二半导体衬底上，并且具有连接到电感的漏极和被提供参考电位的源极。

8. 发明申请

US20050179472A1 Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof 失效
标题翻译：包括功率MOS场效应晶体管和其驱动电路驱动的半导体器件
公开(公告)号：US20050179472A1
公开(公告)日：2005-08-18
申请号：US11007254
申请日：2004-12-09
申请人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
发明人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
IPC分类号： H01L29/00 , H01L29/78 , H02M1/08 , H02M3/00 , H02M3/158 , H02M7/00 , H03B1/00
CPC分类号： H02M3/158 , H01L27/0922 , H01L29/41758 , H01L29/41775 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H02M1/08 , H02M7/003 , H01L2924/00
摘要： A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has a current path to one end of which an input voltage is supplied, and the other end of the current path is connected to an inductance. The driver circuit is formed on the first semiconductor substrate, on which the high side switching element is formed, and drives the high side switching element. The low side switching element is formed on a second semiconductor substrate separate from the first semiconductor substrate, and has a drain connected to the inductance and a source supplied with a reference potential.
摘要翻译：半导体器件包括高侧开关元件，驱动电路和低侧开关元件。高侧开关元件形成在第一半导体基板上，其一端具有输入电压的电流通路，电流路径的另一端与电感连接。驱动电路形成在形成有高侧开关元件的第一半导体基板上，驱动高侧开关元件。低侧开关元件形成在与第一半导体衬底分离的第二半导体衬底上，并且具有连接到电感的漏极和被提供参考电位的源极。

9. 发明授权

US06380566B1 Semiconductor device having FET structure with high breakdown voltage 有权
标题翻译：具有具有高击穿电压的FET结构的半导体器件
公开(公告)号：US06380566B1
公开(公告)日：2002-04-30
申请号：US09669737
申请日：2000-09-26
申请人： Tomoko Matsudai , Yusuke Kawaguchi , Kazutoshi Nakamura , Hirofumi Nagano , Akio Nakagawa
发明人： Tomoko Matsudai , Yusuke Kawaguchi , Kazutoshi Nakamura , Hirofumi Nagano , Akio Nakagawa
IPC分类号： H01L2974
CPC分类号： H01L29/7824 , H01L29/0847 , H01L29/7816 , H01L29/7835 , H01L29/78624
摘要： An N-MOSFET is formed on an SOI substrate consisting of a semiconductor substrate, an insulating layer and an n−-active layer. A p-well layer, an n-RESURF layer, and an n-diffusion layer are formed in the surface of the n−-active layer between a source electrode and a drain electrode by means of impurity diffusion. The diffusion regions of the p-well layer and the n-RESURF layer overlap with each other. An end of the n-RESURF layer reaches a position below a gate electrode. The diffusion regions of the p-well layer and the n-diffusion layer do not overlap with each other, so that the n-RESURF layer has a region in direct contact with the n−-active layer between the p-well layer and the n-diffusion layer.
摘要翻译：在由半导体衬底，绝缘层和n-活性层组成的SOI衬底上形成N-MOSFET。通过杂质扩散在源电极和漏电极之间的n-活性层的表面上形成p阱层，n-RESURF层和n扩散层。 p阱层和n-RESURF层的扩散区域彼此重叠。 n-RESURF层的一端到达栅电极下方的位置。 p阱层和n扩散层的扩散区域彼此不重叠，使得n-RESURF层具有与p阱层和p阱层之间的n-活性层直接接触的区域 n扩散层。

10. 发明申请

US20100006936A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100006936A1
公开(公告)日：2010-01-14
申请号：US12476147
申请日：2009-06-01
申请人： Tomoko Matsudai , Norio Yasuhara , Kazutoshi Nakamura
发明人： Tomoko Matsudai , Norio Yasuhara , Kazutoshi Nakamura
IPC分类号： H01L29/78
CPC分类号： H01L29/7835 , H01L21/266 , H01L29/0847 , H01L29/1045 , H01L29/1083 , H01L29/1087 , H01L29/66659
摘要： A semiconductor device includes a semiconductor layer of a first conductivity type; a deep well of a second conductivity type formed in a portion of an upper layer portion of the semiconductor layer; a well of the first conductivity type formed in a portion of an upper layer portion of the deep well; a source layer of the second conductivity type formed in the well; a drain layer of the second conductivity type formed in the well apart from the source layer; and a contact layer of the second conductivity type formed outside the well in an upper layer portion of the deep well and connected to the drain layer. The drain layer is electrically connected to the deep well via the well by applying a driving voltage between the source layer and the drain layer.
摘要翻译：半导体器件包括第一导电类型的半导体层; 形成在半导体层的上层部分的一部分中的第二导电类型的深阱; 形成在深井的上层部分的一部分中的第一导电类型的阱; 在井中形成的第二导电类型的源极层; 第二导电类型的漏极层形成在远离源极的阱中; 以及在阱的上层部分中形成在阱外部并连接到漏极层的第二导电类型的接触层。通过在源极层和漏极层之间施加驱动电压，漏极层通过阱与深阱电连接。

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