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1. 发明授权

US08363446B2 Multilevel variable resistance memory cell utilizing crystalline programming states 有权
标题翻译：利用晶体编程状态的多电平可变电阻存储单元
公开(公告)号：US08363446B2
公开(公告)日：2013-01-29
申请号：US12578638
申请日：2009-10-14
申请人： Wolodymyr Czubatyj , Tyler Lowrey , Charles Dennison , Carl Schell
发明人： Wolodymyr Czubatyj , Tyler Lowrey , Charles Dennison , Carl Schell
IPC分类号： G11C11/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
摘要： A method of programming an electrical variable resistance memory device. When applied to variable resistance memory devices that incorporate a phase-change material as the active material, the method utilizes a plurality of crystalline programming states. The crystalline programming states are distinguishable on the basis of resistance, where the resistance values of the different states are stable with time and exhibit little or no drift. As a result, the programming scheme is particularly suited to multilevel memory applications. The crystalline programming states may be achieved by stabilizing crystalline phases that adopt different crystallographic structures or by stabilizing crystalline phases that include mixtures of two or more distinct crystallographic structures that vary in the relative proportions of the different crystallographic structures. The programming scheme incorporates at least two crystalline programming states and further includes at least a third programming state that may be a crystalline, amorphous or mixed crystalline-amorphous state.
摘要翻译：一种编程电可变电阻存储器件的方法。当应用于包含相变材料作为活性材料的可变电阻存储器件时，该方法利用多个晶体编程状态。结晶编程状态可以根据电阻进行区分，其中不同状态的电阻值随时间稳定并且表现出很小的或没有漂移。因此，编程方案特别适用于多层存储器应用。晶体编程状态可以通过稳定采用不同晶体结构的结晶相或通过稳定结晶相来实现，所述结晶相包括两种或更多种不同结晶学结构的混合物，其在不同结晶学结构的相对比例中变化。编程方案包含至少两个晶体编程状态，并且还包括至少第三编程状态，其可以是晶体，无定形或混合晶体 - 非晶状态。

2. 发明申请

US20100027328A1 Multilevel Variable Resistance Memory Cell Utilizing Crystalline Programming States 有权
标题翻译：使用结晶编程国家的多电平可变电阻记忆单元
公开(公告)号：US20100027328A1
公开(公告)日：2010-02-04
申请号：US12578638
申请日：2009-10-14
申请人： Wolodymyr Czubatyj , Tyler Lowrey , Charles Dennison , Carl Schell
发明人： Wolodymyr Czubatyj , Tyler Lowrey , Charles Dennison , Carl Schell
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
摘要： A method of programming an electrical variable resistance memory device. When applied to variable resistance memory devices that incorporate a phase-change material as the active material, the method utilizes a plurality of crystalline programming states. The crystalline programming states are distinguishable on the basis of resistance, where the resistance values of the different states are stable with time and exhibit little or no drift. As a result, the programming scheme is particularly suited to multilevel memory applications. The crystalline programming states may be achieved by stabilizing crystalline phases that adopt different crystallographic structures or by stabilizing crystalline phases that include mixtures of two or more distinct crystallographic structures that vary in the relative proportions of the different crystallographic structures. The programming scheme incorporates at least two crystalline programming states and further includes at least a third programming state that may be a crystalline, amorphous or mixed crystalline-amorphous state.
摘要翻译：一种编程电可变电阻存储器件的方法。当应用于包含相变材料作为活性材料的可变电阻存储器件时，该方法利用多个晶体编程状态。结晶编程状态可以根据电阻进行区分，其中不同状态的电阻值随时间稳定并且表现出很小的或没有漂移。因此，编程方案特别适用于多层存储器应用。晶体编程状态可以通过稳定采用不同晶体结构的结晶相或通过稳定结晶相来实现，所述结晶相包括两种或更多种不同结晶学结构的混合物，其在不同结晶学结构的相对比例中变化。编程方案包含至少两个晶体编程状态，并且还包括至少第三编程状态，其可以是晶体，无定形或混合晶体 - 非晶状态。

3. 发明申请

US20100283029A1 Programmable resistance memory and method of making same 审中-公开
标题翻译：可编程电阻记忆及其制作方法
公开(公告)号：US20100283029A1
公开(公告)日：2010-11-11
申请号：US12454002
申请日：2009-05-11
申请人： Charles Dennison , Wolodymyr Czubatyj , Jeff Fournier , Tom Latowski , James Reed , Regino Sandoval
发明人： Charles Dennison , Wolodymyr Czubatyj , Jeff Fournier , Tom Latowski , James Reed , Regino Sandoval
IPC分类号： H01L45/00 , H01L21/06 , H01L21/20
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/144 , H01L45/1608 , H01L45/1683
摘要： A memory includes multiple layers of deposited memory material. An etch is performed on at least one layer of deposited memory material prior to the deposition of a subsequent layer of memory material.
摘要翻译：存储器包括多层沉积的存储器材料。在沉积后续存储材料层之前，在至少一层沉积的存储材料上进行蚀刻。

4. 发明申请

US20070138467A1 Forming phase change memories 有权
标题翻译：形成相变记忆
公开(公告)号：US20070138467A1
公开(公告)日：2007-06-21
申请号：US11706000
申请日：2007-02-13
申请人： Chien Chiang , Charles Dennison , Tyler Lowrey
发明人： Chien Chiang , Charles Dennison , Tyler Lowrey
IPC分类号： H01L31/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： Phase change memories may exhibit improved properties and lower cost in some cases by forming the phase change material layers in a planar configuration. A heater may be provided below the phase change material layers to appropriately heat the material to induce the phase changes. The heater may be coupled to an appropriate conductor.
摘要翻译：在一些情况下，通过将相变材料层形成为平面构型，相变存储器可以表现出改善的性能和较低的成本。可以在相变材料层的下方设置加热器，以适当地加热材料以引起相变。加热器可以耦合到适当的导体。

5. 发明授权

US07196351B2 Forming phase change memories 有权
公开(公告)号：US07196351B2
公开(公告)日：2007-03-27
申请号：US11013036
申请日：2004-12-15
申请人： Chien Chiang , Charles Dennison , Tyler Lowrey
发明人： Chien Chiang , Charles Dennison , Tyler Lowrey
IPC分类号： H01L29/04 , H01L31/20 , H01L31/036 , H01L31/0376
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： Phase change memories may exhibit improved properties and lower cost in some cases by forming the phase change material layers in a planar configuration. A heater may be provided below the phase change material layers to appropriately heat the material to induce the phase changes. The heater may be coupled to an appropriate conductor.

6. 发明申请

US20050104231A1 Forming phase change memories 有权
公开(公告)号：US20050104231A1
公开(公告)日：2005-05-19
申请号：US11013036
申请日：2004-12-15
申请人： Chien Chiang , Charles Dennison , Tyler Lowrey
发明人： Chien Chiang , Charles Dennison , Tyler Lowrey
IPC分类号： H01L45/00 , A63H3/00 , C30B1/00 , H01L21/20 , H01L23/58
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： Phase change memories may exhibit improved properties and lower cost in some cases by forming the phase change material layers in a planar configuration. A heater may be provided below the phase change material layers to appropriately heat the material to induce the phase changes. The heater may be coupled to an appropriate conductor.

7. 发明授权

US5405788A Method for forming and tailoring the electrical characteristics of semiconductor devices 失效
标题翻译：用于形成和定制半导体器件的电特性的方法
公开(公告)号：US5405788A
公开(公告)日：1995-04-11
申请号：US66835
申请日：1993-05-24
申请人： Monte Manning , Charles Dennison , Howard Rhodes , Tyler Lowrey
发明人： Monte Manning , Charles Dennison , Howard Rhodes , Tyler Lowrey
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/8244 , H01L21/265
CPC分类号： H01L29/66659 , H01L21/823412 , H01L27/11
摘要： A method for forming semiconductor devices includes a low energy implant for tailoring the electrical characteristics of the semiconductor devices. Using the low energy implant, narrow width devices such as access transistors in an SRAM cell, can be fabricated with a low threshold voltage (Vt). The low energy implant is performed on the active areas of a silicon substrate following field isolation and field implant. For an n-conductivity access transistor, the low energy dopant can be an n-type dopant such as phosphorus, arsenic or antimony.
摘要翻译：用于形成半导体器件的方法包括用于调整半导体器件的电特性的低能量注入。使用低能量注入，可以以低阈值电压（Vt）制造诸如SRAM单元中的存取晶体管的窄宽度器件。在场隔离和场植入之后，在硅衬底的有源区域上执行低能量注入。对于n导电性存取晶体管，低能掺杂剂可以是n型掺杂剂，例如磷，砷或锑。

8. 发明申请

US20050124157A1 Utilizing atomic layer deposition for programmable device 审中-公开
标题翻译：利用原子层沉积可编程器件
公开(公告)号：US20050124157A1
公开(公告)日：2005-06-09
申请号：US10971812
申请日：2004-10-22
申请人： Tyler Lowrey , Charles Dennison
发明人： Tyler Lowrey , Charles Dennison
IPC分类号： H01L21/285 , H01L21/768 , H01L27/24 , H01L21/44 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/7685 , H01L21/28562 , H01L21/76888 , H01L27/24
摘要： In an aspect, an apparatus is provided that sets and reprograms the state of programmable devices. In an aspect, a method is provided such that an opening is formed through a dielectric exposing a contact, the contact formed on a substrate. An electrode is conformally deposited on a wall of the dielectric, utilizing atomic layer deposition (ALD). A programmable material is formed on the electrode and a conductor is formed to the programmable material. In an aspect, a barrier is conformally deposited utilizing ALD, between the electrode and the programmable material.
摘要翻译：在一方面，提供一种设置和重新编程可编程设备的状态的设备。在一方面，提供了一种方法，使得通过暴露接触的电介质形成开口，接触形成在基底上。利用原子层沉积（ALD）将电极保形地沉积在电介质的壁上。可编程材料形成在电极上，导体形成可编程材料。在一个方面，在电极和可编程材料之间利用ALD共形沉积屏障。

9. 发明授权

US06869883B2 Forming phase change memories 失效
标题翻译：形成相变记忆
公开(公告)号：US06869883B2
公开(公告)日：2005-03-22
申请号：US10319214
申请日：2002-12-13
申请人： Chien Chiang , Charles Dennison , Tyler Lowrey
发明人： Chien Chiang , Charles Dennison , Tyler Lowrey
IPC分类号： H01L45/00 , H01L21/311
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： Phase change memories may exhibit improved properties and lower cost in some cases by forming the phase change material layers in a planar configuration. A heater may be provided below the phase change material layers to appropriately heat the material to induce the phase changes. The heater may be coupled to an appropriate conductor.
摘要翻译：在一些情况下，通过将相变材料层形成为平面构型，相变存储器可以表现出改善的性能和较低的成本。可以在相变材料层的下方设置加热器，以适当地加热材料以引起相变。加热器可以耦合到适当的导体。

10. 发明授权

US07359227B2 Shared address lines for crosspoint memory 有权
标题翻译：用于交叉点内存的共享地址行
公开(公告)号：US07359227B2
公开(公告)日：2008-04-15
申请号：US11202428
申请日：2005-08-11
申请人： Charles Dennison , Tyler Lowrey
发明人： Charles Dennison , Tyler Lowrey
IPC分类号： G11C5/02
CPC分类号： G11C11/22 , G11C5/063 , G11C11/16 , G11C13/0004 , G11C2213/79
摘要： A crosspoint memory includes a shared address line. The shared address line may be coupled to cells above and below the address line in one embodiment. Voltage biasing may be utilized to select one cell, and to deselect another cell. In this way, each cell may be made up of a selection device and a crosspoint memory element in the same orientation. This may facilitate manufacturing and reduce costs in some embodiments.
摘要翻译：交叉点存储器包括共享地址线。在一个实施例中，共享地址线可以耦合到地址线上方和下方的单元。可以使用电压偏置来选择一个单元，并且取消选择另一个单元。以这种方式，每个单元可以由相同取向的选择装置和交叉点存储元件组成。这在一些实施例中可以促进制造并降低成本。

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