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    • 1. 发明申请
    • Wet-processing apparatus, wet-processing method and storage medium
    • 湿法处理装置,湿法处理方法和储存介质
    • US20080070164A1
    • 2008-03-20
    • US11898510
    • 2007-09-12
    • Yasushi HayashidaYoshitaka Hara
    • Yasushi HayashidaYoshitaka Hara
    • G03C5/00B05B7/00
    • H01L21/6708H01L21/67051H01L21/67225
    • A wet-processing apparatus includes module groups each including plural processing modules and a shared nozzle device to be used in common by the processing module of the module group. The wet-processing apparatus includes plural processing modules not less than four processing modules, for example, six processing modules. The six processing modules are divided into two module groups, namely, first and second module groups each of the three processing modules. Each of the first and the second module group is provided with a nozzle device for pouring a processing solution onto a wafer. The first wafer is delivered to the first processing module, the second wafer is delivered to the processing module of the second module group, the third wafer is delivered to the processing module of the first module group. Thus the successive wafers are delivered alternately to the first and the second module groups.
    • 湿式处理装置包括模块组,每个模块组包括多个处理模块和由模块组的处理模块共同使用的共享喷嘴装置。 湿式处理装置包括不少于四个处理模块的多个处理模块,例如六个处理模块。 六个处理模块分为两个模块组,即三个处理模块中的每一个的第一和第二模块组。 第一和第二模块组中的每一个设置有用于将处理溶液倾倒到晶片上的喷嘴装置。 第一晶片被输送到第一处理模块,第二晶片被输送到第二模块组的处理模块,第三晶片被递送到第一模块组的处理模块。 因此,将连续的晶片交替地传送到第一和第二模块组。
    • 2. 发明申请
    • Coating and developing system, coating and developing method and storage medium
    • 涂层和显影系统,涂层和显影方法和存储介质
    • US20080026153A1
    • 2008-01-31
    • US11826438
    • 2007-07-16
    • Yasushi HayashidaYoshitaka Hara
    • Yasushi HayashidaYoshitaka Hara
    • B05D3/02
    • H01L21/67276G02F1/1303G05B19/41865G05B2219/31428G05B2219/32097G05B2219/45031H01L21/67745Y02P90/20
    • Wafers A1 to A10 of a first lot A and wafers B1 to B10 of a second lot B are processed by a second heating unit at different temperatures, respectively. A wafer W is carried in a processing block included in coating and developing system along a route passing a temperature control unit CPL2, a coating unit BCT, a heating unit LHP2, a temperature control unit CPL3, a coating unit COT, a heating unit LHP3, and a cooling unit COL in that order. The process temperature of the heating unit LHP3 is changed after the last wafer A10 of the first lot A has been processed by the heating unit LHP3. The wafers of the second lot B are carried according to a carrying schedule such that carrying cycles succeeding a carrying cycle in which the first substrate B1 of the second lot B is carried to the second temperature conditioning unit CPL3 carry the substrates B of the second lot B succeeding the first substrate B1 and processed by a heating process by the heating unit LHP2 in due order to a buffer unit BF2, and the wafers B held in the buffer unit BF2 are carried in due order to the downstream modules after the process temperature of the heating unit LHP3 has been changed.
    • 第一批次A的晶片A 1至A 10和第二批次B的晶片B 1至B 10分别由不同温度的第二加热单元处理。 晶片W沿着通过温度控制单元CPL 2,涂布单元BCT,加热单元LHP 2,温度控制单元CPL 3,涂布单元COT, 加热单元LHP 3和冷却单元COL。 在第一批次A的最后一个晶片A 10已被加热单元LHP 3处理之后,加热单元LHP 3的处理温度改变。 第二批次B的晶片根据携带时间表进行,使得在第二批次B的第一基板B 1被运送到第二温度调节单元CPL 3的承载循环之后的承载循环携带第二批次B的基板B, 第二批B在第一基板B 1之后,并且通过加热单元LHP 2按照缓冲单元BF 2的加热处理进行加工,并且保持在缓冲单元BF 2中的晶片B被顺序地运送到下游 加热单元LHP 3的处理温度已经改变后的模块。
    • 3. 发明申请
    • Coating method and coating apparatus
    • 涂布方法和涂布装置
    • US20060251817A1
    • 2006-11-09
    • US11413161
    • 2006-04-28
    • Yoshitaka HaraYasushi Hayashida
    • Yoshitaka HaraYasushi Hayashida
    • B05C13/02B05C11/00B05D3/00
    • H01L21/67742H01L21/67178H01L21/67184H01L21/67745Y10S414/135Y10S414/14
    • A coating apparatus has a stage module, a temperature regulating module which adjusts a temperature of a substrate to a set temperature, a coating module which applies a coating liquid to the temperature-regulated substrate, and a heating module which heats the coating-liquid applied substrate, arranged in a process section in order from an upstream end of transfer along a transfer path of the substrate, and has a dummy stage placed between the coating module and the heating module so that when by means of a substrate transfer mechanism which has an upper arm and a lower arm, provided one on the other and advanceable and retreatable independently of each other, substrates are transferred one by one from an upstream module to a downstream module in order by alternately operating the upper arm and the lower arm, that arm which performs transfer from the temperature regulating module to the coating module differ from that arm which receives a substrate from the heating module, that numbers are sequentially assigned to downstream modules with the stage module at the upstream end taken as a first module, that substrate which is located on the first stage module is received with the upper arm when the temperature regulating module is an even-numbered module, and the substrate located on the first stage module is received with the lower arm when the temperature regulating module is an odd-numbered module.
    • 涂布装置具有台模块,温度调节模块,将基板的温度调节到设定温度,将涂布液施加到温度调节基板的涂布模块,以及加热涂布液的加热模块 基板,沿着基板的传送路径从传送的上游端依次排列在处理部中,并且具有放置在涂布模块和加热模块之间的虚设台阶,使得当通过基板传送机构具有 上臂和下臂彼此独立地设置并且彼此独立地前进和后退,基板通过交替地操作上臂和下臂而依次从上游模块一个接一个地传递到下游模块,该臂 执行从温度调节模块到涂覆模块的传送不同于从加热模块接收基板的臂 s被顺序分配给下游模块,其中在上游端的级模块被认为是第一模块,当温度调节模块是偶数模块时,位于第一级模块上的基板被上臂接收;以及 当温度调节模块是奇数模块时,位于第一级模块上的衬底被下臂接收。
    • 5. 发明授权
    • Coating and developing system, coating and developing method and storage medium
    • 涂层和显影系统,涂层和显影方法和存储介质
    • US07597492B2
    • 2009-10-06
    • US11987661
    • 2007-12-03
    • Yasushi HayashidaYoshitaka Hara
    • Yasushi HayashidaYoshitaka Hara
    • G03D5/00G03B27/32B05C13/00G06F19/00
    • H01L21/67225G03F7/3021H01L21/67196H01L21/6723
    • A buffer module is installed in a coating film forming unit block of a coating and developing system to reduce the number of interface arms needed by an interface block, and the manufacturing cost and footprint of the coating and developing system. For example, buffer modules BF31 to BF34 capable of holding a number of wafers W greater by one than the number of coating modules COT1 to COT3 of a COT layer B3 is installed in the COT layer B3, In the COT layer B3, a wafer W is carried along a carrying route passing a temperature control module CPL3, COT1 to COT3, a heating and cooling module LHP3, and the buffer modules BF31 to BF34. A main arm A3 carries wafers W such that the number of wafers W placed in the modules on the downstream side of the CPL3 is greater by one than the number of modules between the CPL3 and the buffer module when a processing rate at which an exposure system processes wafers W is lower that at which the COT layer B3 processes wafers W.
    • 缓冲模块安装在涂层和显影系统的涂膜形成单元块中,以减少界面块所需的界面臂的数量,以及涂层和显影系统的制造成本和占地面积。 例如,能够将多个晶片W的数量保持在COT层B3的涂覆模块COT1〜COT3的数量1以上的缓冲模块BF31〜BF34安装在COT层B3中。在COT层B3中,晶片W 沿着通过温度控制模块CPL3,COT1至COT3,加热和冷却模块LHP3以及缓冲模块BF31至BF34的携带路线携带。 主臂A3承载晶片W,使得放置在CPL3的下游侧的模块中的晶片W的数量大于CPL3和缓冲模块之间的模块数量,当处理速率为曝光系统 处理晶片W低于COT层B3处理晶片W.
    • 8. 发明授权
    • Coating and developing system control method of controlling coating and developing system
    • 涂料开发系统控制方法
    • US08377501B2
    • 2013-02-19
    • US12438031
    • 2007-09-11
    • Yasushi HayashidaYoshitaka HaraTomohiro Kaneko
    • Yasushi HayashidaYoshitaka HaraTomohiro Kaneko
    • C23C16/52C23C14/54
    • H01L21/67745H01L21/67178H01L21/67276
    • A coating and developing system and control method is provided. The system and control method curtails the amount of time for which a substrate is held with no purpose while improving the throughput of the coating and developing system. An inspection station through which a substrate processed in a processing station is transferred to a carrier station includes a plurality of different inspection modules respectively taking different inspection times, a buffer unit for temporarily holding a substrate and a substrate carrying means controlled by a controller. When the inspection module is engaged in inspecting a substrate, the substrate carrying means carries another substrate to be inspected by the same inspection module to the buffer unit and the substrate is held in the buffer unit. Thus, the holding of wafers in the inspection modules can be suppressed and the throughput can be improved.
    • 提供涂层和显影系统和控制方法。 该系统和控制方法在提高涂层和显影系统的生产量的同时,无需目的地限制基材保持的时间。 将在处理站中处理的基板通过其传送到承载站的检查站包括分别采取不同检查时间的多个不同检查模块,用于临时保持基板的缓冲单元和由控制器控制的基板承载装置。 当检查模块接合检查基板时,基板承载装置将待检查的另一基板由相同的检查模块携带到缓冲单元,并且基板保持在缓冲单元中。 因此,可以抑制检查模块中的晶片的保持,并且可以提高生产量。
    • 9. 发明授权
    • Coating and developing system, coating and developing method and storage medium
    • 涂层和显影系统,涂层和显影方法和存储介质
    • US08025023B2
    • 2011-09-27
    • US11826438
    • 2007-07-16
    • Yasushi HayashidaYoshitaka Hara
    • Yasushi HayashidaYoshitaka Hara
    • B05B7/00
    • H01L21/67276G02F1/1303G05B19/41865G05B2219/31428G05B2219/32097G05B2219/45031H01L21/67745Y02P90/20
    • Wafers A1 to A10 of a first lot A and wafers B1 to B10 of a second lot B are processed by a second heating unit at different temperatures, respectively. A wafer W is carried in a processing block included in coating and developing system along a route passing a temperature control unit CPL2, a coating unit BCT, a heating unit LHP2, a temperature control unit CPL3, a coating unit COT, a heating unit LHP3, and a cooling unit COL in that order. The process temperature of the heating unit LHP3 is changed after the last wafer A10 of the first lot A has been processed by the heating unit LHP3. The wafers of the second lot B are carried according to a carrying schedule such that carrying cycles succeeding a carrying cycle in which the first substrate B1 of the second lot B is carried to the second temperature conditioning unit CPL3 carry the substrates B of the second lot B succeeding the first substrate B1 and processed by a heating process by the heating unit LHP2 in due order to a buffer unit BF2, and the wafers B held in the buffer unit BF2 are carried in due order to the downstream modules after the process temperature of the heating unit LHP3 has been changed.
    • 第一批次A的晶片A1至A10和第二批次B的晶片B1至B10分别由不同温度的第二加热单元处理。 沿着通过温度控制单元CPL2,涂布单元BCT,加热单元LHP2,温度控制单元CPL3,涂布单元COT,加热单元LHP3的路线,在包括在涂布显影系统中的处理块中承载晶片W. ,以及冷却单元COL。 在第一批次A的最后一个晶片A10已被加热单元LHP3处理之后,加热单元LHP3的处理温度改变。 第二批次B的晶片根据携带时间表进行,使得在第二批次B的第一基板B1被承载到第二温度调节单元CPL3的承载循环之后的承载循环携带第二批次的基板B B在第一衬底B1之后,并且通过加热单元LHP2按照缓冲单元BF2进行加热处理,并且保持在缓冲单元BF2中的晶片B在处理温度为 加热单元LHP3已被改变。