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    • 8. 发明申请
    • Front-End Circuit of Low Supply-Voltage Memory Interface Receiver
    • 低电源电压存储器接口接收器的前端电路
    • US20120249247A1
    • 2012-10-04
    • US13077600
    • 2011-03-31
    • Ying-Yu Hsu
    • Ying-Yu Hsu
    • H03F3/04
    • H03F3/45179H03F2203/45506H03F2203/45646
    • A circuit includes a reference voltage generator configured to generate a first reference voltage and a second reference voltage, wherein the first reference voltage is higher than a half of a positive power supply voltage, and the second reference voltage is lower than the half of the positive power supply voltage. An n-type differential amplifier includes a first and a second NMOS transistor, wherein a gate of the first NMOS transistor is coupled to an input node, and a gate of the second NMOS transistor is configured to receive the first reference voltage. A p-type differential amplifier is operated by the positive supply voltage and includes a first and a second PMOS transistor. A gate of the first PMOS transistor is coupled to the input node, and a gate of the second PMOS transistor is configured to receive the second reference voltage.
    • 电路包括:参考电压发生器,被配置为产生第一参考电压和第二参考电压,其中所述第一参考电压高于正电源电压的一半,并且所述第二参考电压低于所述正电压的一半 电源电压。 n型差分放大器包括第一和第二NMOS晶体管,其中第一NMOS晶体管的栅极耦合到输入节点,并且第二NMOS晶体管的栅极被配置为接收第一参考电压。 p型差分放大器由正电源电压工作,并且包括第一和第二PMOS晶体管。 第一PMOS晶体管的栅极耦合到输入节点,并且第二PMOS晶体管的栅极被配置为接收第二参考电压。