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    • 1. 发明授权
    • Linear, large swing active resistive circuit and method
    • 线性,大摆幅有源电阻电路及方法
    • US08305140B1
    • 2012-11-06
    • US13199693
    • 2011-09-07
    • Du ChenKemal S. Demirci
    • Du ChenKemal S. Demirci
    • H03F3/68
    • H03F3/45475H03F3/195H03F2200/294H03F2203/45511H03F2203/45521H03F2203/45524H03F2203/45528
    • Active resistive circuitry (10, 10A, 11, 11A 25, 30, 35, or 40) includes a first current divider circuit (11) having an input (15) coupled to a first signal (Vi). The first current divider circuit (11) includes a first amplifier (13) having a first input (−) coupled to the first signal (Vi). A symmetrically bilateral first bidirectional circuit (M1a,M1b; R1) is coupled between the first input (−) of the first amplifier (13) and an output (17) of the first amplifier (13), and functions as a feedback circuit of the first amplifier (13). A symmetrically bilateral second bidirectional circuit (M2a,M2b; R2) is coupled between the output (17) of the first amplifier (13) and an output (18) of the first current divider circuit (11).
    • 有源电阻电路(10,10A,11,11A,25,30,35或40)包括具有耦合到第一信号(Vi)的输入(15)的第一分流器电路(11)。 第一分频器电路(11)包括具有耦合到第一信号(Vi)的第一输入( - )的第一放大器(13)。 对称双向第一双向电路(M1a,M1b; R1)耦合在第一放大器(13)的第一输入( - )和第一放大器(13)的输出(17)之间,并且用作反馈电路 第一放大器(13)。 对称双边第二双向电路(M2a,M2b; R2)耦合在第一放大器(13)的输出(17)和第一分流器电路(11)的输出(18)之间。
    • 3. 发明授权
    • Method and system for converting an optical received pulse train into an electrical output pulse train
    • 将光接收脉冲串转换为电输出脉冲串的方法和系统
    • US07536114B2
    • 2009-05-19
    • US11405023
    • 2006-04-14
    • Michael GieselerManfred Sorst
    • Michael GieselerManfred Sorst
    • H04B10/06H04B1/10H04L27/08H03K17/78
    • H04B10/6933H03F3/45085H03F3/45183H03F3/45475H03F2203/45512H03F2203/45524H03F2203/45526H03F2203/45702H03G1/007H03G3/3084H03K5/082H03K5/1534H03K5/2445H03K5/2481
    • The aim of the invention, which concerns a method and a system for converting an optical received pulse train into an electrical output pulse train, is to create a method and an associated circuit arrangement for converting an optical received pulse train into an electrical output pulse train whereby achieving an improvement in transmission quality and a reduction in latency time. According to the invention, the aim, with regard to the method, is achieved by virtue of the fact that: the current pulse train is converted in a controlled manner into a first voltage pulse train; the first voltage pulse train is converted into a second voltage pulse train by controllably limiting its amplitude; according to the amplitude of the second voltage pulse train, a third voltage pulse train, which is free from a static offset of the second voltage pulse train, is generated so that it is lower than a first amplitude quantity, and the third voltage pulse train, which is free from a dynamic offset, is generated so that it is greater than a second amplitude quantity that is greater than the first amplitude quantity; in the event of a packet pause, the amplitude of the third voltage pulse train is set to zero, and; the output pulse train is generated from the third voltage pulse train.
    • 涉及将光接收脉冲串转换为电输出脉冲串的方法和系统的本发明的目的是创建一种方法和相关联的电路装置,用于将光接收脉冲串转换成电输出脉冲串 从而实现传输质量的改善和延迟时间的减少。 根据本发明,关于该方法的目的是通过以下事实实现的:将当前脉冲串以受控的方式转换成第一电压脉冲串; 通过可控地限制其幅度将第一电压脉冲串转换成第二电压脉冲串; 根据第二电压脉冲串的振幅,产生没有第二电压脉冲串的静态偏移的第三电压脉冲串,使其低于第一振幅,第三电压脉冲串 产生没有动态偏移的信号,使得其大于大于第一幅度量的第二幅度量; 在数据包暂停的情况下,将第三电压脉冲串的振幅设定为零, 从第三电压脉冲串产生输出脉冲串。
    • 4. 发明授权
    • Variable gain amplifier and variable gain amplifier module
    • 可变增益放大器和可变增益放大器模块
    • US07391260B2
    • 2008-06-24
    • US11510403
    • 2006-08-25
    • Young Ho KimMun Yang ParkHyun Kyu Yu
    • Young Ho KimMun Yang ParkHyun Kyu Yu
    • H03F1/36H03F3/45
    • H03G1/007H03F1/08H03F1/34H03F3/45475H03F2200/381H03F2203/45138H03F2203/45522H03F2203/45524
    • An analog variable gain amplifier (VGA) adjusting a signal level of a mobile communication system is provided. More particularly, design of a VGA using an operational transconductance amplifier (OTA) having a wide linear input/output range is disclosed. The VGA includes two double-differential-pair OTAs and feedback resistors. A first differential input of a first double differential pair OTA receives an input signal from the forward stage, and a second differential input is negatively fed back through a differential output and a passive resistor. An input in which a first block of the connection structure and first and second differential inputs of a second double differential pair OTA are connected receives an output signal of the first block stage. The output is negatively fed back in series through a variable resistor whose resistance varies exponentially with an adjustment voltage from outside. According to the VGA, it is possible to provide a characteristic of linear variation of gain on a logarithmic scale with respect to a control voltage with a simple and inexpensive constitution. In addition, the VGA can be designed for a low pass filter having a conventional OTA used for a core circuit, and has a simple circuit structure. Therefore, the VGA is convenient for high integration and low-power design, and thus is appropriate for a terminal chip and so forth.
    • 提供了调整移动通信系统的信号电平的模拟可变增益放大器(VGA)。 更具体地,公开了使用具有宽线性输入/输出范围的运算跨导放大器(OTA)的VGA的设计。 VGA包括两个双差分对OTA和反馈电阻。 第一双差分对OTA的第一差分输入接收来自前级的输入信号,并且第二差分输入通过差分输出和无源电阻负反馈。 其中连接结构的第一块和第二双差分对OTA的第一和第二差分输入相连接的输入端接收第一块级的输出信号。 输出通过可变电阻串联负反馈,其电阻随外部调整电压呈指数变化。 根据VGA,可以以简单且便宜的结构提供相对于控制电压的对数标度的增益的线性变化的特性。 此外,VGA可以设计用于具有用于核心电路的常规OTA的低通滤波器,并且具有简单的电路结构。 因此,VGA对于高集成度和低功耗设计是方便的,因此适用于终端芯片等。
    • 9. 发明申请
    • High gain amplifier method using low-valued resistances
    • 使用低电阻的高增益放大器方法
    • US20130049857A1
    • 2013-02-28
    • US13199592
    • 2011-09-02
    • Andrew Myles
    • Andrew Myles
    • H03F3/45
    • H03F1/34H03F3/45H03F2203/45524
    • This invention discloses circuit and methods of a NAND-based 2T-string NOR flash cell structure as a building block for a fast random-read NOR flash memory. The key concept of this new set of bias conditions in cell array improves over the critical concern of punch-through issue when cell is migrating to the more advanced technology node of next generation. The invention adopts a novel preferable symmetrical 2T-string NOR flash cell. Each NAND or NAND like cell of this 2T-string NOR cell is to store 2 bits and is preferable to be made of N-channel device. The cell is preferable to use Fowler-Nordheim Tunneling scheme for both erase and program operations- The invention is to provide a novel 2T-string NOR flash cell structure made of N-channel device offering most flexible erase sizes in unit of byte, page, sector, block and chip with the least program and erase disturbances.
    • 本发明公开了一种基于NAND的2T串NOR闪存单元结构作为快速随机读取NOR闪速存储器的构建块的电路和方法。 当细胞迁移到下一代更先进的技术节点时,这种新的单元阵列偏置条件的关键概念改进了穿孔问题的关键问题。 本发明采用新型优选对称2T串NOR闪存单元。 该2T串NOR单元的每个NAND或NAND类型的单元将存储2位,并且优选地由N沟道器件制成。 该单元优选使用Fowler-Nordheim隧道方案进行擦除和编程操作 - 本发明是提供一种由N通道器件构成的新型2T串NOR闪存单元结构,以字节,页面为单位提供最灵活的擦除大小, 扇区,块和芯片具有最少的编程和擦除干扰。