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1. 发明申请

US20170317668A1 Method and Apparatus for an Active Negative-Capacitor Circuit to Cancel the Input Capacitance of Comparators 审中-公开
公开(公告)号：US20170317668A1
公开(公告)日：2017-11-02
申请号：US15652934
申请日：2017-07-18
申请人： Tensorcom, Inc.
发明人： Dai Dai
IPC分类号： H03K5/24 , H03H11/48 , H03M1/00 , H03M1/18 , H03M1/08
CPC分类号： H03K5/2481 , H03H11/481 , H03M1/002 , H03M1/0836 , H03M1/0845 , H03M1/183
摘要： A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier

2. 发明申请

US20170149415A1 FLOATING IMMITTANCE EMULATOR 有权
公开(公告)号：US20170149415A1
公开(公告)日：2017-05-25
申请号：US15337414
申请日：2016-10-28
申请人： KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
发明人： MUHAMMAD TAHER ABUELMA'ATTI , SAGAR KUMAR DHAR
IPC分类号： H03H11/48 , H03H11/46
CPC分类号： H03H11/485 , H03H11/1217 , H03H11/481 , H03H11/53 , H03H2011/0477 , H03K5/02
摘要： The floating immittance emulator is presented in four embodiments in which four new topologies for emulating floating immittance functions are detailed. Each circuit uses three current-feedback operational-amplifiers (CFOAs) and three passive elements. The present topologies can emulate lossless and lossy floating inductances; capacitance, resistance, and inductance multipliers; and frequency-dependent positive and negative resistances.

3. 发明申请

US20170063362A1 Method and Apparatus for an Active Negative-Capacitor Circuit to Cancel the Input Capacitance of Comparators 有权
标题翻译：用于消除比较器的输入电容的有源负电容电路的方法和装置
公开(公告)号：US20170063362A1
公开(公告)日：2017-03-02
申请号：US15340430
申请日：2016-11-01
申请人： Tensorcom, Inc.
发明人： Dai Dai
IPC分类号： H03K5/24 , H03H11/48
CPC分类号： H03K5/2481 , H03H11/481 , H03M1/002 , H03M1/0836 , H03M1/0845 , H03M1/183
摘要： A circuit comprises a first amplifier coupled to a first and a second node; a differential capacitive load coupled to the first and the second node, the differential capacitive load coupled between drains of transistors in a cross coupled transistor circuit; a current mirror coupled to a source of each transistor; and a capacitor coupled between the sources of the transistors. A plurality of amplifiers can be coupled to the differential capacitive load, wherein each amplifier comprises a clock-less pre-amplifier of a comparator. The amplifiers may be abutted to one another such that an active transistor of a first differential stage in a first amplifier behaves as a dummy transistor for an adjacent differential stage in a second amplifier
摘要翻译：电路包括耦合到第一和第二节点的第一放大器; 耦合到第一和第二节点的差分电容性负载，耦合在交叉耦合晶体管电路中的晶体管的漏极之间的差分电容性负载; 耦合到每个晶体管的源极的电流镜; 以及耦合在晶体管的源极之间的电容器。多个放大器可以耦合到差分电容性负载，其中每个放大器包括比较器的无时钟前置放大器。放大器可以彼此邻接，使得第一放大器中的第一差分级的有源晶体管在第二放大器中用作相邻差分级的虚拟晶体管

4. 发明授权

US09264056B2 Method and apparatus for an active negative-capacitor circuit to cancel the input capacitance of comparators 有权
标题翻译：用于消除比较器的输入电容的有源负电容电路的方法和装置
公开(公告)号：US09264056B2
公开(公告)日：2016-02-16
申请号：US14672214
申请日：2015-03-29
申请人： Tensorcom, Inc.
发明人： Dai Dai
IPC分类号： H03M1/12 , H03M1/00 , H03K5/24 , H03M1/08 , H03M1/18 , H03H11/48
CPC分类号： H03K5/2481 , H03H11/481 , H03M1/002 , H03M1/0836 , H03M1/0845 , H03M1/183
摘要： The differential output of a Programmable Gain Amplifier (PGA) is loaded by the input differential gate capacitance of a plurality of Analog to Digital convertors (ADC) comparators and the differential metal layer traces to interconnect these comparators to the PGA. The differential capacitive load presented to the PGA is quite large and reduces the bandwidth of this interconnect between the PGA and ADC. To overcome the performance degradation due to the differential capacitive load, an active negative-capacitor circuit cancels the effect of the large input capacitance of the ADC comparators. This cancelation extends the gain characteristics of the interconnect between the PGA's output and the inputs of the first stage of the comparators. The active negative-capacitance is comprised of a cross pair NMOS with a capacitor connecting their sources where each NMOS is biased by a current source.
摘要翻译：可编程增益放大器（PGA）的差分输出由多个模数转换器（ADC）比较器的输入差分栅极电容和差分金属层迹线加载，以将这些比较器与PGA互连。提供给PGA的差分电容性负载相当大，并降低了PGA和ADC之间的这种互连的带宽。为了克服由于差分电容性负载引起的性能下降，有源负电容电路消除了ADC比较器的大输入电容的影响。该取消扩展了PGA输出与比较器的第一级的输入之间的互连的增益特性。有源负电容由交叉对NMOS组成，其中电容器连接其源极，其中每个NMOS由电流源偏置。

5. 发明申请

US20150137616A1 BST CAPACITOR CONTROL 有权
标题翻译： BST电容控制
公开(公告)号：US20150137616A1
公开(公告)日：2015-05-21
申请号：US14549358
申请日：2014-11-20
申请人： STMicroelectronics (Tours) SAS
发明人： Sylvain CHARLEY
IPC分类号： H01G7/00
CPC分类号： H01G7/00 , H03H11/481 , H03H11/483
摘要： A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.
摘要翻译：一种用于控制电容器的电路，该电容器具有可通过偏置调整的电容，包括用于传送直流偏置电压的放大器，具有由电阻和电容单元减慢的反馈。

6. 发明申请

US20140062621A1 Method and Apparatus for an Active Negative-Capacitor Circuit to Cancel the Input Capacitance of Comparators 有权
标题翻译：用于消除比较器的输入电容的有源负电容电路的方法和装置
公开(公告)号：US20140062621A1
公开(公告)日：2014-03-06
申请号：US13602216
申请日：2012-09-03
申请人： Dai Dai
发明人： Dai Dai
IPC分类号： H03H11/44
CPC分类号： H03K5/2481 , H03H11/481 , H03M1/002 , H03M1/0836 , H03M1/0845 , H03M1/183
摘要： The differential output of a Programmable Gain Amplifier (PGA) is loaded by the input differential gate capacitance of a plurality of Analog to Digital converters (ADC) comparators and the differential metal layer traces to interconnect these comparators to the PGA. The differential capacitive load presented to the PGA is quite large and reduces the bandwidth of this interconnect between the PGA and ADC. To overcome the performance degradation due to the differential capacitive load, an active negative-capacitor circuit cancels the effect of the large input capacitance of the ADC comparators. This cancellation extends the gain characteristics of the interconnect between the PGA's output and the inputs of the first stage of the comparators. The active negative-capacitance is comprised of a cross pair NMOS with a capacitor connecting their sources where each NMOS is biased by a current source.
摘要翻译：可编程增益放大器（PGA）的差分输出由多个模数转换器（ADC）比较器的输入差分栅极电容和差分金属层迹线加载，以将这些比较器与PGA互连。提供给PGA的差分电容性负载相当大，并降低了PGA和ADC之间的这种互连的带宽。为了克服由于差分电容性负载引起的性能下降，有源负电容电路消除了ADC比较器的大输入电容的影响。这种消除延长了PGA输出与比较器的第一级的输入之间的互连的增益特性。有源负电容由交叉对NMOS组成，其中电容器连接其源极，其中每个NMOS由电流源偏置。

7. 发明授权

US07525468B2 Variable passive components with high resolution value selection and control 失效
标题翻译：可变无源元件具有高分辨率值选择和控制
公开(公告)号：US07525468B2
公开(公告)日：2009-04-28
申请号：US12060044
申请日：2008-03-31
申请人： Robert D. Washburn , Robert F. McClanahan
发明人： Robert D. Washburn , Robert F. McClanahan
IPC分类号： H03M1/66
CPC分类号： H03H7/25 , H03F1/08 , H03F1/3211 , H03F1/56 , H03F3/343 , H03F3/4508 , H03F3/45475 , H03F2200/222 , H03F2200/321 , H03F2200/387 , H03F2200/91 , H03F2203/45031 , H03F2203/45136 , H03F2203/45352 , H03H7/40 , H03H11/30 , H03H11/48 , H03H11/481 , H03H11/53
摘要： The present system provides a method for varying the value of passive components in electronic circuits. Passive components can range from basic resistors, capacitors, and inductors to complex, structures such as transmission lines and resonant cavities. Value selection and variation can either be dynamically performed during circuit operation or as a one-time part of the manufacturing process as determined by the requirements of the specific application. A digital-to-analog converter (DAC) circuit is used to input value selection data digitally, and control value selection with value resolution dependent on the resolution of the DAC. An alternate embodiment is provided for high frequency operation.
摘要翻译：本系统提供了一种改变电子电路中无源元件的值的方法。无源元件可以从基本的电阻器，电容器和电感器到复杂的结构，如传输线和谐振腔。价值选择和变化可以在电路运行期间动态执行，也可以作为制造过程的一次性部分，由特定应用的要求确定。数模转换器（DAC）电路用于数字输入值选择数据，并根据DAC的分辨率根据值分辨率进行控制值选择。提供了用于高频操作的替代实施例。

8. 发明申请

US20080088390A1 NEGATIVE CAPACITY CIRCUIT FOR HIGH FREQUENCIES APPLICATIONS 有权
标题翻译：用于高频应用的负载能力电路
公开(公告)号：US20080088390A1
公开(公告)日：2008-04-17
申请号：US11840140
申请日：2007-08-16
申请人： Andreia Cathelin , Stephane Razafimandimby , Cyrille Tilhac
发明人： Andreia Cathelin , Stephane Razafimandimby , Cyrille Tilhac
IPC分类号： H03H9/00
CPC分类号： H03B5/326 , H03B5/366 , H03H11/481
摘要： A negative capacity circuit comprising: a first branch connected between a first reference voltage and a second voltage reference, said first branch comprising, in series, a first biasing resistor, a first diode, a collector-emitter junction of a first bipolar transistor and a first current source; a second branch connected between said first reference voltage (Vdd) and said second reference voltage, said second branch comprising, in series, a second biasing resistor, a second diode, a collector-emitter junction of a second bipolar transistor and a second current source, said first transistor having a base terminal which is coupled to the collector terminal of said second transistor and to one input, and said second transistor having a base terminal which is coupled to the collector terminal of said first transistor and to another input; a capacitor connected between the emitter terminal of said first bipolar transistor and the emitter terminal of said second bipolar transistor; a linearization resistor which is coupled in parallel between the two emitter terminals of said first and said second bipolar transistors.
摘要翻译：一种负容量电路，包括：连接在第一参考电压和第二参考电压之间的第一分支，所述第一分支串联包括第一偏压电阻器，第一二极管，第一双极晶体管的集电极 - 发射极结和第一电流源; 连接在所述第一参考电压（Vdd）和所述第二参考电压之间的第二分支，所述第二分支串联包括第二偏置电阻器，第二二极管，第二双极晶体管的集电极 - 发射极结和第二电流源所述第一晶体管具有耦合到所述第二晶体管的集电极端子的基极端子和一个输入端，所述第二晶体管具有耦合到所述第一晶体管的集电极端子和另一输入端的基极端子; 连接在所述第一双极晶体管的发射极端子和所述第二双极晶体管的发射极端子之间的电容器; 线性化电阻器并联在所述第一和所述第二双极晶体管的两个发射极端子之间。

9. 发明申请

US20070247244A1 Voltage-Controlled Oscillator 有权
标题翻译：电压控制振荡器
公开(公告)号：US20070247244A1
公开(公告)日：2007-10-25
申请号：US11629531
申请日：2005-03-07
申请人： Masaomi Tsuru , Kenji Kawakami , Kenichi Tajima , Moriyasu Miyazaki , Kazuhiro Miyamoto , Masafumi Nakane
发明人： Masaomi Tsuru , Kenji Kawakami , Kenichi Tajima , Moriyasu Miyazaki , Kazuhiro Miyamoto , Masafumi Nakane
IPC分类号： H03B5/12 , H03B5/18
CPC分类号： H03H11/44 , H03B5/1203 , H03B5/1228 , H03B5/1231 , H03B5/1243 , H03B5/1293 , H03B2200/0042 , H03H11/28 , H03H11/481
摘要： A voltage-controlled oscillator has a tuned circuit for controlling the oscillation frequency. The tuned circuit has a variable-capacitance element whose capacitance varies in response to a control voltage and a negative capacitance circuit whose impedance frequency characteristics have opposite characteristics to those of a normal capacitance, and which is connected to the variable-capacitance element. The configuration enables increasing the variation ratio corresponding to the control voltage of the combined capacitance composed of the variable-capacitance element and negative capacitance circuit, thereby broadening the oscillation frequency band.
摘要翻译：压控振荡器具有用于控制振荡频率的调谐电路。调谐电路具有可变电容元件，其电容响应于阻抗频率特性与正常电容具有相反特性的控制电压和负电容电路而变化，并且连接到可变电容元件。该配置能够增加与由可变电容元件和负电容电路组成的组合电容的控制电压相对应的变化率，从而使振荡频带变宽。

10. 发明申请

US20030058024A1 Integrated electronic circuit including non-linear devices 有权
标题翻译：集成电子电路包括非线性器件
公开(公告)号：US20030058024A1
公开(公告)日：2003-03-27
申请号：US10216562
申请日：2002-08-09
申请人： STMicroelectronics S.r.I.
发明人： Maurizio Zuffada , Giorgio Betti , Francesco Chrappan Soldavini , Martin Aureliano Hassner
IPC分类号： G06F001/00
CPC分类号： H03H11/481
摘要： An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as a capacitor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.
摘要翻译：集成电子电路包括级联连接在一起的多个有源电路。反馈回路在最后一个有效电路的输出和第一有源电路的输入之间，使得多个有源器件用作诸如电容器之类的非线性器件。集成电子电路可以与包括其他非线性装置的电路网络相关联地集成或使用。

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