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1. 发明授权

US11863192B2 Radio-frequency (RF) apparatus for digital frequency synthesizer including sigma-delta modulator and associated methods 有权
公开(公告)号：US11863192B2
公开(公告)日：2024-01-02
申请号：US17855537
申请日：2022-06-30
申请人： Silicon Laboratories Inc.
发明人： John M. Khoury
IPC分类号： H03L7/099 , H03L7/085 , G06F1/02 , H03B5/12 , H03L7/14 , H03L7/189 , H03L7/197
CPC分类号： H03L7/0991 , G06F1/022 , H03B5/1206 , H03B5/1212 , H03B5/1218 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03L7/085 , H03L7/099 , H03L7/0992 , H03L7/148 , H03L7/189 , H03L7/1974
摘要： An apparatus includes a digitally controlled oscillator (DCO), which includes an inductor coupled in series with a first capacitor. The DCO further includes a second capacitor coupled in parallel with the series-coupled inductor and first capacitor, a first inverter coupled in parallel with the second capacitor, and a second inverter coupled back-to-back to the first inverter. The DCO further includes a digital-to-analog-converter (DAC) to vary a capacitance of the first capacitor.

2. 发明申请

US20180123606A1 COARSE ADJUSTMENT CELL ARRAY APPLIED TO DIGITALLY CONTROLLED OSCILLATOR AND RELATED APPARATUS 审中-公开
公开(公告)号：US20180123606A1
公开(公告)日：2018-05-03
申请号：US15858998
申请日：2017-12-29
申请人： Huawei Technologies Co., Ltd.
发明人： Fei Cai , Shenghua Zhou
IPC分类号： H03L7/14 , H03L7/187
CPC分类号： H03L7/148 , H03L7/099 , H03L7/187 , H03L2207/06
摘要： The disclosure discloses a coarse adjustment cell array applied to a digitally controlled oscillator and a related apparatus. The coarse adjustment cell array applied to the digitally controlled oscillator includes X coarse adjustment cells, and each coarse adjustment cell in the coarse adjustment cell array includes a logic cell and W fine adjustment cells; and input to a logic cell of a coarse adjustment cell i in the coarse adjustment cell array includes Y coarse adjustment control bits and W fine adjustment control bits, output from the logic cell of the coarse adjustment cell i is used to control whether W fine adjustment cells in the coarse adjustment cell i work, Y is an integer greater than 1, and X and W are integers greater than 1.

3. 发明授权

US08532243B2 Digital hold in a phase-locked loop 有权
标题翻译：数字保持在锁相环
公开(公告)号：US08532243B2
公开(公告)日：2013-09-10
申请号：US11673819
申请日：2007-02-12
申请人： Srisai R. Seethamraju , Jerrell P. Hein , Kenneth Kin Wai Wong , Qicheng Yu
发明人： Srisai R. Seethamraju , Jerrell P. Hein , Kenneth Kin Wai Wong , Qicheng Yu
IPC分类号： H03D3/24
CPC分类号： G06F1/04 , H03L7/146 , H03L7/148 , H03L7/18
摘要： A technique that is readily implemented in monolithic integrated circuits includes a method including generating an output clock signal during a presence of a reference clock signal based, at least in part, on a digital control value indicating a phase difference between a feedback signal of a PLL and a reference clock signal. The method includes generating the output clock signal during an absence of the reference clock signal and based, at least in part, on an average digital control word indicating an average value of a number of samples of the digital control value during the presence of the reference clock signal, the number of samples preceding the absence of the reference clock signal by a delay period. The number of samples is selected from a plurality of numbers of samples and the delay period is selected from a plurality of delay periods.
摘要翻译：在单片集成电路中容易实现的一种技术包括一种方法，包括至少部分地基于指示PLL的反馈信号之间的相位差的数字控制值，在参考时钟信号存在期间产生输出时钟信号和参考时钟信号。所述方法包括在缺少参考时钟信号期间产生输出时钟信号，并且至少部分地基于平均数字控制字，该数字控制字指示在存在参考时数字控制值的采样数目的平均值时钟信号，在参考时钟信号不存在之前的采样数量延迟时间。从多个样本中选择样本数，并且从多个延迟周期中选择延迟周期。

4. 发明申请

US20130030881A1 METHODS AND APPARATUS FOR PERFORMING FINANCIAL TRANSACTIONS 审中-公开
标题翻译：执行财务交易的方法和手段
公开(公告)号：US20130030881A1
公开(公告)日：2013-01-31
申请号：US13555005
申请日：2012-07-20
申请人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , David K. Ovard , Shu-Sun Yu , Robert R. Rotzoll
发明人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , David K. Ovard , Shu-Sun Yu , Robert R. Rotzoll
IPC分类号： G06Q40/00 , G06Q50/30
CPC分类号： G06K19/0716 , G06K7/0008 , G06K7/10059 , G06K19/0707 , G06K19/0712 , G06K19/0723 , G06K19/0726 , G06K19/07749 , G06K19/07758 , H01Q1/2225 , H03L7/0995 , H03L7/148
摘要： A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.
摘要翻译：射频识别装置包括包括接收器，发射器和微处理器的集成电路。接收机和发射机一起定义了一个有效的应答器。集成电路优选地是包括接收器，发射器和微处理器的单片单片集成电路。由于该设备包括有源应答器，而不是依赖于磁耦合功率的转发器，该器件具有更大的范围。

5. 发明授权

US07825774B2 Radio frequency communications devices 有权
标题翻译：射频通信设备
公开(公告)号：US07825774B2
公开(公告)日：2010-11-02
申请号：US11977232
申请日：2007-10-25
申请人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler A. Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , Shu-Sun Yu , David K. Ovard , Robert R. Rotzoll
发明人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler A. Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , Shu-Sun Yu , David K. Ovard , Robert R. Rotzoll
IPC分类号： H04Q5/22
CPC分类号： G06K19/0716 , G06K7/0008 , G06K7/10059 , G06K19/0707 , G06K19/0712 , G06K19/0723 , G06K19/0726 , G06K19/07749 , G06K19/07758 , G06K2017/0051 , H01Q1/2225 , H03L7/0995 , H03L7/148
摘要： A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.
摘要翻译：射频识别装置包括包括接收器，发射器和微处理器的集成电路。接收机和发射机一起定义了一个有效的应答器。集成电路优选地是包括接收器，发射器和微处理器的单片单片集成电路。由于该设备包括有源应答器，而不是依赖于磁耦合功率的转发器，该器件具有更大的范围。

6. 发明授权

US07786845B2 Method and apparatus for wireless communication of identification information between radio frequency devices 有权
标题翻译：用于射频设备之间的识别信息的无线通信的方法和装置
公开(公告)号：US07786845B2
公开(公告)日：2010-08-31
申请号：US11846788
申请日：2007-08-29
申请人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , David K. Ovard , Shu-Sun Yu , Robert R. Rotzoll
发明人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , David K. Ovard , Shu-Sun Yu , Robert R. Rotzoll
IPC分类号： H04Q5/22
CPC分类号： G06K19/0716 , G06K7/0008 , G06K7/10059 , G06K19/0707 , G06K19/0712 , G06K19/0723 , G06K19/0726 , G06K19/07749 , G06K19/07758 , G06K2017/0051 , H01Q1/2225 , H03L7/0995 , H03L7/148
摘要： Identification information is wirelessly communicated between radio frequency devices. In one embodiment, a first wireless device transmits a signal to request identification information. Other wireless devices are each affixed a respective item, and each of the other wireless devices determines if a reply signal is to be transmitted, and if so, communicates the reply signal to the first wireless device.
摘要翻译：无线射频设备之间无线通信识别信息。在一个实施例中，第一无线设备发送信号以请求标识信息。其他无线装置各自贴有相应的项目，并且每个其他无线装置确定是否要发送应答信号，如果是，则将应答信号传送到第一无线装置。

7. 发明授权

US07545256B2 System and method for identifying a radio frequency identification (RFID) device 失效
标题翻译：用于识别射频识别（RFID）设备的系统和方法
公开(公告)号：US07545256B2
公开(公告)日：2009-06-09
申请号：US11607117
申请日：2006-11-28
申请人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler A. Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , Shu-Sun Yu , David K. Ovard , Robert R. Rotzoll
发明人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler A. Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , Shu-Sun Yu , David K. Ovard , Robert R. Rotzoll
IPC分类号： H04Q5/22
CPC分类号： G06K19/0716 , G06K7/0008 , G06K7/10059 , G06K19/0707 , G06K19/0712 , G06K19/0723 , G06K19/0726 , G06K19/07749 , G06K19/07758 , G06K2017/0051 , H01Q1/2225 , H03L7/0995 , H03L7/148
摘要： To identify an RFID tag in a field of RFID tags, an interrogator sends a series of commands to implement an arbitration scheme. The commands include differentiation, selection, and modulation information. The tag uses the differentiation information to differentiate commands sent by the interrogator from commands sent by other interrogators that may be within communication range of the tag. The selection information is used by the tag to determine if the tag is a member of a group selected by the interrogator for response to the interrogator. If the tag is a member of the selected group, the tag may send a reply that is modulated using a modulation type selected by the modulation information. In accordance with one of the modulation types, one of three different pulse waveforms is selected by the interrogator via the modulation information to multiply with the baseband waveform of the reply from the tag.
摘要翻译：为了识别RFID标签领域的RFID标签，询问器发送一系列命令来实现仲裁方案。命令包括区分，选择和调制信息。标签使用差分信息来区分询问器发送的命令与由可能在标签的通信范围内的其他询问器发送的命令。标签使用选择信息来确定标签是否是询问器选择的用于响应询问器的组的成员。如果标签是所选组的成员，标签可以发送使用由调制信息选择的调制类型调制的应答。根据调制类型之一，询问器通过调制信息选择三种不同脉冲波形中的一种，以与来自标签的回复的基带波形相乘。

8. 发明申请

US20080191762A1 DIGITAL HOLD IN A PHASE-LOCKED LOOP 有权
标题翻译：数字保持在相位锁定环
公开(公告)号：US20080191762A1
公开(公告)日：2008-08-14
申请号：US11673819
申请日：2007-02-12
申请人： Srisai R. Seethamraju , Jerrell P. Hein , Kenneth Kin Wai Wong , Qicheng Yu
发明人： Srisai R. Seethamraju , Jerrell P. Hein , Kenneth Kin Wai Wong , Qicheng Yu
IPC分类号： H03L7/06 , G06F1/04
CPC分类号： G06F1/04 , H03L7/146 , H03L7/148 , H03L7/18
摘要： A technique that is readily implemented in monolithic integrated circuits includes a method including generating an output clock signal during a presence of a reference clock signal based, at least in part, on a digital control value indicating a phase difference between a feedback signal of a PLL and a reference clock signal. The method includes generating the output clock signal during an absence of the reference clock signal and based, at least in part, on an average digital control word indicating an average value of a number of samples of the digital control value during the presence of the reference clock signal, the number of samples preceding the absence of the reference clock signal by a delay period. The number of samples is selected from a plurality of numbers of samples and the delay period is selected from a plurality of delay periods.
摘要翻译：在单片集成电路中容易实现的一种技术包括一种方法，包括至少部分地基于指示PLL的反馈信号之间的相位差的数字控制值，在参考时钟信号存在期间产生输出时钟信号和参考时钟信号。所述方法包括在缺少参考时钟信号期间产生输出时钟信号，并且至少部分地基于平均数字控制字，该数字控制字指示在存在参考时数字控制值的采样数目的平均值时钟信号，在参考时钟信号不存在之前的采样数量延迟时间。从多个样本中选择样本数，并且从多个延迟周期中选择延迟周期。

9. 发明授权

US07170867B2 Radio frequency data communications device 有权
公开(公告)号：US07170867B2
公开(公告)日：2007-01-30
申请号：US10823454
申请日：2004-04-12
申请人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , Shu-Sun Yu , David K. Ovard , Robert R. Rotzoll
发明人： James E. O'Toole , John R. Tuttle , Mark E. Tuttle , Tyler Lowrey , Kevin M. Devereaux , George E. Pax , Brian P. Higgins , Shu-Sun Yu , David K. Ovard , Robert R. Rotzoll
IPC分类号： G08C17/00
CPC分类号： G06K19/0716 , G06K7/0008 , G06K7/10059 , G06K19/0707 , G06K19/0712 , G06K19/0723 , G06K19/0726 , G06K19/07749 , G06K19/07758 , G06K2017/0051 , H01Q1/2225 , H03L7/0995 , H03L7/148
摘要： A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

10. 发明申请

US20060220694A1 Voltage hold circuit and clock synchronization circuit 有权
标题翻译：电压保持电路和时钟同步电路
公开(公告)号：US20060220694A1
公开(公告)日：2006-10-05
申请号：US11392663
申请日：2006-03-30
申请人： Kazuhiko Watanabe
发明人： Kazuhiko Watanabe
IPC分类号： G11C27/02
CPC分类号： H03L7/148
摘要： A voltage hold circuit which holds an input signal voltage includes a voltage comparator unit configured to output a result of comparison between a voltage of an externally inputted control signal and a voltage of an outputted analog hold signal, a digital value hold unit configured to increase or decrease a hold value which is a digital value it holds, based on the comparison result, and to output a digital hold signal which is a digital value generated based on the hold value, and a D/A converter unit configured to convert the digital hold signal to an analog value for output as the analog hold signal.
摘要翻译：保持输入信号电压的电压保持电路包括：电压比较器单元，被配置为输出外部输入的控制信号的电压与输出的模拟保持信号的电压之间的比较结果;数字值保持单元，被配置为增加或基于比较结果减小其保持的数字值的保持值，并输出作为基于保持值生成的数字值的数字保持信号，以及D / A转换器单元，被配置为转换数字保持信号为模拟值作为模拟保持信号输出。

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