专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US12004308B2 Process for laminating graphene-coated printed circuit boards 有权
公开(公告)号：US12004308B2
公开(公告)日：2024-06-04
申请号：US17305205
申请日：2021-07-01
申请人： Mellanox Technologies, Ltd. , BAR-ILAN UNIVERSITY , PCB Technologies Ltd
发明人： Boaz Atias , Elad Mentovich , Yaniv Rotem , Doron Naveh , Adi Levi , Yosi Ben-Naim , Yaad Eliya , Shlomo Danino , Eran Lipp
IPC分类号： H05K1/02 , B32B15/14 , C01B32/182 , C01B32/184 , C08J7/043 , C08J7/044 , C08J7/046 , C08J7/06 , H01L21/683 , H05K1/09 , H05K3/38 , H05K3/46
CPC分类号： H05K3/4652 , C01B32/184 , H05K3/388 , H05K2203/085 , H05K2203/1338
摘要： Processes for laminating a graphene-coated printed circuit board (PCB) are disclosed. An example laminated PCB may include a lamination stack that may include an inner core, an adhesive layer, and at least one graphene-metal structure. Pressure and heat—which may be applied under vacuum or controlled gas atmosphere—may be applied to the lamination stack, after all materials have been placed. The graphene of the graphene-metal structure is designed to promote high frequency performance and heat management within the PCB.

2. 发明申请

US20190008044A1 Multi-Layer Circuit Board using Interposer layer and Conductive Paste 审中-公开
公开(公告)号：US20190008044A1
公开(公告)日：2019-01-03
申请号：US15635201
申请日：2017-06-28
申请人： Sierra Circuits, Inc.
发明人： Konstantine KARAVAKIS , Kenneth S. BAHL
IPC分类号： H05K1/11 , H05K3/46 , H05K3/18 , H05K3/06 , H05K1/03 , H05K1/09 , H05K3/42
CPC分类号： H05K1/115 , H05K1/0313 , H05K1/095 , H05K1/111 , H05K3/06 , H05K3/181 , H05K3/425 , H05K3/462 , H05K3/4623 , H05K2201/09572 , H05K2201/10378 , H05K2203/068 , H05K2203/085
摘要： A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.

3. 发明授权

US09999139B2 Multilayer thin film, method of manufacturing the same, and electronic product including the same 有权
公开(公告)号：US09999139B2
公开(公告)日：2018-06-12
申请号：US14972530
申请日：2015-12-17
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jin Hyun Cho , Hyong Jun Yoo , Seo Joon Lee , Min Chul Jung , Hyun Jun Jung
IPC分类号： H05K3/46 , C23C14/34 , H05K3/00 , C23C14/00 , C23C14/06 , C23C14/08 , C23C14/20 , C23C14/35 , C23C28/00 , H04M1/02
CPC分类号： H05K3/46 , C23C14/0015 , C23C14/0042 , C23C14/0641 , C23C14/08 , C23C14/205 , C23C14/34 , C23C14/352 , C23C28/322 , C23C28/34 , C23C28/345 , H04M1/0283 , H05K3/0041 , H05K2203/085 , H05K2203/095
摘要： A multilayer thin film and a method of depositing a multilayer thin film on a surface of a product is provided. The multilayer thin film includes a first layer including a non-conductive material coupled to an object, a second layer including a metallic material coupled to the first layer, and a third layer including a non-conductive material coupled to the second layer.

4. 发明授权

US09919372B2 Heat-bonding apparatus and method of manufacturing heat-bonded products 有权
公开(公告)号：US09919372B2
公开(公告)日：2018-03-20
申请号：US14763150
申请日：2014-01-09
申请人： ORIGIN ELECTRIC COMPANY, LIMITED
发明人： Jun Matsuda , Takayuki Suzuki , Masami Kuroda
IPC分类号： B23K1/005 , B23K1/008 , H05K3/34 , B23K3/08 , B23K35/26 , B23K3/04 , B23K1/00 , B23K101/42
CPC分类号： B23K1/005 , B23K1/0016 , B23K1/008 , B23K3/04 , B23K3/085 , B23K35/26 , B23K2101/42 , H05K3/3494 , H05K2203/085
摘要： A heat-bonding apparatus and method of manufacturing a heat-bonded product not allowing the temperature of the object to be heat-bonded to overshoot greatly from a specified target temperature, and setting the temperature of the object to the target temperature in a shorter time and with higher efficiency and accuracy than the conventional when heat-bonding in vacuum. A heat-bonding apparatus having a vacuum chamber for housing an object to be heat-bonded and a buffer part, a heater for the buffer part in contact with the object in the chamber, a cooler for the buffer part, a sensor for detecting temperature of the object heated through the buffer part and a controller for controlling the temperature of the object to be the target temperature by adjusting heat discharge from the buffer part with the cooler based on the detected temperature of the object.

5. 发明申请

US20170204253A1 COMPOSITE MATERIALS INCLUDING FILLED HOLLOW GLASS FILAMENTS 审中-公开
公开(公告)号：US20170204253A1
公开(公告)日：2017-07-20
申请号：US14996766
申请日：2016-01-15
申请人： International Business Machines Corporation
发明人： Matthew S. Doyle , Joseph Kuczynski , Timothy J. Tofil
IPC分类号： C08K7/14 , H05K3/00 , H05K3/42 , H05K1/03
CPC分类号： H05K1/0366 , C08J5/24 , C08K7/14 , H05K1/024 , H05K1/0248 , H05K2203/085
摘要： In an example, an article of manufacture includes a composite material. The composite material includes hollow glass filaments that are encapsulated within a polymeric matrix material. The hollow glass filaments are at least partially filled with the polymeric matrix material.

6. 发明授权

US09528667B1 Thermoforming a substrate bearing LEDs into a curved bulb enclosure 有权
标题翻译：将带有LED的基板热成型为弯曲的灯泡外壳
公开(公告)号：US09528667B1
公开(公告)日：2016-12-27
申请号：US14844796
申请日：2015-09-03
申请人： Rodrigo M. Pereyra
发明人： Rodrigo M. Pereyra
IPC分类号： F21V23/00 , F21K99/00 , H05K3/00
CPC分类号： F21K9/90 , F21K9/232 , F21V23/005 , F21Y2107/20 , F21Y2115/10 , H05K3/0014 , H05K2201/0129 , H05K2201/09018 , H05K2201/09027 , H05K2201/09118 , H05K2201/10106 , H05K2203/085 , H05K2203/1453
摘要： A method of manufacturing a lamp comprising forming a first sheet segment (48) into a first shell portion (110) after forming a first electrically conductive trace (70) on the first sheet segment (48) and after placing a first plurality of LEDs (90) on the first sheet segment (48); forming a second sheet segment (50) into a second shell portion (120) after forming a second electrically conductive trace (80) on the second plastic segment (50) and after placing a second plurality of LEDs (90) on the second sheet segment (50); and joining the first shell portion (110) and the second shell portion (120) into a bulb enclosure (40) defining an interior region (42) therein. The first and second sheet segments (48, 50) are preferably thermoformed and may be connected by a web (60).
摘要翻译：一种制造灯的方法，包括在第一片段（48）上形成第一导电迹线（70）之后并且在放置第一多个LED（第一片段）之后，将第一片段（48）形成第一壳部分（110） 90）在第一片段（48）上; 在第二塑料段（50）上形成第二导电迹线（80）之后，在将第二多个LED（90）放置在第二片段上之后，将第二片段（50）形成第二壳部分（120）（50）; 以及将所述第一外壳部分（110）和所述第二外壳部分（120）接合到其中限定内部区域（42）的灯泡外壳（40）中。第一和第二片段（48,50）优选地被热成型，并且可以通过网（60）连接。

7. 发明申请

US20160329274A1 MULTILAYER SUBSTRATE FOR SEMICONDUCTOR PACKAGING 有权
标题翻译：用于半导体封装的多层基板
公开(公告)号：US20160329274A1
公开(公告)日：2016-11-10
申请号：US14778987
申请日：2014-12-22
申请人： INTEL CORPORATION
发明人： Wei-Lun Kane Jen , Padam Jain , Dilan Seneviratne , Chi-Mon Chen
IPC分类号： H01L23/498 , H05K1/18 , H01L23/31 , H01L21/683 , H01L21/48 , H01L23/00
CPC分类号： H05K1/0271 , H01L21/02002 , H01L21/02008 , H01L21/02035 , H01L21/4857 , H01L21/6835 , H01L23/12 , H01L23/13 , H01L23/3185 , H01L23/49822 , H01L23/49838 , H01L23/49894 , H01L24/16 , H01L25/0657 , H01L2221/68345 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/0002 , H01L2924/15311 , H05K1/0298 , H05K1/036 , H05K1/0393 , H05K1/115 , H05K1/181 , H05K3/0014 , H05K3/0044 , H05K2201/0191 , H05K2201/05 , H05K2203/0278 , H05K2203/085 , H01L2924/00
摘要： Embodiments disclosed include a multilayer substrate for semiconductor packaging. The substrate may include a first layer with a first side with an xy-plane and individual locations on the first side have a first side distance below the first side xy-plane, and a second side with a second side xy-plane and individual locations on the second side may have a second side distance below the second side xy-plane; and a second layer with a first side coupled to the second side of the first layer and a second side opposite the first side of the second layer, wherein a thickness of the second layer at the individual locations on the second layer may be comprised of the first side distance plus the second side distance. Other embodiments may be described and/or claimed.
摘要翻译：所公开的实施例包括用于半导体封装的多层衬底。衬底可以包括第一层，第一层具有xy平面，第一侧上的各个位置具有低于第一侧面xy平面的第一侧面距离，第二侧面具有第二面xy平面和各个位置在第二侧上可以具有在第二侧面xy平面下方的第二侧面距离; 以及第二层，其具有耦合到第一层的第二侧的第一侧和与第二层的第一侧相对的第二侧，其中第二层上的各个位置处的第二层的厚度可以由第一侧距离加上第二边距离。可以描述和/或要求保护其他实施例。

8. 发明申请

US20160256946A1 Soldering Apparatus and Vacuum-Soldering Method 审中-公开
标题翻译：焊接设备和真空焊接方法
公开(公告)号：US20160256946A1
公开(公告)日：2016-09-08
申请号：US14906660
申请日：2013-07-23
申请人： SENJU METAL INDUSTRY CO., LTD.
发明人： Tsutomu Hiyama , Hiroyuki Inoue , Shunsuk Kimoto
IPC分类号： B23K1/008 , H05K3/34
CPC分类号： B23K1/008 , H05K3/3494 , H05K2203/085 , H05K2203/163
摘要： A soldering apparatus which can keep an interior of a chamber at a specified vacuum pressure and can perform soldering in the chamber, the vacuum pressure of which is optimally adjusted, is provided with a chamber (40) in which a work (1) is solderable under vacuum environment, an operation part (21) that inputs and sets vacuum pressure in the chamber (40), a pump (23) that performs vacuum drawing on the interior of the chamber (40), a pressure sensor (24) that detects pressure in the chamber (40), and a control portion (61) that adjusts the set vacuum pressure in the chamber (40) based on a pressure detection signal (S24) output from the pressure sensor (24), and keeps the set vacuum pressure for a predetermined period of time, as shown in FIG. 4.
摘要翻译：一种焊接设备，其可以将室内部保持在特定的真空压力并且可以在真空压力被最佳地调节的情况下在腔室中进行焊接，其中工件（1）可焊接在其中在真空环境下，在所述室（40）中输入和设定真空压力的操作部（21），在所述室（40）的内部进行抽真空的泵（23），检测基于从压力传感器（24）输出的压力检测信号（S24），调节室（40）中的设定真空压力的控制部（61），并保持设定真空压力达预定时间段，如图1所示。 4。

9. 发明申请

US20150144379A1 METHOD AND SYSTEM FOR PRODUCING A MULTILAYER ELEMENT AND MULTILAYER ELEMENT 审中-公开
标题翻译：用于生产多层元件和多层元件的方法和系统
公开(公告)号：US20150144379A1
公开(公告)日：2015-05-28
申请号：US14404808
申请日：2013-05-27
申请人： 3D-Micromac Ag
发明人： Tino Petsch , Maurice Clair , Alexander Böhm , Martin Sachse
IPC分类号： H05K3/46 , H05K3/26 , H05K3/22 , H01Q1/22 , H05K1/02
CPC分类号： H05K3/4652 , G06K19/07779 , H01Q1/2225 , H05K1/0269 , H05K1/0298 , H05K3/027 , H05K3/046 , H05K3/048 , H05K3/22 , H05K3/26 , H05K2203/0278 , H05K2203/0522 , H05K2203/0525 , H05K2203/0528 , H05K2203/06 , H05K2203/081 , H05K2203/085 , H05K2203/107 , H05K2203/1545 , Y10T29/49128 , Y10T156/1052 , Y10T156/108
摘要： A method produces a multilayer element with a substrate and at least one conductor structure connected in an areal manner to the substrate, which has first regions of electrically conductive material, which is present in accordance with a prescribed pattern, while electrically non-conductive second regions lie between the first regions.
摘要翻译：一种方法产生具有衬底和至少一个导体结构的多层元件，所述至少一个导体结构以面向方式连接至具有根据规定图案存在的导电材料的第一区域的衬底，同时电非导电的第二区域位于第一区域之间。

10. 发明授权

US08216635B2 Method of forming metal wiring and metal wiring formed using the same 有权
标题翻译：形成金属布线和使用其形成的金属布线的方法
公开(公告)号：US08216635B2
公开(公告)日：2012-07-10
申请号：US12503491
申请日：2009-07-15
申请人： Young Ah Song , Young Chang Joo , Ji Hoon Lee , Seol Min Yi , Jae Woo Joung , Sung Il Oh , Tae Hoon Kim , In Young Kim
发明人： Young Ah Song , Young Chang Joo , Ji Hoon Lee , Seol Min Yi , Jae Woo Joung , Sung Il Oh , Tae Hoon Kim , In Young Kim
IPC分类号： B05D5/12 , B05D3/00
CPC分类号： H05K3/1283 , H05K2201/0257 , H05K2203/085 , H05K2203/086 , H05K2203/1131 , H05K2203/1476 , Y10T428/24917
摘要： Disclosed are a method of forming metal wiring and metal wiring formed using the same. The method includes printing wiring using an ink composition including metallic nanoparticles and dispersants maintaining dispersion of the metallic nanoparticles, performing a first firing process of firing the wiring under vacuum or in an inert atmosphere to suppress grain growth, and performing a second firing process of firing the wiring with the vacuum or inert atmosphere released, to accelerate grain growth. The method of forming metal wiring induces abnormal grain growth by rapidly removing dispersants, capable of inducing the growth of metallic nanoparticles, at a temperature at which the growth force of the metallic nanoparticles is high, in the process of firing the metallic nanoparticles. Accordingly, the metal wiring has a coarse-grained structure containing metallic particles with a large average particle size, and the electrical and mechanical characteristics thereof can be enhanced.
摘要翻译：公开了一种形成金属布线和使用其形成的金属布线的方法。该方法包括使用包括金属纳米颗粒的油墨组合物和保持金属纳米颗粒的分散体的分散剂进行印刷布线，进行在真空或惰性气氛下烧结布线以抑制晶粒生长的第一煅烧工艺，并进行第二次烧制布线与真空或惰性气体释放，加速晶粒生长。在金属纳米粒子的烧制过程中，在金属纳米粒子的生长力高的温度下快速除去能够诱导金属纳米粒子生长的分散剂，形成金属配线的方法可以引起异常的晶粒生长。因此，金属布线具有含有平均粒径大的金属粒子的粗粒结构，能够提高其电气和机械特性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式