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1. 发明申请

US20180054900A1 PLANAR COIL ELEMENT AND METHOD FOR PRODUCING PLANAR COIL ELEMENT 审中-公开
公开(公告)号：US20180054900A1
公开(公告)日：2018-02-22
申请号：US15557255
申请日：2016-03-10
申请人： SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
发明人： Hiroshi UEDA , Kousuke MIURA , Yoshihito YAMAGUCHI , Yuka URABE
IPC分类号： H05K3/46 , H01F41/04 , H01F41/12 , H01F27/32
CPC分类号： H05K3/4673 , H01F17/0013 , H01F27/327 , H01F41/041 , H01F41/043 , H01F41/127 , H01F2017/0073 , H05K1/165 , H05K3/241 , H05K3/4626 , H05K3/4644 , H05K2203/1476 , H05K2203/1572
摘要： A planar coil element of the present invention includes an insulating base film having a first surface and a second surface opposite to the first surface, a first conductive pattern deposited on the first surface side of the insulating base film, and a first insulating layer covering the first conductive pattern on the first surface side, in which the first conductive pattern includes a core body and a widening layer deposited by plating on the outer surface of the core body, and the ratio of the average thickness of the first conductive pattern to the average circuit pitch of the first conductive pattern is ½ or more and 5 or less.

2. 发明申请

US20170215277A1 WIRING BOARD 有权
公开(公告)号：US20170215277A1
公开(公告)日：2017-07-27
申请号：US15414167
申请日：2017-01-24
申请人： KYOCERA Corporation
发明人： Masaaki HARAZONO , Takayuki UMEMOTO
IPC分类号： H05K1/03
CPC分类号： H05K1/0306 , H01L2224/16225 , H05K1/0373 , H05K3/4673 , H05K2201/0191 , H05K2201/0769
摘要： The wiring board of the present disclosure includes an insulating layer, and a wiring conductor existing so as to be adjacent to both main surfaces of the insulating layer; the insulating layer includes at least two particle-containing resin layers containing insulating particles in an insulating resin, and a particle-free resin layer formed of an insulating resin; and the particle-free resin layer is interposed between the particle-containing resin layers.

3. 发明授权

US09635757B1 Circuit board and manufacturing method thereof 有权
公开(公告)号：US09635757B1
公开(公告)日：2017-04-25
申请号：US15233972
申请日：2016-08-11
申请人： Unimicron Technology Corp.
发明人： Yin-Ju Chen , Chi-Min Chang , Cheng-Po Yu
IPC分类号： H05K1/03 , H05K3/00
CPC分类号： H05K1/0366 , H05K3/4673 , H05K2201/0278 , H05K2201/029 , H05K2203/0557
摘要： A circuit board and a manufacturing method thereof are provided. The circuit board includes a dielectric substrate, a circuit pattern and a dielectric layer. The circuit pattern is disposed on the dielectric substrate. The dielectric layer is disposed on the dielectric substrate and covers the circuit pattern. The dielectric layer includes a dielectric matrix and a mesh-shaped fiber structure disposed in the dielectric matrix. There is no mesh-shaped fiber structure on a portion of the dielectric substrate exposed by the circuit pattern.

4. 发明申请

US20170042034A1 SYSTEM AND METHODS FOR ADDITIVE MANUFACTURING OF ELECTROMECHANICAL ASSEMBLIES 审中-公开
标题翻译：机电组件加工制造系统与方法
公开(公告)号：US20170042034A1
公开(公告)日：2017-02-09
申请号：US15305962
申请日：2015-04-21
申请人： Cornell University
发明人： Robert MACCURDY , Hod LIPSON
IPC分类号： H05K1/18 , B29C65/16 , B33Y10/00 , B33Y30/00 , B33Y40/00 , B33Y80/00 , H05K3/12 , H05K3/30 , H01L23/538 , H01L25/11 , H01L25/18 , H01L21/56 , H01L21/67 , H05K1/11 , H05K3/28 , H01L25/00 , B29C67/00
CPC分类号： H05K1/185 , A61B17/50 , B29C64/00 , B29C65/16 , B29L2031/34 , B33Y10/00 , B33Y30/00 , B33Y40/00 , B33Y80/00 , H01L21/56 , H01L21/67115 , H01L21/67132 , H01L23/5384 , H01L23/5389 , H01L25/112 , H01L25/18 , H01L25/50 , H01L27/01 , H01L27/13 , H05K1/0287 , H05K1/113 , H05K1/115 , H05K1/117 , H05K1/14 , H05K1/16 , H05K3/0014 , H05K3/125 , H05K3/284 , H05K3/30 , H05K3/368 , H05K3/4673 , H05K3/4697 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10053 , H05K2201/10106 , H05K2201/10166 , H05K2201/10174 , H05K2201/10189 , H05K2201/10636 , H05K2203/107 , H05K2203/1327
摘要： A hybrid additive manufacturing approach that incorporates three-dimensional (3D) printing and placement of modules selected from a library of modules to fabricate an electromechanical assembly. By virtue of fabrication of the electromechanical assembly, mechanical properties and electrical properties of the assembly are created. The invention overcomes the material and process limitations of current printable electronics approaches, enabling complete, complex electromechanical assemblies to be fabricated.
摘要翻译：一种混合添加剂制造方法，其包括从模块库中选择的模块的三维（3D）打印和放置以制造机电组件。通过机电组件的制造，产生了组件的机械特性和电气特性。本发明克服了当前可印刷电子方法的材料和工艺限制，从而能够制造完整的复杂机电组件。

5. 发明授权

US09491858B2 Circuit board 有权
标题翻译：电路板
公开(公告)号：US09491858B2
公开(公告)日：2016-11-08
申请号：US14864895
申请日：2015-09-25
申请人： FUJIFILM Corporation
发明人： Yasushi Endo , Nobuyuki Tada , Kenji Naoi , Tomohito Asai , Hideo Ikeda , Michihiro Shibata
IPC分类号： H05K1/09 , H05K1/11 , C09J133/26 , C08F220/18 , C09J133/08 , C09J133/10 , H05K1/02 , H05K3/28 , G06F3/044 , H05K3/46
CPC分类号： H05K1/11 , C08F220/18 , C09J133/08 , C09J133/10 , C09J133/26 , G06F3/044 , G06F2203/04103 , G06F2203/04112 , H05K1/0289 , H05K1/092 , H05K3/285 , H05K3/4673 , H05K2201/0108 , H05K2201/0761 , H05K2201/0769 , C08F2220/1858 , C08F220/20
摘要： This wiring board is provided with: a plurality of metal wires disposed upon an insulating substrate; and a transparent adhesive agent layer which is disposed upon the metal wires, and which is in direct contact with the metal wires. The metal wires include: a first metal wire which has a pulse signal supplied thereto; and a second metal wire which has a fixed electric potential applied thereto. The pulse signal has a reference level identical to the fixed electric potential, and has a pulse train in which a plurality of pulses having a pulse width of not more than 3 msec are arranged, the integral time of the pulses in a period of 600 seconds being less than 60 seconds.
摘要翻译：该布线板设置有：设置在绝缘基板上的多个金属线; 以及设置在金属线上并与金属线直接接触的透明粘合剂层。金属线包括：具有供给脉冲信号的第一金属线; 以及施加有固定电位的第二金属线。脉冲信号具有与固定电位相同的参考电平，并且具有脉冲序列，其中布置脉冲宽度不超过3毫秒的多个脉冲，脉冲在600秒的周期内的积分时间小于60秒。

6. 发明授权

US09468109B2 Method for fabricating wiring board 有权
标题翻译：线路板制造方法
公开(公告)号：US09468109B2
公开(公告)日：2016-10-11
申请号：US14896960
申请日：2015-06-24
申请人： Panasonic Intellectual Property Management Co., Ltd.
发明人： Fumito Suzuki , Takehiro Ishida
IPC分类号： B32B37/00 , H05K3/46
CPC分类号： H05K3/4673 , B29C43/18 , B29C43/20 , B29C43/52 , H05K2203/066
摘要： A core material is prepared, wherein the core material has an insulating layer, and a conductor pattern provided on a surface of the insulating layer. One or more prepreg materials are prepared. Each prepreg material includes a glass cloth, and first and second resin layers which are formed from a semi-cured resin with which the glass cloth is impregnated, and cover the opposite surfaces of the glass cloth, respectively. A laminated body is formed by placing the one or more prepreg materials on one another, such that one prepreg material out of the one or more prepreg materials is provided on the surface of the insulating layer of the core material to cover the conductor pattern. The laminated body is heated and pressed. The glass cloth has an opening ratio ranging from 3% to 15%. The thickness t of the first and second resin layers, the ratio a (%) of the area of the conductor pattern to the area of the surface of the insulating layer in the core material, the thickness T of the conductor pattern, and the number n of the one or more prepreg materials satisfy the relationships: T≧100 (μm): and t
摘要翻译：制备芯材，其中芯材具有绝缘层，以及设置在绝缘层的表面上的导体图案。制备一种或多种预浸材料。每个预浸材料包括玻璃布，以及由浸渍有玻璃布的半固化树脂形成的第一和第二树脂层，并且分别覆盖玻璃布的相对表面。通过将一种或多种预浸材料彼此放置形成层压体，使得在芯材的绝缘层的表面上设置一种或多种预浸料材料中的一种预浸料材料以覆盖导体图案。层压体被加热并按压。玻璃布的开口率为3％至15％。第一和第二树脂层的厚度t，导体图案的面积与芯材中的绝缘层的表面的面积的比率a（％），导体图案的厚度T和数量一个或多个预浸料材料的n满足以下关系：T≥100（μm）：和t <（1-a / 100）·T <2·n·t。

7. 发明授权

US09326374B2 Flexible circuit board and process for producing the same 有权
标题翻译：柔性电路板及其制造方法
公开(公告)号：US09326374B2
公开(公告)日：2016-04-26
申请号：US13967401
申请日：2013-08-15
申请人： ICHIA TECHNOLOGIES,INC.
发明人： Chien-Hwa Chiu , Chih-Min Chao , Peir-Rong Kuo , Chia-Hua Chiang , Chih-Cheng Hsiao , Feng-Ping Kuan , Ying-Wei Lee , Yung-Chang Juang
IPC分类号： H05K1/02 , H05K3/00 , H05K3/20 , H05K3/22 , H05K3/38 , H05K3/46 , H05K1/03 , H05K3/42
CPC分类号： H05K1/028 , H05K1/0393 , H05K3/20 , H05K3/22 , H05K3/386 , H05K3/426 , H05K3/465 , H05K3/4673 , H05K2201/0154 , Y10T428/24521 , Y10T428/265 , Y10T428/31678
摘要： A flexible circuit board comprises a substrate which has a polyimide layer recessed to define at least a compartment. The compartment includes an inner wall surface having a side wall and a bottom wall. The compartment is for containing a multilayer unit, wherein the multilayer unit includes an adhesion enhancing layer formed on the wall of the compartment, a first electrically conducting layer disposed on the adhesion enhancing layer, and a second electrically conducting layer formed on the first electrically conducting layer. The adhesion enhancing layer is palladium. The first electrically conducting layer is nickel. The substrate is composed of polyimide (PI).
摘要翻译：柔性电路板包括具有凹陷以限定至少隔室的聚酰亚胺层的基板。隔室包括具有侧壁和底壁的内壁表面。隔室用于容纳多层单元，其中多层单元包括形成在隔室壁上的粘附增强层，设置在粘附增强层上的第一导电层和形成在第一导电层上的第二导电层层。粘附增强层是钯。第一导电层是镍。基板由聚酰亚胺（PI）组成。

8. 发明申请

US20160073512A1 Process for placing, securing and interconnecting electronic components 审中-公开
公开(公告)号：US20160073512A1
公开(公告)日：2016-03-10
申请号：US14121433
申请日：2014-09-05
申请人： Edward Binkley , Robert Cattaneo , Hiep Nghi , George Laurie , Richard Otte
发明人： Edward Binkley , Robert Cattaneo , Hiep Nghi , George Laurie , Richard Otte
IPC分类号： H05K3/30 , H05K3/28
CPC分类号： H05K3/007 , H05K1/0269 , H05K1/185 , H05K3/0014 , H05K3/0052 , H05K3/0097 , H05K3/284 , H05K3/305 , H05K3/4644 , H05K3/4664 , H05K3/4673 , H05K2201/09118 , H05K2201/09918 , H05K2203/0169 , H05K2203/063 , H05K2203/1469 , H05K2203/1476 , H05K2203/1563
摘要： A method for fabricating an electronic assembly which enables the assembly and interconnection of surface mount components and/or other electrical, electronic, electro-optical, electro-mechanical and user interface devices with external I/O contacts on a planar surface without the use of solder or otherwise exposing the components to temperatures substantially above ambient.

9. 发明申请

US20150342029A1 COATING SYSTEM WITH ELECTROSTATIC DISCHARGE PROTECTION 有权
标题翻译：带静电放电保护的涂层系统
公开(公告)号：US20150342029A1
公开(公告)日：2015-11-26
申请号：US14758820
申请日：2013-12-20
申请人： Sika Technology AG
发明人： Uwe VON DER BRUEGGEN , Lars CONRAD , Henry HEINRICH , Jochen GROETZINGER
IPC分类号： H05K1/02 , H05K3/30 , H05K3/46 , H05K3/28
CPC分类号： H05K1/0313 , H05F3/025 , H05K1/0215 , H05K3/0058 , H05K3/284 , H05K3/30 , H05K3/4673 , H05K2203/0759 , Y10T29/49147
摘要： A coating system on a substrate for the protection against electrostatic discharge, includes in the following order a) an undercoat on the substrate, b) a non-dissipative synthetic resin layer and c) a dissipative synthetic resin layer having a resistance to ground according to VDE-0100-410 of at least 100 kohm, wherein a grounding device for grounding the coating system is arranged between the dissipative synthetic resin layer and the non-dissipative synthetic resin layer. The coating system can be a floor coating system. In this way, systems having low TVOC emission can be formed. This system structure is also suitable for the simple conversion of existing, purely insulating coating structures into systems with ESD capability, and the system structure can be very easily renewed if renovation is required because of wear.
摘要翻译：用于防止静电放电的基板上的涂层系统包括以下顺序：a）基底上的底涂层，b）非耗散性合成树脂层，以及c）根据本发明的耐磨性的耗散合成树脂层 VDE-0100-410至少为100千欧，其中用于接地涂层系统的接地装置设置在耗散合成树脂层和非耗散合成树脂层之间。涂层系统可以是地板涂层系统。以这种方式，可以形成具有低TVOC发射的系统。该系统结构也适用于将现有纯绝缘涂层结构简单转换为具有ESD能力的系统，如果由于磨损需要改造，系统结构可以非常容易地更新。

10. 发明授权

US09167692B2 Wiring board, semiconductor device, and method of manufacturing wiring board 有权
标题翻译：接线板，半导体器件及制造布线板的方法
公开(公告)号：US09167692B2
公开(公告)日：2015-10-20
申请号：US14317529
申请日：2014-06-27
申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.
发明人： Noriyoshi Shimizu , Toshinori Koyama , Akio Rokugawa
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H05K1/11 , H05K1/18 , H01L23/498 , H01L21/48
CPC分类号： H05K1/115 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L23/49866 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H05K1/181 , H05K3/3436 , H05K3/38 , H05K3/4007 , H05K3/4661 , H05K3/4673 , H05K3/4688 , H05K2201/0191 , H05K2201/0352 , H05K2201/09563 , H05K2201/096 , H01L2924/00
摘要： A wiring board includes a first via hole in a first insulating layer to expose a first wiring layer. A first via in the first via hole includes an end surface. A second wiring layer is arranged on the first insulating layer and the end surface of the first via. A second insulating layer covers the second wiring layer. A second via hole in the second insulating layer exposes the second wiring layer. A second via in the second via hole is arranged above the first via through the second wiring layer. The outer surface of the first insulating layer is lower in surface roughness than an inner surface of the first via hole.
摘要翻译：布线板包括在第一绝缘层中的第一通孔，以露出第一布线层。第一通孔中的第一通孔包括端面。第一布线层设置在第一绝缘层和第一通孔的端面上。第二绝缘层覆盖第二布线层。第二绝缘层中的第二通孔露出第二布线层。第二通路孔中的第二通孔布置在第一通孔的上方，穿过第二布线层。第一绝缘层的外表面的表面粗糙度低于第一通孔的内表面。

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