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1. 发明申请

US20200007084A1 LOW NOISE BLOCK CONVERTER INTEGRATED CIRCUIT 审中-公开
公开(公告)号：US20200007084A1
公开(公告)日：2020-01-02
申请号：US16421285
申请日：2019-05-23
申请人： ALi Corporation
发明人： CEDRIC LAMBERTET , Christian Eichrodt , Fabio Epifano , Claude-Alain Gobet , Alfredo Bautista , Jian-Xin Li
IPC分类号： H03D7/16 , H03D7/18 , H04N7/20 , H04H40/90
摘要： The disclosure provided a low noise block converter for converting RF signal received from a satellite into IF signal, where the image rejection of the RF signal is performed in two stages through a low noise amplifier (LNA) integrated circuit (IC). The disclosure reduced the number of discrete components by integrating electronic components onto one integrated circuit (or chip), and at the same, improves the noise figure of the LNB converter. The LNB IC comprises LNA circuits, RF path selector, and signal downconverter, where the image rejection is performed by a combination of the LNA circuits and the signal downconverter.

2. 发明授权

US10312862B2 Up-down converter 有权
公开(公告)号：US10312862B2
公开(公告)日：2019-06-04
申请号：US15540682
申请日：2015-12-30
申请人： SOLiD, INC.
发明人： Jaehun Choi , Kyungeun Han
IPC分类号： H03D7/16 , H03D7/18 , H04B1/30
摘要： According to an embodiment of the inventive concept, an up-down converter includes a first mixer configured to convert an input radio frequency (RF) signal into an intermediate frequency (IF) signal using a first local signal; an IF filter configured to filter the IF signal converted by the first mixer; a second mixer configured to convert the IF signal, which has been filtered by the IF filter, into an output RF signal using a second local signal; and a local oscillator configured to control a frequency of the first local signal and the second local signal based on a frequency of the input RF signal.

3. 发明申请

US20170117879A1 RESONANT CIRCUIT CALIBRATION 有权
公开(公告)号：US20170117879A1
公开(公告)日：2017-04-27
申请号：US15293255
申请日：2016-10-13
申请人： Texas Instruments Incorporated
发明人： Sudipto Chakraborty , Vinod Mukundagiri
IPC分类号： H03J3/02 , H04B1/10 , H04B5/00 , H03L7/099 , H03D7/18
CPC分类号： H03J3/02 , H03D7/165 , H03J1/0008 , H03J7/04 , H03J2200/10 , H03J2200/28 , H03J2200/29 , H03L7/0995 , H04B1/10 , H04B5/0031 , H04B5/0037 , H04B5/0093
摘要： Methods and circuitry for calibrating inductive-capacitive resonant circuits are disclosed. An example of the circuitry includes an inductive-capacitive (L-C) resonant circuit operable to receive signals in response to induced electromagnetic signals transmitted on a carrier frequency. A demodulator has a signal source and is operable to demodulate signals generated by the L-C resonant circuit. Switching circuitry is operable to inject signals generated by the signal source into the L-C resonant circuit during a calibration mode. The calibration mode is for adjusting the capacitance in the L-C resonant circuit to tune the L-C resonant circuit to the carrier frequency.

4. 发明授权

US09571036B2 Heterodyne receiver structure, multi chip module, multi integrated circuit module, and method for processing a radio frequency signal 有权
标题翻译：异频接收机结构，多芯片模块，多集成电路模块以及射频信号处理方法
公开(公告)号：US09571036B2
公开(公告)日：2017-02-14
申请号：US13496234
申请日：2012-02-07
申请人： Karl-Gösta Sahlman , Tomas Lieback
发明人： Karl-Gösta Sahlman , Tomas Lieback
IPC分类号： H04B1/10 , H03D7/18 , H04B1/06 , H04B1/00
CPC分类号： H03D7/18 , H04B1/0021 , H04B1/0046 , H04B1/06
摘要： A heterodyne receiver structure comprises a frequency conversion block arranged to convert an incoming analog radio frequency (RF) signal to an analog intermediate frequency (IF) signal; a filter block arranged to filter said analog IF signal; and an analog-to-digital (AD) converter block arranged to convert said filtered analog IF signal to a digital signal, wherein the AD converter block (309) is arranged to convert the filtered analog IF signal to the digital signal by using a sampling frequency (fs) which is at least N times a maximum bandwidth of the filtered analog IF signal, wherein the frequency spectrum from zero to the sampling frequency is divided into N frequency zones of equal width, wherein N is an even positive number higher than two; the frequency conversion block (304) is arranged to convert the incoming analog RF signal to the analog IF signal such that the analog IF signal is located in any of the N/2-1 frequency zones having lowest frequency; and the filter block (306-308) is arranged to low pass the analog IF signal such that any disturbing signal located in a zone, which would have a mirror image after the AD conversion in the zone, in which the analog IF signal is located, is filtered away, wherein the heterodyne receiver structure further comprises a digital signal processing block (311) arranged to filter said digital signal.
摘要翻译：外差接收机结构包括频率转换块，其被布置为将输入的模拟射频（RF）信号转换为模拟中频（IF）信号; 滤波器块，布置成滤波所述模拟IF信号; 以及被配置为将所述滤波的模拟IF信号转换为数字信号的模数（AD）转换器模块，其中AD转换器模块（309）被布置成通过使用采样将滤波后的模拟IF信号转换为数字信号频率（fs）至少为经滤波的模拟IF信号的最大带宽的N倍，其中从零到采样频率的频谱被分成相等宽度的N个频域，其中N是高于2的偶数正数 ; 变频块（304）被配置为将输入的模拟RF信号转换为模拟IF信号，使得模拟IF信号位于具有最低频率的N / 2-1频带中的任一个中; 并且滤波器块（306-308）被布置为使模拟IF信号低通，使得位于区域中的任何干扰信号将在模拟IF信号所在的区域中的AD转换之后具有镜像被滤除，其中外差接收器结构还包括布置成滤波所述数字信号的数字信号处理块（311）。

5. 发明授权

US06963110B2 System and method for ESD protection 失效
公开(公告)号：US06963110B2
公开(公告)日：2005-11-08
申请号：US10198408
申请日：2002-07-19
申请人： Agnes N. Woo , Kenneth R. Kindsfater , Fang Lu
发明人： Agnes N. Woo , Kenneth R. Kindsfater , Fang Lu
IPC分类号： H01F17/00 , H01L23/50 , H01L23/522 , H01L23/60 , H01L23/62 , H01L27/02 , H01L27/08 , H03B5/12 , H03B5/36 , H03D7/16 , H03D7/18 , H03G1/00 , H03H11/12 , H03J1/00 , H03J3/04 , H03J3/08 , H03J3/18 , H03L7/10 , H03L7/23 , H04B1/28 , H01L29/72
CPC分类号： H01L23/50 , H01F17/0006 , H01F17/0013 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L23/60 , H01L27/0248 , H01L27/0251 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/1212 , H03B5/1228 , H03B5/1243 , H03B5/364 , H03D7/161 , H03D7/18 , H03G1/0029 , H03H11/1291 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L7/10 , H03L7/23 , H04B1/28 , H01L2924/00
摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

6. 发明申请

US20050147184A1 Signal processing method and signal processing apparatus 有权
标题翻译：信号处理方法及信号处理装置
公开(公告)号：US20050147184A1
公开(公告)日：2005-07-07
申请号：US10504742
申请日：2003-02-21
申请人： Noriaki Matsuno
发明人： Noriaki Matsuno
IPC分类号： H03D7/18 , H03D3/00 , H04B1/26 , H04B1/28 , H04L27/06
CPC分类号： H04B1/0007 , H03D3/007 , H04B1/28
摘要： A signal input into an input terminal 1 is input into mixers 2, 4, and down-converted with local signals having a phase difference of 90 degrees, respectively, whereby an I-signal and a Q-signal are obtained. An output signal from the mixer 4 is delayed 90 degrees in phase by a phase shifter 6. An adder 7 outputs a sum signal of the I-signal and the Q-signal, and a subtracter 8 outputs a subtracted signal between the I-signal and the Q-signal. The sum signal and the subtracted signal are input into band pass filters 9, 10, in which signals in undesired frequency band are cut, then converted into digital signals by AD converters 11, 12 and input into a signal processor 13. In the signal processor 13, a correlation signal of the sum signal and the subtracted signal is formed, and an image signal included in the sum signal is removed using the correlation signal and the subtracted signal.
摘要翻译：输入到输入端子1的信号被输入到混频器2,4中，并且分别用相位差为90度的本地信号进行下变频，由此获得I信号和Q信号。来自混频器4的输出信号由移相器6相位延迟90度。加法器7输出I信号和Q信号的和信号，减法器8在I信号和Q信号之间输出减法信号。和信号和减法信号被输入到带通滤波器9,10中，其中切断了不想要的频带中的信号，然后由AD转换器11,12转换成数字信号并输入信号处理器13。在信号处理器13中，形成和信号和相减信号的相关信号，并且使用相关信号和相减信号去除包括在和信号中的图像信号。

7. 发明申请

US20050143039A1 Image rejection quadratic filter 失效
标题翻译：图像抑制二次滤波器
公开(公告)号：US20050143039A1
公开(公告)日：2005-06-30
申请号：US10448740
申请日：2003-05-29
申请人： Takatsugu Kamata , Kimitake Utsunomiya
发明人： Takatsugu Kamata , Kimitake Utsunomiya
IPC分类号： H04N5/44 , H03D7/18 , H03H11/04 , H03H11/12 , H04B1/26 , H04B1/10 , H04B1/18
CPC分类号： H03H11/1291 , H03H11/04 , H03H11/1213
摘要： An image rejection quadratic filter is tunable to filter image frequencies over a wide band. In one embodiment, the image rejection filter includes in-phase and quadrature phase mixers. The image rejection has a fractional transfer function. The image rejection filter has two sub-circuits, wherein the first sub-circuit produces the imaginary component of the transfer function, and the second sub-circuit produces the real component of the transfer function. The first sub-circuit receives the Q signal, and the second sub-circuit receives the I signal. In one embodiment, to create the fractional transfer function, a multi-feedback looped integrator is used.
摘要翻译：图像抑制二次滤波器是可调谐的，以过滤宽频带上的图像频率。在一个实施例中，镜像抑制滤波器包括同相和正交相位混频器。镜像抑制具有分数传递函数。图像抑制滤波器具有两个子电路，其中第一子电路产生传递函数的虚分量，第二子电路产生传递函数的实部分量。第一子电路接收Q信号，第二子电路接收I信号。在一个实施例中，为了创建分数传递函数，使用多反馈循环积分器。

8. 发明申请

US20050143031A1 Multi-band receiver 审中-公开
标题翻译：多频段接收机
公开(公告)号：US20050143031A1
公开(公告)日：2005-06-30
申请号：US10503789
申请日：2002-01-21
申请人： Oswald Moonen , Peter Rutten , Stephanus Crijns
发明人： Oswald Moonen , Peter Rutten , Stephanus Crijns
IPC分类号： H04B1/26 , H03D7/18 , H03J3/08 , H04B1/30 , H04B1/40 , H04B1/18
CPC分类号： H04B1/005 , H03J3/08 , H04B1/30 , H04B1/406
摘要： A multi-band receiver for receiving an input signal having a frequency situated either in a first band or in a second band. The receiver comprising a mixer for combining an amplified signal having substantially the same frequency as the input signal with a periodical signal generated by a local oscillator. The mixer generates an intermediate frequency signal, the intermediate frequency signal (IF) being inputted to an IF band-pass filter. A central frequency of the band-pass filter is substantially equal to a frequency of the intermediate frequency signal. The receiver is characterized in that the central frequency of the IF band-pass filter is substantially independent of a combining mode of the amplified signal and the periodical signal, the combining mode being selected from an upper heterodyning mode and a lower heterodyning mode.
摘要翻译：一种用于接收具有位于第一频带或第二频带中的频率的输入信号的多频带接收机。接收机包括用于将具有与输入信号基本上相同的频率的放大信号与由本地振荡器产生的周期信号组合的混频器。混频器产生中频信号，中频信号（IF）被输入到IF带通滤波器。带通滤波器的中心频率基本上等于中频信号的频率。接收器的特征在于，IF带通滤波器的中心频率基本上与放大信号和周期信号的组合模式无关，组合模式选自上外插模式和下外插模式。

9. 发明授权

US06901248B1 Frequency converter and radio frequency tuner 有权
标题翻译：变频器和射频调谐器
公开(公告)号：US06901248B1
公开(公告)日：2005-05-31
申请号：US09658745
申请日：2000-09-11
申请人： Nicholas P Cowley
发明人： Nicholas P Cowley
IPC分类号： H04N5/44 , H03D7/00 , H03D7/18 , H04B1/26
CPC分类号： H03D7/18
摘要： A single conversion frequency converter comprises an image reject mixer and a local oscillator. The local oscillator comprises a variable frequency oscillator and a variable divider. The variable divider supplies to the mixer a local oscillator signal whose frequency is a sub-multiple of the frequency of the variable frequency oscillator.
摘要翻译：单个转换频率转换器包括图像拒绝混频器和本地振荡器。本地振荡器包括可变频率振荡器和可变分频器。可变分频器向混频器提供频率为可变频率振荡器频率的倍数的本地振荡器信号。

10. 发明申请

US20050110555A1 Amplifier and frequency converter 失效
标题翻译：放大器和变频器
公开(公告)号：US20050110555A1
公开(公告)日：2005-05-26
申请号：US10506078
申请日：2003-03-18
申请人： Toshifumi Nakatani , Jyunji Itoh , Hideo Nakano
发明人： Toshifumi Nakatani , Jyunji Itoh , Hideo Nakano
IPC分类号： H03D7/14 , H03D7/18 , H03F1/34 , H03F3/45
CPC分类号： H03F3/45089 , H03F1/34 , H03F2200/372 , H03F2203/45298 , H03F2203/45386 , H03F2203/45464 , H03F2203/45544 , H03F2203/45631
摘要： An amplifier circuit (15) amplifies a differential signal supplied by a pair of input terminals ( {P1+, P1−}). A phase controller circuit (25) is placed between the emitters of bipolar transistors (101a, 101b) and the ground. A feedback circuit (35) is placed across the input and the output of the amplifier circuit (15) for feeding the output of the amplifier circuit (15) back to the input thereof. A phase change amount in the amplifier circuit (15) is determined by the values of inductors (201a, 201b), whereas a phase change amount in the feedback circuit (35) is determined by the values of resistances (301a, 301b) and capacitors (302a, 302b). The values of these devices are selected so that a phase difference between an input signal and a feedback signal is approximately 180 degrees in a range from the frequency of a fundamental wave of the input signal to the frequency of a second harmonic thereof.
摘要翻译：放大器电路（15）放大由一对输入端（{P 1 +，P 1 - }）提供的差分信号。相位控制器电路（25）被放置在双极晶体管（101a，101b）的发射极和地之间。反馈电路（35）放置在放大器电路（15）的输入和输出两端，用于将放大器电路（15）的输出反馈到其输入端。放大器电路（15）中的相位变化量由电感器（201a，201b）的值确定，而反馈电路（35）中的相位变化量由电阻值（301a，301）决定 b）和电容器（302a，302b）。选择这些装置的值，使得在从输入信号的基波的频率到其二次谐波的频率的范围内，输入信号和反馈信号之间的相位差为大约180度。

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