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    • 91. 发明授权
    • Non-linearity cancellation in a dual-path ADC
    • 双路ADC中的非线性消除
    • US09503112B1
    • 2016-11-22
    • US15154769
    • 2016-05-13
    • Cirrus Logic International Semiconductor Ltd.
    • Ramin ZanbaghiYousof MortazaviAaron BrennanJohn L. Melanson
    • H03M1/06H03M1/10
    • H03M1/0602G10L19/00H03M1/1004H03M1/1038H03M1/1042H03M1/188H03M1/60
    • The overall performance of a dual-path ADC system may be improved by using a VCO-based ADC for small-amplitude signals and employing non-linear cancellation to remove nonlinearities in signals output by the VCO-based ADC. In particular, VCO-based dual-path ADC systems of this disclosure may be configured to receive a first digital signal from a first ADC and a second digital signal from a second ADC, wherein the second digital signal is more non-linear than the first digital signal. The dual-path systems may also be configured to determine one or more non-linear coefficients of the second digital signal based, at least in part, on processing of the first and second digital signals. The dual-path systems may be further configured to modify the second digital signal based, at least in part, on the determined one or more non-linear coefficients to generate a more linear second digital signal.
    • 通过使用基于VCO的ADC用于小振幅信号并采用非线性消除来消除由基于VCO的ADC输出的信号中的非线性,可以提高双路ADC系统的整体性能。 特别地,本公开的基于VCO的双路径ADC系统可以被配置为从第一ADC接收第一数字信号和从第二ADC接收第二数字信号,其中第二数字信号比第一ADC更非线性 数字信号。 至少部分地基于第一和第二数字信号的处理,双路系统还可以被配置为确定第二数字信号的一个或多个非线性系数。 至少部分地基于所确定的一个或多个非线性系数来修改第二数字信号以生成更线性的第二数字信号。
    • 93. 发明授权
    • Class-D amplifier circuits
    • D类放大器电路
    • US09473087B2
    • 2016-10-18
    • US14521191
    • 2014-10-22
    • Wolfson Microelectronics Ltd.
    • John Paul LessoToru Ido
    • H03F3/38H03F3/217H03F1/02
    • H03F3/2171H03F1/0211H03F3/187H03F3/217H03F2200/165H03F2200/171H03F2200/333H03F2200/351H03G1/0088
    • Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.
    • 具有提高功率效率的D类放大器电路的方法和装置。 电路具有至少具有第一和第二开关的输出级和接收要被放大的输入信号SIN和第一时钟信号fSW的调制器。 调制器基于输入信号在开关周期内控制第一和第二开关的占空比,其中开关周期具有基于第一时钟信号的开关频率。 频率控制器响应于输入信号的幅度的指示来控制第一时钟信号的频率,以便提供第一输入信号幅度的第一开关频率和在第二输入信号幅度下的第二,较低开关频率 ,输入信号幅度。 在低信号幅度下可以容忍较低的开关频率,并且以这种方式改变开关频率,从而在降低开关功率损耗的同时保持稳定性。
    • 94. 发明授权
    • Beamforming a digital microphone array on a common platform
    • 在一个通用平台上成像一个数字麦克风阵列
    • US09467778B2
    • 2016-10-11
    • US13844802
    • 2013-03-16
    • Cirrus Logic, Inc.
    • Eric J. SwansonEd Schneider
    • H04R3/00
    • H04R3/005
    • An interface for an array of digital microphones in an electronic device may include a head-end chip coupled to the digital microphones through a bus. The bus may be shared by each microphone of the array of microphones and be multiplexed to allow transmission of data from the microphones to the head-end chip and transmission of power from the head-end chip to the array of digital microphones. The head-end chip may perform signal processing on receive data from the array of digital microphones to create beamforming arrays. The array of microphones may include microphones with different characteristics to improve performance of the array of microphones.
    • 用于电子设备中的数字麦克风阵列的接口可以包括通过总线耦合到数字麦克风的头端芯片。 总线可以由麦克风阵列的每个麦克风共享,并被复用以允许数据从麦克风传输到头端芯片,并将功率从头端芯片传输到数字麦克风阵列。 前端芯片可以对来自数字麦克风阵列的接收数据执行信号处理,以创建波束成形阵列。 麦克风阵列可以包括具有不同特性的麦克风,以改善麦克风阵列的性能。
    • 95. 发明授权
    • Chip level integration of a boosted class-D amplifier and integrated LED flash driver
    • 升压型D类放大器和集成LED闪光驱动器的芯片级集成
    • US09377792B2
    • 2016-06-28
    • US13548963
    • 2012-07-13
    • Lingli ZhangMichael Pate
    • Lingli ZhangMichael Pate
    • G05F1/10H03F3/217H05B33/08H02M3/156
    • G05F1/10H02M3/156H03F3/217H05B33/0842Y10T307/438
    • A single integrated circuit includes a single boost converter, a first circuit, a second circuit, and a controller. The single boost converter supplies power to the first and second circuits. The controller receives an operational mode signal and in response to the operational mode signal, drives the single boost converter to respectively provide power to the first and second circuits. When the first and second circuits are simultaneously active, the controller manages an operation of the first circuit so that proper operation of the second circuit is maintained. The first circuit may be an LED flash driver, and the second circuit may be an audio amplifier, such as a Class-D audio amplifier. The controller manages an operation of the audio amplifier so that a sufficient amount of current is supplied to the LED flash driver for proper operation of the LED flash driver.
    • 单个集成电路包括单个升压转换器,第一电路,第二电路和控制器。 单个升压转换器为第一和第二电路供电。 控制器接收操作模式信号并且响应于操作模式信号,驱动单个升压转换器以分别向第一和第二电路提供电力。 当第一和第二电路同时有效时,控制器管理第一电路的操作,从而保持第二电路的正常操作。 第一电路可以是LED闪光驱动器,并且第二电路可以是诸如D类音频放大器的音频放大器。 控制器管理音频放大器的操作,使得足够量的电流被提供给LED闪光灯驱动器以适当地操作LED闪光灯驱动器。