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    • 31. 发明授权
    • miR 204, miR 211, their anti-miRs, and therapeutic uses of same
    • miR 204,miR 211,其抗miRs及其治疗用途
    • US08455454B2
    • 2013-06-04
    • US13060877
    • 2009-08-26
    • Fei WangSheldon MillerCongxiao ZhangArvydas Maminishkis
    • Fei WangSheldon MillerCongxiao ZhangArvydas Maminishkis
    • C12N15/11A61K48/00C07H21/02C07H21/04
    • A61K31/7105C12N15/1138C12N2310/113C12N2310/14C12N2310/141
    • Embodiments of the invention provide methods of preventing or treating detrimental epithelial cell proliferation, loss of epithelial cell differentiation, age-related macular degeneration and/or proliferative vitreal retinopathy in an individual comprising administering to an individual in need thereof an effective amount of miR 204, an effective amount of miR 211, or an effective amount of a mixture of miR 204 and miR 211. A further embodiment of the invention provides a method of facilitating the transport of a substance across an epithelium in an individual comprising administrating to an individual an effective amount of anti-miR 204, an effective amount of anti-miR 211, or an effective amount of a mixture of anti-miR 204 and anti-miR 211. Additional embodiments of the invention include pharmaceutical compositions of miR 204 and/or miR 211 and pharmaceutical compositions of anti-miR 204 and/or anti-miR 211.
    • 本发明的实施方案提供预防或治疗个体中有害上皮细胞增殖,上皮细胞分化丧失,年龄相关性黄斑变性和/或增殖性玻璃体视网膜病变的方法,包括向有需要的个体施用有效量的miR 204, 有效量的miR 211或有效量的miR 204和miR 211的混合物。本发明的另一个实施方案提供了促进物质通过个体上皮的运输的方法,包括向个体施用有效量的miR 抗miR204的量,有效量的抗miR 211,或有效量的抗miR 204和抗miR 211的混合物。本发明的其它实施方案包括miR 204和/或miR 211的药物组合物 和抗miR 204和/或抗miR 211的药物组合物。
    • 37. 发明申请
    • SAMPLE AND HOLD CIRCUIT AND THE METHOD THEREOF
    • 采样和保持电路及其方法
    • US20130002461A1
    • 2013-01-03
    • US13538940
    • 2012-06-29
    • Yike LiXiaoyu XiFei WangZhengxin Li
    • Yike LiXiaoyu XiFei WangZhengxin Li
    • H03M1/00
    • H03K5/1532
    • A sample and hold circuit and the method thereof are disclosed. The sample and hold circuit may be applied in voltage regulators or other circuits. The sample and hold circuit comprises: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a control circuit configured to receive the input signal and the output signal, and wherein based on the input signal and the output signal, the control circuit generates a digital signal, and wherein the digital signal increases when the output signal is lower than the input signal, and maintains when the output signal is larger than or equal to the input signal; a digital-to-analog converter (DAC) configured to convert the digital signal to the output signal.
    • 公开了采样保持电路及其方法。 采样保持电路可以应用在电压调节器或其他电路中。 采样和保持电路包括:输入端,被配置为接收输入信号; 输出端子,被配置为提供输出信号; 控制电路,被配置为接收所述输入信号和所述输出信号,并且其中基于所述输入信号和所述输出信号,所述控制电路产生数字信号,并且其中当所述输出信号低于所述输入信号时,所述数字信号增加 并且当输出信号大于或等于输入信号时保持; 配置为将数字信号转换为输出信号的数模转换器(DAC)。