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1. 发明授权

US09834860B2 Method of high growth rate deposition for group III/V materials 有权
公开(公告)号：US09834860B2
公开(公告)日：2017-12-05
申请号：US12904090
申请日：2010-10-13
申请人： Lori D. Washington , David P. Bour , Gregg Higashi , Gang He
发明人： Lori D. Washington , David P. Bour , Gregg Higashi , Gang He
IPC分类号： C30B25/16 , C30B25/02 , C30B25/18 , C30B29/40 , C30B29/42 , H01L21/02
CPC分类号： C30B25/02 , C30B25/183 , C30B29/40 , C30B29/42 , H01L21/02395 , H01L21/02463 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/0262
摘要： Embodiments of the invention generally relate processes for epitaxial growing Group III/V materials at high growth rates, such as about 30 μm/hr or greater, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, or greater. The deposited Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

2. 发明授权

US09093395B2 Method and system for local control of defect density in gallium nitride based electronics 有权
标题翻译：用于局部控制氮化镓基电子学缺陷密度的方法和系统
公开(公告)号：US09093395B2
公开(公告)日：2015-07-28
申请号：US13225345
申请日：2011-09-02
申请人： David P. Bour , Linda Romano , Thomas R. Prunty , Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown
发明人： David P. Bour , Linda Romano , Thomas R. Prunty , Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown
IPC分类号： H01L29/20 , H01L21/302 , H01L29/32 , H01L29/66 , H01L29/808 , H01L29/861 , H01L29/872
CPC分类号： H01L29/32 , H01L21/02389 , H01L21/0254 , H01L29/2003 , H01L29/6609 , H01L29/66143 , H01L29/66212 , H01L29/66446 , H01L29/66909 , H01L29/66924 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer.
摘要翻译：二极管包括以第一位错密度和第一导电类型为特征的衬底，耦合到衬底的第一触点和具有预定厚度并耦合到半导体衬底的掩模层。掩模层包括多个连续部分和暴露基板并设置在连续部分之间的多个开口。二极管还包括大于5μm厚的外延层，其与衬底和掩模层耦合。外延层包括覆盖多个开口的第一组区域，其特征在于第二位错密度和覆盖该组连续区段的第二组区域，其特征在于第三位错密度小于第一位错密度和第二位错密度。二极管还包括耦合到外延层的第二接触。

3. 发明授权

US09076827B2 Transfer chamber metrology for improved device yield 有权
标题翻译：转移室计量，提高装置产量
公开(公告)号：US09076827B2
公开(公告)日：2015-07-07
申请号：US13230573
申请日：2011-09-12
申请人： David P. Bour , Alain Duboust , Alexey Goder
发明人： David P. Bour , Alain Duboust , Alexey Goder
IPC分类号： C30B25/16 , C30B25/08 , C30B25/10 , C23C16/06 , C23C16/52 , H01L21/67 , G01K11/20 , H01L21/66 , H01L21/02 , H01L33/00
CPC分类号： H01L33/0075 , C30B25/16 , C30B29/40 , G01K11/20 , G01K2217/00 , H01L21/0242 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/67196 , H01L21/67248 , H01L22/12 , H01L22/26 , H01L33/0025 , H01L33/007 , H01L33/06 , H01L33/32 , Y10T117/10 , Y10T117/1004 , Y10T117/1008
摘要： Apparatus and method for control of epitaxial growth parameters, for example during manufacture of light emitting diodes (LEDs). Embodiments include PL measurement of a group III-V film following growth while a substrate at an elevated temperature is in a transfer chamber of a multi-chamber cluster tool. In other embodiments, a film thickness measurement, a contactless resistivity measurement, and a particle and/or roughness measure is performed while the substrate is disposed in the transfer chamber. One or more of the measurements performed in the transfer chamber are temperature corrected to room temperature by estimating the elevated temperature based on emission from a GaN base layer disposed below the group III-V film. In other embodiments, temperature correction is based on an absorbance band edge of the GaN base layer determined from collected white light reflectance spectra. Temperature corrected metrology is then used to control growth processes.
摘要翻译：用于控制外延生长参数的设备和方法，例如在制造发光二极管（LED）期间。实施例包括生长后的III-V族薄膜的PL测量，而在高温下的基底处于多腔聚集工具的转移室中。在其它实施例中，在衬底设置在传送室中的同时，执行膜厚度测量，非接触电阻率测量以及颗粒和/或粗糙度测量。通过基于从设置在III-V族III膜以下的GaN基底层的发射来估计升高的温度，在传送室中执行的一个或多个测量值被温度校正到室温。在其他实施例中，温度校正基于由所收集的白光反射光谱确定的GaN基底层的吸收带边缘。然后使用温度校正计量来控制生长过程。

4. 发明申请

US20130292686A1 METHOD AND SYSTEM FOR PLANAR REGROWTH IN GAN ELECTRONIC DEVICES 有权
公开(公告)号：US20130292686A1
公开(公告)日：2013-11-07
申请号：US13465812
申请日：2012-05-07
申请人： Isik C. Kizilyalli , Linda Romano , David P. Bour
发明人： Isik C. Kizilyalli , Linda Romano , David P. Bour
IPC分类号： H01L29/20 , H01L21/337 , H01L21/20
CPC分类号： H01L29/66924 , H01L29/2003 , H01L29/66446 , H01L29/7832 , H01L29/8083
摘要： A vertical JFET includes a III-nitride substrate and a III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The first III-nitride epitaxial layer has a first dopant concentration. The vertical JFET also includes a III-nitride epitaxial structure coupled to the first III-nitride epitaxial layer. The III-nitride epitaxial structure includes a set of channels of the first conductivity type and having a second dopant concentration, a set of sources of the first conductivity type, having a third dopant concentration greater than the first dopant concentration, and each characterized by a contact surface, and a set of regrown gates interspersed between the set of channels. An upper surface of the set of regrown gates is substantially coplanar with the contact surfaces of the set of sources.

5. 发明申请

US20130087879A1 SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS 有权
公开(公告)号：US20130087879A1
公开(公告)日：2013-04-11
申请号：US13270641
申请日：2011-10-11
申请人： Andrew Edwards , Hui Nie , Isik C. Kizilyalli , Richard J. Brown , David P. Bour , Linda Romano , Thomas R. Prunty
发明人： Andrew Edwards , Hui Nie , Isik C. Kizilyalli , Richard J. Brown , David P. Bour , Linda Romano , Thomas R. Prunty
IPC分类号： H01L29/47 , H01L21/20
CPC分类号： H01L29/66143 , H01L21/26546 , H01L29/0615 , H01L29/0619 , H01L29/0692 , H01L29/08 , H01L29/2003 , H01L29/404 , H01L29/66083 , H01L29/66204 , H01L29/66212 , H01L29/66416 , H01L29/66924 , H01L29/8083 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures.

6. 发明申请

US20130087878A1 METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE 有权
标题翻译：制备GAN MERGED P-I-N肖特基（MPS）二极体的方法
公开(公告)号：US20130087878A1
公开(公告)日：2013-04-11
申请号：US13270625
申请日：2011-10-11
申请人： Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
发明人： Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L29/47 , H01L21/20
CPC分类号： H01L29/66143 , H01L21/046 , H01L21/0495 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.
摘要翻译：半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。半导体结构还包括III族氮化物外延结构，其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

7. 发明申请

US20130015552A1 Electrical Isolation Of High Defect Density Regions In A Semiconductor Device 审中-公开
标题翻译：半导体器件中高缺陷密度区域的电隔离
公开(公告)号：US20130015552A1
公开(公告)日：2013-01-17
申请号：US13180758
申请日：2011-07-12
申请人： Isik C. Kizilyalli , David P. Bour , Richard J. Brown , Andrew P. Edwards , Hui Nie , Linda T. Romano
发明人： Isik C. Kizilyalli , David P. Bour , Richard J. Brown , Andrew P. Edwards , Hui Nie , Linda T. Romano
IPC分类号： H01L29/36 , H01L21/761 , H01L29/06 , H01L21/762
CPC分类号： H01L21/761 , H01L21/76224 , H01L29/2003 , H01L29/32 , H01L29/861
摘要： Embodiments of the invention include a III-nitride semiconductor layer including a first portion having a first defect density and a second portion having a second defect density. The first defect density is greater than the second defect density. An insulating material is disposed over the first portion. The insulating material is not formed on or is removed from the second portion.
摘要翻译：本发明的实施例包括具有第一缺陷密度的第一部分和具有第二缺陷密度的第二部分的III族氮化物半导体层。第一缺陷密度大于第二缺陷密度。绝缘材料设置在第一部分上。绝缘材料不形成在第二部分上或从第二部分移除。

8. 发明申请

US20120248577A1 Controlled Doping in III-V Materials 审中-公开
标题翻译： III-V材料中的控制掺杂
公开(公告)号：US20120248577A1
公开(公告)日：2012-10-04
申请号：US13079710
申请日：2011-04-04
申请人： Linda T. Romano , David P. Bour , Isik C. Kizilyalli , Hui Nie , Thomas R. Prunty
发明人： Linda T. Romano , David P. Bour , Isik C. Kizilyalli , Hui Nie , Thomas R. Prunty
IPC分类号： H01L21/205 , H01L29/20
CPC分类号： H01L21/02576 , H01L21/02378 , H01L21/0242 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/02579 , H01L21/0262 , H01L29/157 , H01L29/2003 , H01L29/207 , H01L29/66462 , H01L29/7787 , H01L29/872 , H01S5/305 , H01S5/32341
摘要： A method according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor layer from a gas containing gallium, a gas containing nitrogen, and a gas containing indium. The concentration of indium in the III-nitride semiconductor structure is greater than zero and less than 1020 cm−3. A structure according to embodiments of the invention includes a super lattice of alternating first and second III-nitride layers. The first layers are more highly doped than the second layers. The average dopant concentration in the super lattice is less than 1020 cm−3.
摘要翻译：根据本发明的实施方案的方法包括从含镓的气体，含氮气体和含铟气体外延生长III族氮化物半导体层。 III族氮化物半导体结构中铟的浓度大于零且小于1020cm-3。根据本发明的实施例的结构包括交替的第一和第二III族氮化物层的超晶格。第一层比第二层更高掺杂。超晶格中的平均掺杂剂浓度小于1020cm-3。

9. 发明申请

US20110268880A1 REACTOR CLEAN 有权
标题翻译：反应器清洁
公开(公告)号：US20110268880A1
公开(公告)日：2011-11-03
申请号：US12913688
申请日：2010-10-27
申请人： David P. BOUR
发明人： David P. BOUR
IPC分类号： C23C16/455 , C23C16/46 , C23C16/458
CPC分类号： C23C16/54 , C23C16/301 , C23C16/45519 , H01L21/67173 , H01L21/6719 , H01L21/6776
摘要： A method and apparatus for performing chemical vapor deposition (CVD) processes is provided. In one embodiment, the apparatus comprises a reactor body having a processing region, comprising a wafer carrier track having a wafer carrier disposed thereon, at least one sidewall having an exhaust assembly for exhausting gases from the processing region, a lid assembly disposed on the reactor body, comprising a lid support comprising a first showerhead assembly for supplying reactant gases to the processing region, a first isolator assembly for supplying isolation gases to the processing region, a second showerhead assembly for supplying reactant gases to the processing region, and a second isolator assembly for supplying isolation gases to the processing region, wherein the first showerhead assembly, the first isolator assembly, the second showerhead assembly, and the second isolator assembly are consecutively and linearly disposed next to each other.
摘要翻译：提供了一种用于进行化学气相沉积（CVD）工艺的方法和装置。在一个实施例中，该装置包括具有处理区域的反应器主体，该反应器主体包括具有设置在其上的晶片载体的晶片载体轨道，至少一个侧壁，具有用于从处理区域排出气体的排气组件，设置在反应器主体，包括盖支撑件，其包括用于将反应气体供应到处理区域的第一喷淋头组件，用于向处理区域供应隔离气体的第一隔离器组件，用于将反应气体供应到处理区域的第二喷头组件和第二隔离器用于向处理区域供应隔离气体的组件，其中第一喷淋头组件，第一隔离器组件，第二淋浴头组件和第二隔离器组件彼此相邻并线性地设置。

10. 发明授权

US07856040B2 Semiconductor light emitting devices with non-epitaxial upper cladding 有权
标题翻译：具有非外延上包层的半导体发光器件
公开(公告)号：US07856040B2
公开(公告)日：2010-12-21
申请号：US12237106
申请日：2008-09-24
申请人： David P. Bour , Christopher L. Chua , Noble M. Johnson , Zhihong Yang
发明人： David P. Bour , Christopher L. Chua , Noble M. Johnson , Zhihong Yang
IPC分类号： H01S5/00
CPC分类号： H01S5/34333 , B82Y20/00 , H01L33/0045 , H01S5/0425 , H01S5/1039 , H01S5/1228 , H01S5/2009 , H01S5/2027 , H01S5/22 , H01S5/3211 , H01S5/3214 , H01S5/3216
摘要： The AlGaN upper cladding layer of a nitride laser diode is replaced by a non-epitaxial layer, such as metallic silver. If chosen to have a relatively low refractive index value, the mode loss from absorption in the non-epitaxial cladding layer is acceptably small. If also chosen to have a relatively high work-function, the non-epitaxial layer forms an electrical contact to the nitride semiconductors. An indium-tin-oxide layer may also be employed with the non-epitaxial cladding layer.
摘要翻译：氮化物激光二极管的AlGaN上覆层由诸如金属银的非外延层代替。如果选择具有相对低的折射率值，则在非外延包层中的吸收的模式损耗可以接受地小。如果还选择具有较高的功函数，则非外延层与氮化物半导体形成电接触。也可以在非外延包覆层中使用铟锡氧化物层。

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