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    • 7. 发明申请
    • Multiple buffer insertion in global routing
    • 在全局路由中插入多个缓冲区
    • US20060112363A1
    • 2006-05-25
    • US10992999
    • 2004-11-19
    • Alexei GalatenkoElyar GasanovAndrej ZolotykhIlya Lyalin
    • Alexei GalatenkoElyar GasanovAndrej ZolotykhIlya Lyalin
    • G06F17/50G06F9/45
    • G06F17/5045
    • Buffers are inserted into an integrated circuit chip design using a table that identifies buffer types based on buffer height, input capacitance, output capacitance and ramptime. A buffer routing tree is created having root, internal and leaf vertices. For each internal vertex, the initial circuit parameters are compared to circuit parameters associated with buffers identified in the table to identify whether a buffer identified in the table can be inserted to the respective internal vertex. If it can, an optimal insertable buffer is selected from the table and inserted to a selected internal vertex based at least in part on the comparison results. Also described is a computer process of creating the buffer type table.
    • 使用基于缓冲器高度,输入电容,输出电容和延迟时间来识别缓冲器类型的表,将缓冲器插入到集成电路芯片设计中。 创建具有根,内部和叶子顶点的缓冲区路由树。 对于每个内部顶点,将初始电路参数与与表中标识的缓冲器相关联的电路参数进行比较,以识别表中识别的缓冲区是否可以插入到相应的内部顶点。 如果可以,则至少部分地基于比较结果,从表中选择最佳可插入缓冲器并将其插入到选定的内部顶点。 还描述了创建缓冲器类型表的计算机处理。