专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09136432B2 High efficiency light emitting diode 有权
标题翻译：高效率发光二极管
公开(公告)号：US09136432B2
公开(公告)日：2015-09-15
申请号：US13997873
申请日：2011-12-06
申请人： Jun Ho Yun , Ki Bum Nam , Joon Hee Lee , Chang Youn Kim , Hong Jae Yoo , Sung Hoon Hong
发明人： Jun Ho Yun , Ki Bum Nam , Joon Hee Lee , Chang Youn Kim , Hong Jae Yoo , Sung Hoon Hong
IPC分类号： H01L33/14 , H01L33/38 , H01L33/40 , H01L33/00 , H01L33/22 , H01L33/44
CPC分类号： H01L33/14 , H01L33/0079 , H01L33/22 , H01L33/38 , H01L33/405 , H01L33/44
摘要： Disclosed herein is a high efficiency light emitting diode. The light emitting diode includes: a semiconductor stack positioned over a support substrate; a reflective metal layer positioned between the support substrate and the semiconductor stack to ohmic-contact a p-type compound semiconductor layer of the semiconductor stack and having a groove exposing the semiconductor stack; a first electrode pad positioned on an n-type compound semiconductor layer of the semiconductor stack; an electrode extension extending from the first electrode pad and positioned over the groove region; and an upper insulating layer interposed between the first electrode pad and the semiconductor stack. In addition, the n-type compound semiconductor layer includes an n-type contact layer, and the n-type contact layer has a Si doping concentration of 5 to 7×1018/cm3 and a thickness in the range of 5 to 10 um.
摘要翻译：本文公开了一种高效率发光二极管。发光二极管包括：位于支撑衬底上的半导体堆叠; 反射金属层，位于所述支撑基板和所述半导体堆叠之间，以与所述半导体堆叠的p型化合物半导体层欧姆接触并具有暴露所述半导体叠层的沟槽; 位于所述半导体叠层的n型化合物半导体层上的第一电极焊盘; 电极延伸部，其从所述第一电极焊盘延伸并定位在所述沟槽区域上; 以及介于所述第一电极焊盘和所述半导体堆叠之间的上绝缘层。此外，n型化合物半导体层包括n型接触层，n型接触层的Si掺杂浓度为5〜7×1018 / cm3，厚度为5〜10μm。

2. 发明授权

US09054231B2 Method of fabricating semiconductor device using gang bonding and semiconductor device fabricated by the same 有权
标题翻译：使用组合半导体器件制造的半导体器件的制造方法
公开(公告)号：US09054231B2
公开(公告)日：2015-06-09
申请号：US13992941
申请日：2011-06-30
申请人： Chung Hoon Lee , Dae Sung Kal , Ki Bum Nam
发明人： Chung Hoon Lee , Dae Sung Kal , Ki Bum Nam
IPC分类号： H01L21/00 , H01L33/00 , H01L33/50 , H01L23/00 , H01L33/48
CPC分类号： H01L33/507 , H01L23/49805 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/27 , H01L24/32 , H01L24/33 , H01L24/83 , H01L24/94 , H01L33/005 , H01L33/0079 , H01L33/0095 , H01L33/36 , H01L33/44 , H01L33/486 , H01L33/50 , H01L2224/04026 , H01L2224/05073 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05553 , H01L2224/05571 , H01L2224/06151 , H01L2224/11462 , H01L2224/16013 , H01L2224/16057 , H01L2224/16151 , H01L2224/27462 , H01L2224/32238 , H01L2224/325 , H01L2224/33151 , H01L2224/81893 , H01L2224/83447 , H01L2224/83455 , H01L2224/83893 , H01L2224/94 , H01L2224/97 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/12041 , H01L2924/12042 , H01L2924/15787 , H01L2933/0033 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/00
摘要： A method of fabricating a semiconductor device using gang bonding and a semiconductor device fabricated by the same, the method comprising preparing a support substrate having a plurality of semiconductor stack structures aligned on a top thereof. Each of the semiconductor stack structures comprises a first conductive semiconductor layer, a second conductive semiconductor layer and an active region interposed between the first and second conductive semiconductor layers. A member having first lead electrodes and second lead electrodes is prepared to correspond to the plurality of semiconductor stack structures. Then, the semiconductor stack structures are bonded to the member while maintaining the semiconductor stack structures on the support substrate. After the semiconductor stack structures are bonded to the member, the member is divided.
摘要翻译：一种制造使用组合键的半导体器件的方法和由其制造的半导体器件，该方法包括制备具有在其顶部上排列的多个半导体叠层结构的支撑衬底。每个半导体堆叠结构包括第一导电半导体层，第二导电半导体层和介于第一和第二导电半导体层之间的有源区。准备具有第一引线电极和第二引线电极的部件以对应于多个半导体叠层结构。然后，将半导体堆叠结构保持在支撑基板上，同时保持半导体堆叠结构。在半导体堆叠结构结合到构件之后，构件被分割。

3. 发明申请

US20070047688A1 Frequency detecting circuit and method, and semiconductor apparatus including frequency detecting circuit 有权
标题翻译：频率检测电路和方法，以及包括频率检测电路的半导体装置
公开(公告)号：US20070047688A1
公开(公告)日：2007-03-01
申请号：US11507771
申请日：2006-08-22
申请人： Hyuk-Jun Sung , Ki-Bum Nam
发明人： Hyuk-Jun Sung , Ki-Bum Nam
IPC分类号： H03D3/24
CPC分类号： H03D13/001
摘要： A frequency detecting circuit and method and a semiconductor apparatus including the frequency detecting circuit, in which the frequency detecting circuit includes an edge detecting circuit, a clock signal generating circuit, and a determination circuit. The edge detecting circuit detects an edge of an input clock signal. The clock signal generating circuit generates a selection clock signal, which is a periodic pulse signal, in response to the detected edge. The determination circuit generates a frequency detection signal based on the number of occurrences of the selection clock signal in a period of the clock signal. The semiconductor apparatus includes the above-described frequency detecting circuit and a processor resetting the semiconductor apparatus in response to the frequency detection signal. Since a frequency is detected every half period, that is every high/low level period, of the clock signal in a digital manner, the reliability and the accuracy of frequency detection is improved.
摘要翻译：频率检测电路和方法以及包括频率检测电路的半导体装置，其中频率检测电路包括边缘检测电路，时钟信号发生电路和确定电路。边缘检测电路检测输入时钟信号的边沿。时钟信号发生电路响应于检测到的边沿而产生作为周期脉冲信号的选择时钟信号。确定电路根据时钟信号的周期内的选择时钟信号的出现次数生成频率检测信号。半导体装置包括上述频率检测电路和响应于该频率检测信号而重置半导体装置的处理器。由于以数字方式每半个周期（即每个高/低电平周期）检测频率，所以提高了频率检测的可靠性和精度。

4. 发明申请

US20170317247A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING GANG BONDING AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME 审中-公开
公开(公告)号：US20170317247A1
公开(公告)日：2017-11-02
申请号：US15646099
申请日：2017-07-11
申请人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
发明人： Chung Hoon LEE , Dae Sung KAL , Ki Bum NAM
IPC分类号： H01L33/50 , H01L33/44 , H01L23/00 , H01L33/00 , H01L23/498 , H01L33/36 , H01L33/48
CPC分类号： H01L33/507 , H01L23/49805 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/27 , H01L24/32 , H01L24/33 , H01L24/83 , H01L24/94 , H01L33/005 , H01L33/0079 , H01L33/0095 , H01L33/36 , H01L33/44 , H01L33/486 , H01L33/50 , H01L2224/04026 , H01L2224/05073 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05553 , H01L2224/05571 , H01L2224/06151 , H01L2224/11462 , H01L2224/16013 , H01L2224/16057 , H01L2224/16151 , H01L2224/27462 , H01L2224/32238 , H01L2224/325 , H01L2224/33151 , H01L2224/81893 , H01L2224/83447 , H01L2224/83455 , H01L2224/83893 , H01L2224/94 , H01L2224/97 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/12041 , H01L2924/12042 , H01L2924/15787 , H01L2933/0033 , H01L2924/00012 , H01L2924/00014 , H01L2224/81 , H01L2924/00
摘要： A semiconductor device including a first lead electrode and a second lead electrode; a semiconductor stack structure disposed on the member, the semiconductor stack structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active region interposed between the first and second conductive semiconductor layers; a first electrode electrically connected to the first conductive semiconductor layer; a second electrode electrically connected to the second conductive semiconductor layer; a plating layer configured to bond the semiconductor stack structure to the member; and a first wavelength converter that covers at least side surfaces of the semiconductor stack structure.

5. 发明申请

US20140319553A1 LIGHT EMITTING DEVICE FOR HIGH CURRENT OPERATION 审中-公开
标题翻译：用于高电流操作的发光装置
公开(公告)号：US20140319553A1
公开(公告)日：2014-10-30
申请号：US14240996
申请日：2012-08-22
申请人： Kyung Hee Ye , Dae Sung Cho , Ki Bum Nam
发明人： Kyung Hee Ye , Dae Sung Cho , Ki Bum Nam
IPC分类号： H01L33/50 , H01L33/58 , H01L27/15
CPC分类号： H01L33/504 , F21K9/237 , F21K9/64 , F21V29/89 , F21Y2101/00 , F21Y2105/10 , F21Y2115/10 , G02B5/283 , H01L25/0753 , H01L27/15 , H01L33/0004 , H01L33/46 , H01L33/50 , H01L33/507 , H01L33/58 , H01L33/60 , H01L2924/0002 , H05B33/0857 , H01L2924/00
摘要： Disclosed is a light-emitting element for high-current drive. The light-emitting element comprises: a light-emitting diode chip which emits ultraviolet light; and a wavelength conversion layer which converts the wavelength of the ultraviolet light emitted from the light-emitting diode chip into visible light. The light-emitting diode chip is driven at a current density of at least 150 A/cm2.
摘要翻译：公开了一种用于高电流驱动的发光元件。发光元件包括：发射紫外光的发光二极管芯片; 以及波长转换层，其将从发光二极管芯片发射的紫外光的波长转换成可见光。以至少150A / cm 2的电流密度驱动发光二极管芯片。

6. 发明授权

US08470626B2 Method of fabricating light emitting diode 有权
标题翻译：制造发光二极管的方法
公开(公告)号：US08470626B2
公开(公告)日：2013-06-25
申请号：US13150759
申请日：2011-06-01
申请人： Kwang Joong Kim , Chang Suk Han , Seung Kyu Choi , Ki Bum Nam , Nam Yoon Kim , Kyung Hae Kim , Ju Hyung Yoon
发明人： Kwang Joong Kim , Chang Suk Han , Seung Kyu Choi , Ki Bum Nam , Nam Yoon Kim , Kyung Hae Kim , Ju Hyung Yoon
IPC分类号： H01L21/00
CPC分类号： H01L33/007
摘要： Exemplary embodiments of the present invention relate to a method of fabricating a light emitting diode (LED). According to an exemplary embodiment of the present invention, the method includes growing a first GaN-based semiconductor layer on a substrate at a first temperature by supplying a chamber with a nitride source gas and a first metal source gas, stopping the supply of the first metal source gas and maintaining the first temperature for a first time period after stopping the supply of the first metal source gas, decreasing the temperature of the substrate to the a second temperature after the first time period elapses, growing an active layer of the first GaN-based semiconductor layer at the second temperature by supplying the chamber with a second metal source gas.
摘要翻译：本发明的示例性实施例涉及一种制造发光二极管（LED）的方法。根据本发明的示例性实施例，该方法包括通过向室提供氮化物源气体和第一金属源气体，在第一温度下在衬底上生长第一GaN基半导体层，停止第一金属源气体，并且在停止第一金属源气体的供给之后保持第一温度第一温度，在第一时间段之后将衬底的温度降低到第二温度，生长第一GaN的有源层在第二温度下通过向腔室供应第二金属源气体。

7. 发明授权

US08154008B2 Light emitting diode with improved structure 有权
标题翻译：具有改进结构的发光二极管
公开(公告)号：US08154008B2
公开(公告)日：2012-04-10
申请号：US12178758
申请日：2008-07-24
申请人： Chung Hoon Lee , Ki Bum Nam , Dae Sung Kal
发明人： Chung Hoon Lee , Ki Bum Nam , Dae Sung Kal
IPC分类号： H01L29/06
CPC分类号： H01L33/32 , H01L33/06 , H01L33/16
摘要： A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.
摘要翻译：用于最小化有源区中的晶体缺陷并提高有源区中的电子和空穴的复合效率的发光二极管（LED）包括在非极性衬底上生长的非极性GaN基半导体层。半导体层包括非极性N型半导体层，非极性P型半导体层和位于N型半导体层和P型半导体层之间的非极性有源区。非极性有源区层包括阱层和具有超晶格结构的势垒层。

8. 发明授权

US07994539B2 Light emitting diode having algan buffer layer and method of fabricating the same 有权
标题翻译：具有阴离子缓冲层的发光二极管及其制造方法
公开(公告)号：US07994539B2
公开(公告)日：2011-08-09
申请号：US12571981
申请日：2009-10-01
申请人： Ki Bum Nam
发明人： Ki Bum Nam
IPC分类号： H01L21/02
CPC分类号： H01L33/007 , H01L21/0242 , H01L21/02458 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L33/12
摘要： The present invention relates to a light emitting diode having an AlxGa1−xN buffer layer and a method of fabricating the same, and more particularly, to a light emitting diode having an AlxGa1−xN buffer layer, wherein between a substrate and a GaN-based semiconductor layer, the AlxGa1−xN (0≦x≦1) buffer layer having the composition ratio x of Al decreasing from the substrate to the GaN-based semiconductor layer is interposed to reduce lattice mismatch between the substrate and the GaN-based semiconductor layer, and a method of fabricating the same. To this end, the present invention provides a light emitting diode comprising a substrate; a first conductive semiconductor layer positioned on the substrate; and an AlxGa1−xN (0≦x≦1) buffer layer interposed between the substrate and the first conductive semiconductor layer and having a composition ratio x of Al decreasing from the substrate to the first conductive semiconductor layer.
摘要翻译：本发明涉及具有Al x Ga 1-x N缓冲层的发光二极管及其制造方法，更具体地说，涉及具有Al x Ga 1-x N缓冲层的发光二极管，其中在基板和GaN基半导体层插入从衬底到GaN基半导体层的组成比为x的Al的Al x Ga 1-x N（0＆nlE; x＆lt; 1; 1）缓冲层以减小衬底和GaN基半导体层之间的晶格失配，及其制造方法。为此，本发明提供一种包括基板的发光二极管; 位于所述基板上的第一导电半导体层; 以及插入在所述基板和所述第一导电半导体层之间并且从所述基板向所述第一导电半导体层的组成比x为Al的Al x Ga 1-x N（0和n 1; x 1; n 1; 1）缓冲层。

9. 发明授权

US07772588B1 Light emitting device with improved internal quantum efficiency 有权
标题翻译：具有提高的内部量子效率的发光器件
公开(公告)号：US07772588B1
公开(公告)日：2010-08-10
申请号：US12616610
申请日：2009-11-11
申请人： Chung Hoon Lee , Dae Won Kim , Dae Sung Kal , Ki Bum Nam
发明人： Chung Hoon Lee , Dae Won Kim , Dae Sung Kal , Ki Bum Nam
IPC分类号： H01L33/00
CPC分类号： H01S5/34333 , B82Y20/00 , H01L33/06 , H01L33/32 , H01S5/1053 , H01S5/341 , H01S5/3412
摘要： A light emitting device can be used for light emitting diodes and laser diodes. The light emitting device includes a substrate, a first semiconductor layer on the substrate, a second semiconductor layer on the first semiconductor layer, and a multi-quantum well structure including at least one well layer and at least one barrier layer between the first and second semiconductor layers. A carrier trap portion is formed in at least one layer within the multi-quantum well structure. The at least one carrier trap portion is distributed at a higher density than a dislocation density of the layer including the carrier trap portion, and the carrier trap portion has a size of 1˜10 nm.
摘要翻译：发光器件可用于发光二极管和激光二极管。发光器件包括衬底，衬底上的第一半导体层，第一半导体层上的第二半导体层，以及多量子阱结构，其包括至少一个阱层和在第一和第二阱之间的至少一个势垒层半导体层。载流子捕获部分形成在多量子阱结构内的至少一层中。所述至少一个载流子捕获部以比包含所述载流子捕获部的层的位错密度高的密度分布，所述载流子捕获部的尺寸为1〜10nm。

10. 发明授权

US07682953B2 Method of forming p-type compound semiconductor layer 有权
标题翻译：形成p型化合物半导体层的方法
公开(公告)号：US07682953B2
公开(公告)日：2010-03-23
申请号：US12090305
申请日：2007-06-29
申请人： Ki Bum Nam , Hwa Mok Kim , James S. Speck
发明人： Ki Bum Nam , Hwa Mok Kim , James S. Speck
IPC分类号： H01L21/00
CPC分类号： H01L33/007 , H01L21/0254 , H01L21/02579 , H01L21/0262
摘要： A method of forming a p-type compound semiconductor layer includes increasing a temperature of a substrate loaded into a reaction chamber to a first temperature. A source gas of a Group III element, a source gas of a p-type impurity, and a source gas of nitrogen containing hydrogen are supplied into the reaction chamber to grow the p-type compound semiconductor layer. Then, the supply of the source gas of the Group III element and the source gas of the p-type impurity is stopped and the temperature of the substrate is lowered to a second temperature. The supply of the source gas of nitrogen containing hydrogen is stopped and drawn out at the second temperature, and the temperature of the substrate is lowered to room temperature using a cooling gas. Accordingly, hydrogen is prevented from bonding to the p-type impurity in the p-type compound semiconductor layer.
摘要翻译：形成p型化合物半导体层的方法包括将装载到反应室中的基板的温度升高到第一温度。将III族元素的源气体，p型杂质的源气体和含氮气的源气体供给到反应室中以使p型化合物半导体层生长。然后，停止供给III族元素的源气体和p型杂质的源气体，并将基板的温度降低到第二温度。供给含氮氢气的源气体在第二温度下停止并排出，并且使用冷却气体将基板的温度降至室温。因此，防止氢与p型化合物半导体层中的p型杂质结合。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式