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1. 发明授权

US09059744B2 Encoding a data word for writing the encoded data word in a multi-level solid state memory 有权
标题翻译：编码用于将编码数据字写入多级固态存储器的数据字
公开(公告)号：US09059744B2
公开(公告)日：2015-06-16
申请号：US13596351
申请日：2012-08-28
申请人： Thomas Mittelholzer , Nikolaos Papandreou , Charalampos Pozidis
发明人： Thomas Mittelholzer , Nikolaos Papandreou , Charalampos Pozidis
IPC分类号： G11C29/00 , H03M13/25 , H03M13/29 , H03M13/31 , H03M13/35 , G11C11/56 , G06F11/10 , H03M13/15 , H03M13/19
CPC分类号： H03M13/251 , G06F11/1072 , G11C11/5678 , G11C29/00 , G11C29/70 , G11C2211/5641 , H03M13/1515 , H03M13/19 , H03M13/253 , H03M13/2906 , H03M13/31 , H03M13/353
摘要： A method for encoding a data word for writing an encoded data word in N cells of a solid state memory. Each of the N cells can be programmed in one of q nominal levels. The method includes encoding the data word as a codeword of a first codeword type having q symbol values or as a codeword of a second codeword type having (q−d) symbol values, dε[1, . . . , q−1], depending on a state of the N cells.
摘要翻译：一种编码用于在固态存储器的N个单元中写入编码数据字的数据字的方法。 N个单元中的每一个可以以q个标称电平中的一个编程。该方法包括将数据字编码为具有q个符号值的第一码字类型的码字，或者作为具有（q-d）符号值的第二码字类型的码字，d＆egr [ 。。，q-1]，取决于N细胞的状态。

2. 发明申请

US20150085591A1 ESTIMATION OF LEVEL-THRESHOLDS FOR MEMORY CELLS 有权
标题翻译：记忆细胞水平阈值的估计
公开(公告)号：US20150085591A1
公开(公告)日：2015-03-26
申请号：US14489983
申请日：2014-09-18
申请人： Thomans Mittelholzer , Nikolaos Papandreou , Haris Pozidis
发明人： Thomans Mittelholzer , Nikolaos Papandreou , Haris Pozidis
IPC分类号： G11C29/02
CPC分类号： G11C29/021 , G11C7/1006 , G11C7/14 , G11C11/5678 , G11C13/004 , G11C29/028
摘要： Methods and apparatus are provided for determining level-thresholds for q-level memory cells. A plurality of the memory cells are read to obtain respective read signal components. The read signal components are processed in dependence on signal level to produce a signal level vector, comprising a series of elements, indicative of the distribution of read signal components in order of signal level. The signal level vector is scanned with a sliding window of length greater than the spacing of successive window positions in the scan. At each window position, a metric Mi is calculated in dependence on the elements of the signal level vector in the window. A level-threshold for successive memory cell levels is then determined in dependence on variation of the metric over the scan.
摘要翻译：提供了用于确定q级存储器单元的电平阈值的方法和装置。读取多个存储器单元以获得相应的读取信号分量。根据信号电平对读出的信号分量进行处理以产生信号电平矢量，该信号电平矢量包括指示信号电平顺序的读取信号分量分布的一系列元件。信号电平矢量用长度大于扫描中连续窗口位置的间距的滑动窗扫描。在每个窗口位置，根据窗口中的信号电平矢量的元素来计算度量Mi。然后根据扫描上的度量的变化来确定连续存储器单元级的电平阈值。

3. 发明申请

US20130021845A1 PROGRAMMING AT LEAST ONE MULTI-LEVEL PHASE CHANGE MEMORY CELL 有权
标题翻译：编程至少一个多级相变记忆细胞
公开(公告)号：US20130021845A1
公开(公告)日：2013-01-24
申请号：US13638311
申请日：2011-03-23
申请人： Evangelos S. Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Haris Pozidis , Abu Sebastian
发明人： Evangelos S. Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Haris Pozidis , Abu Sebastian
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/0097 , G11C2013/0078
摘要： A method is provided that comprises a step of programming the PCM cell to have a respective definite cell state by at least one current pulse flowing to the PCM cell, said respective definite cell state being defined at least by a respective definite resistance level, a step of controlling said respective current pulse by a respective bitline pulse and a respective wordline pulse, and a step of controlling said respective bitline pulse and said respective wordline pulse dependent on an actual resistance value of the PCM cell and a respective reference resistance value being defined for the definite resistance level.
摘要翻译：提供了一种方法，其包括通过流向PCM单元的至少一个电流脉冲对PCM单元进行编程以具有相应的确定单元状态的步骤，所述相应的确定单元状态至少由相应的确定电阻水平限定，步骤通过相应的位线脉冲和相应的字线脉冲来控制所述各个电流脉冲，以及根据PCM单元的实际电阻值来控制所述各个位线脉冲和所述各个字线脉冲的步骤，以及相应的参考电阻值被定义为确定阻力位。

4. 发明申请

US20120230081A1 CELL-STATE MEASUREMENT IN RESISTIVE MEMORY 审中-公开
标题翻译：电阻记忆体中的细胞状态测量
公开(公告)号：US20120230081A1
公开(公告)日：2012-09-13
申请号：US13415127
申请日：2012-03-08
申请人： Gael Close , Christoph Hagleitner , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sebastian
发明人： Gael Close , Christoph Hagleitner , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sebastian
IPC分类号： G11C11/00
CPC分类号： G11C5/147 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C13/0061 , G11C2211/5645
摘要： Apparatus and method for measuring the state of a resistive memory cell. A bias voltage controller applies a bias voltage to the cell and controls the level of the bias voltage. A feedback signal generator senses cell current due to the bias voltage and generates a feedback signal (SFB) dependent on the difference between the cell current and a predetermined target current. The bias voltage controller controls the bias voltage level in dependence on the feedback signal (SFB) such that the cell current converges on the target current. An output is provided indicative of the bias voltage level at which the cell current corresponds to the target current, thus providing a voltage-based metric for cell-state.
摘要翻译：用于测量电阻式存储单元的状态的装置和方法。偏置电压控制器向电池施加偏置电压并控制偏置电压的电平。反馈信号发生器由于偏置电压而感测电池电流，并且根据电池电流和预定目标电流之间的差产生反馈信号（SFB）。偏置电压控制器根据反馈信号（SFB）控制偏置电压电平，使得电池电流收敛于目标电流。提供指示电池电流对应于目标电流的偏置电压电平的输出，从而为电池状态提供基于电压的度量。

5. 发明申请

US20110296274A1 DATA ENCODING IN SOLID-STATE STORAGE DEVICES 有权
标题翻译：固态存储设备中的数据编码
公开(公告)号：US20110296274A1
公开(公告)日：2011-12-01
申请号：US13097402
申请日：2011-04-29
申请人： Thomas Mittelholzer , Nikolaos Papandreou , Charalampos Pozidis
发明人： Thomas Mittelholzer , Nikolaos Papandreou , Charalampos Pozidis
IPC分类号： G06F11/10
CPC分类号： G06F11/1072
摘要： Methods and apparatus are provided for recording input data in q-level cells of solid-state memory (2), where q>2. Input data words are encoded as respective codewords, each having a plurality of symbols. The coding scheme is such that each symbol can take one of q values corresponding to respective predetermined levels of the q-level cells, and each of the possible input data words is encoded as a codeword with a unique sequence of relative symbol values. The symbols of each codeword are then recorded in respective cells of the solid-state memory by setting each cell to the level corresponding to the recorded symbol value. Input data is thus effectively encoded in the relative positions of cell levels, providing resistance to certain effects of drift noise.
摘要翻译：提供方法和装置用于在q> 2的固态存储器（2）的q级单元中记录输入数据。输入数据字被编码为各自具有多个符号的码字。编码方案使得每个符号可以采用与q级单元的各个预定级别相对应的q个值中的一个，并且每个可能的输入数据字被编码为具有唯一的相对符号值序列的码字。然后通过将每个单元设置为与记录的符号值对应的电平，将每个码字的符号记录在固态存储器的相应单元中。因此，输入数据被有效地编码在单元电平的相对位置，提供对漂移噪声的某些影响的抵抗。

6. 发明申请

US20110069539A1 PROGRAMMING MULTI-LEVEL PHASE CHANGE MEMORY CELLS 失效
标题翻译：编程多级相变记忆细胞
公开(公告)号：US20110069539A1
公开(公告)日：2011-03-24
申请号：US12887850
申请日：2010-09-22
申请人： Evangelos S. Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sabastian
发明人： Evangelos S. Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sabastian
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/0064 , G11C2013/0054 , G11C2013/0092
摘要： A method and a feedback controller for programming at least one multi-level phase-change memory cell with a programming signal. The method and feedback controller include a sequence of write pulses applied to the multi-level phase change memory cell, wherein the feedback controller adjusts in real time at least one parameter of each write pulse as a function of a determined resistance error of the phase-change memory cell with respect to a desired reference resistance level.
摘要翻译：一种用于使用编程信号来编程至少一个多电平相变存储器单元的方法和反馈控制器。方法和反馈控制器包括施加到多电平相变存储器单元的写入脉冲序列，其中反馈控制器实时调整每个写入脉冲的至少一个参数作为所确定的相位阻抗误差的函数，相对于期望的参考电阻电平改变存储器单元。

7. 发明授权

US09064571B2 Programming at least one multi-level phase change memory cell 有权
标题翻译：编程至少一个多级相变存储单元
公开(公告)号：US09064571B2
公开(公告)日：2015-06-23
申请号：US13638311
申请日：2011-03-23
申请人： Evangelos S. Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Haris Pozidis , Abu Sebastian
发明人： Evangelos S. Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Haris Pozidis , Abu Sebastian
IPC分类号： G11C11/00 , G11C13/00 , G11C11/56
CPC分类号： G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/0097 , G11C2013/0078
摘要： A method is provided that comprises a step of programming the PCM cell to have a respective definite cell state by at least one current pulse flowing to the PCM cell, said respective definite cell state being defined at least by a respective definite resistance level, a step of controlling said respective current pulse by a respective bitline pulse and a respective wordline pulse, and a step of controlling said respective bitline pulse and said respective wordline pulse dependent on an actual resistance value of the PCM cell and a respective reference resistance value being defined for the definite resistance level.
摘要翻译：提供了一种方法，其包括通过流向PCM单元的至少一个电流脉冲对PCM单元进行编程以具有相应的确定单元状态的步骤，所述相应的确定单元状态至少由相应的确定电阻水平限定，步骤通过相应的位线脉冲和相应的字线脉冲来控制所述各个电流脉冲，以及根据PCM单元的实际电阻值来控制所述各个位线脉冲和所述各个字线脉冲的步骤，以及相应的参考电阻值被定义为确定阻力位。

8. 发明授权

US08839076B2 Encoding a data word for writing the encoded data word in a multi-level solid state memory 有权
标题翻译：编码用于将编码数据字写入多级固态存储器的数据字
公开(公告)号：US08839076B2
公开(公告)日：2014-09-16
申请号：US13418423
申请日：2012-03-13
申请人： Thomas Mittelholzer , Nikolaos Papandreou , Charalampos Pozidis
发明人： Thomas Mittelholzer , Nikolaos Papandreou , Charalampos Pozidis
IPC分类号： G11C29/00 , H03M13/25 , H03M13/29 , H03M13/31 , H03M13/35 , G06F11/10 , H03M13/15 , H03M13/19
CPC分类号： H03M13/251 , G06F11/1072 , G11C11/5678 , G11C29/00 , G11C29/70 , G11C2211/5641 , H03M13/1515 , H03M13/19 , H03M13/253 , H03M13/2906 , H03M13/31 , H03M13/353
摘要： A method for encoding a data word for writing an encoded data word in N cells of a solid state memory. Each of the N cells can be programmed in one of q nominal levels. The method includes encoding the data word as a codeword of a first codeword type having q symbol values or as a codeword of a second codeword type having (q-d) symbol values, d ε [1, . . . , q−1], depending on a state of the N cells.
摘要翻译：一种编码用于在固态存储器的N个单元中写入编码数据字的数据字的方法。 N个单元中的每一个可以以q个标称电平中的一个编程。该方法包括将数据字编码为具有q个符号值的第一码字类型的码字或具有（q-d）符号值的第二码字类型的码字，d' [1，。。。，q-1]，取决于N细胞的状态。

9. 发明授权

US08755214B2 Determining cell-state in phase-change memory 有权
公开(公告)号：US08755214B2
公开(公告)日：2014-06-17
申请号：US13415012
申请日：2012-03-08
申请人： Urs Frey , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sebastian
发明人： Urs Frey , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sebastian
IPC分类号： G11C13/00
CPC分类号： G11C13/0004 , G11C11/5678 , G11C13/004 , G11C13/0061 , G11C13/0069 , G11C27/005 , G11C2013/005
摘要： A method, an apparatus, and a device for determining the state of a phase-change memory cell. The method includes the steps of: biasing a cell with a time-varying read voltage (Vread); making a measurement (TM) that satisfies a predetermined condition where the predetermined condition depends on a cell current when the read voltage is applied; and determining a state of the cell based on the measurement.

10. 发明授权

US08441847B2 Programming multi-level phase change memory cells 失效
标题翻译：编程多级相变存储单元
公开(公告)号：US08441847B2
公开(公告)日：2013-05-14
申请号：US12887850
申请日：2010-09-22
申请人： Evangelos S Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sabastian
发明人： Evangelos S Eleftheriou , Angeliki Pantazi , Nikolaos Papandreou , Charalampos Pozidis , Abu Sabastian
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/0064 , G11C2013/0054 , G11C2013/0092
摘要： A method and a feedback controller for programming at least one multi-level phase-change memory cell with a programming signal. The method and feedback controller include a sequence of write pulses applied to the multi-level phase change memory cell, wherein the feedback controller adjusts in real time at least one parameter of each write pulse as a function of a determined resistance error of the phase-change memory cell with respect to a desired reference resistance level.
摘要翻译：一种用于使用编程信号来编程至少一个多电平相变存储器单元的方法和反馈控制器。方法和反馈控制器包括施加到多电平相变存储器单元的写入脉冲序列，其中反馈控制器实时调整每个写入脉冲的至少一个参数作为所确定的相位阻抗误差的函数，相对于期望的参考电阻电平改变存储器单元。

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