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1. 发明申请

US20150294705A1 ELECTRONIC DEVICE 有权
标题翻译：电子设备
公开(公告)号：US20150294705A1
公开(公告)日：2015-10-15
申请号：US14563690
申请日：2014-12-08
申请人： Ji-Wang LEE , Dong-Keun KIM , Masahiro TAKAHASHI , Tsuneo INABA
发明人： Ji-Wang LEE , Dong-Keun KIM , Masahiro TAKAHASHI , Tsuneo INABA
IPC分类号： G11C11/16 , G11C13/00
CPC分类号： G11C11/1673 , G11C11/15 , G11C11/16 , G11C11/1659 , G11C11/5607 , G11C11/5657 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C16/28 , G11C2013/0054 , G11C2213/79
摘要： A semiconductor memory unit includes first to Nth variable resistance elements each having different resistance values according to values stored therein, wherein N is a natural number equal to or greater than 2; a reference resistance element having a first reference resistance value; and first to Nth comparison units which correspond to the first to Nth variable resistance elements, respectively, and each of which determines whether a resistance value of the corresponding variable resistance element is greater or less than a second reference resistance value, wherein the first to Nth comparison units are commonly coupled to the reference resistance element.
摘要翻译：半导体存储单元包括根据存储在其中的值具有不同电阻值的第一至第N可变电阻元件，其中N是等于或大于2的自然数; 具有第一参考电阻值的参考电阻元件; 以及分别对应于第一至第N可变电阻元件的第一至第N比较单元，并且每个比较单元确定相应的可变电阻元件的电阻值是否大于或小于第二参考电阻值，其中第一至第N 比较单元通常耦合到参考电阻元件。

2. 发明授权

US08097903B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US08097903B2
公开(公告)日：2012-01-17
申请号：US12402758
申请日：2009-03-12
申请人： Tsuneo Inaba , Hideo Mukai
发明人： Tsuneo Inaba , Hideo Mukai
IPC分类号： H01L29/04
CPC分类号： H01L27/101 , G11C13/00 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C2213/31 , G11C2213/71 , H01L27/0688 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/147
摘要： A semiconductor memory device comprises a semiconductor substrate; a memory block formed on the semiconductor substrate and including plural stacked cell array layers of cell arrays each comprising a plurality of first lines, a plurality of second lines crossing the plurality of first lines, and memory cells connected at intersections of the first and second lines between both lines; and a plurality of contacts extending in the stack direction of the cell array layers and connecting the first lines in the cell arrays with diffusion regions formed on the semiconductor substrate. A certain one of the cell array layers is smaller in the number of the first lines divided and the number of contacts connected than the cell array layers in a lower layer located closer to the semiconductor substrate than the certain one.
摘要翻译：半导体存储器件包括半导体衬底; 存储块，其形成在所述半导体基板上，并且包括多个单元阵列层叠单元阵列层，每个单元阵列层包括多条第一线，与所述多条第一线交叉的多条第二线，以及连接在所述第一线与第二线的交点处的存储单元两条线之间以及在单元阵列层的堆叠方向上延伸的多个触点，并且将形成在半导体基板上的扩散区域连接在单元阵列中的第一线。单元阵列层中的某一个在分隔的第一线数目和连接的半导体衬底的下层中的单元阵列层的数量比特定的数量小。

3. 发明申请

US20100103718A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20100103718A1
公开(公告)日：2010-04-29
申请号：US12559335
申请日：2009-09-14
申请人： Yoshiaki ASAO , Takeshi KAJIYAMA , Tsuneo INABA
发明人： Yoshiaki ASAO , Takeshi KAJIYAMA , Tsuneo INABA
IPC分类号： G11C11/00 , G11C5/06 , G11C11/14
CPC分类号： G11C11/1659
摘要： A semiconductor memory device includes first and second bit line provided in the same level layer above a semiconductor substrate, a first variable-resistance element disposed under the first bit line, having one terminal connected to one end of a current path of a first MOSFET, a second variable-resistance element disposed under the second bit line, and having one terminal connected to one end of a current path of a second MOSFET, a first interconnect layer connecting the first bit line to the other terminal of the first variable-resistance element, and connecting the first bit line to the other end of the current path of the second MOSFET, and a second interconnect layer connecting the second bit line to the other terminal of the second variable-resistance element, and connecting the second bit line to the other end of the current path of the first MOSFET.
摘要翻译：半导体存储器件包括设置在半导体衬底上的同一电平层中的第一和第二位线，设置在第一位线下方的第一可变电阻元件，其一端连接到第一MOSFET的电流通路的一端，第二可变电阻元件，设置在第二位线下方，并且具有连接到第二MOSFET的电流通路的一端的一个端子，将第一位线连接到第一可变电阻元件的另一端子的第一互连层并且将第一位线连接到第二MOSFET的电流路径的另一端，以及将第二位线连接到第二可变电阻元件的另一端的第二互连层，并将第二位线连接到第二位线第一个MOSFET的电流通路的另一端。

4. 发明申请

US20100008125A1 SEMICONDUCTOR MEMORY DEVICE AND REDUNDANCY METHOD THEREFOR 有权
标题翻译：半导体存储器件及其冗余方法
公开(公告)号：US20100008125A1
公开(公告)日：2010-01-14
申请号：US12414083
申请日：2009-03-30
申请人： Tsuneo INABA
发明人： Tsuneo INABA
IPC分类号： G11C11/00 , G11C29/00
CPC分类号： G11C5/02 , G11C13/00 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C29/025 , G11C2213/71 , G11C2213/72
摘要： A memory cell array is formed by arranging memory cells at intersections of plural first wirings and plural second wirings, and a rectifying element and a variable resistive element are connected in series in the memory cell. The variable resistive element has at least a first resistance value and a second resistance value that is higher than the first resistance value. The control circuit selectively drives the first wirings and the second wirings. The control circuit can perform a short-circuit failure countermeasure program operation. In the short-circuit failure countermeasure program operation, the variable resistive element of the memory cell whose rectifying element is in a short-circuit failure state is programmed from the first resistance value to the second resistance value.
摘要翻译：存储单元阵列通过在多个第一布线和多个第二布线的交叉处布置存储单元而形成，并且整流元件和可变电阻元件串联连接在存储单元中。可变电阻元件具有比第一电阻值高的至少第一电阻值和第二电阻值。控制电路选择性地驱动第一布线和第二布线。控制电路可以执行短路故障对策程序操作。在短路故障对策编程动作中，将整流元件处于短路故障状态的存储单元的可变电阻元件从第一电阻值编程为第二电阻值。

5. 发明授权

US07629637B2 Magnetic random access memory and write method thereof 失效
标题翻译：磁性随机存取存储器及其写入方法
公开(公告)号：US07629637B2
公开(公告)日：2009-12-08
申请号：US12037359
申请日：2008-02-26
申请人： Takeshi Kajiyama , Tsuneo Inaba
发明人： Takeshi Kajiyama , Tsuneo Inaba
IPC分类号： H01L29/94
CPC分类号： G11C11/5607 , B82Y25/00 , G11C11/16 , H01L27/11517 , H01L27/228
摘要： A magnetic random access memory includes first and second bit lines extending in a first direction, the second bit line being adjacent to the first bit line in a second direction, a first magnetoresistive effect element being connected to the first bit line and having a first fixed layer, a first recording layer, and a first nonmagnetic layer, and a second magnetoresistive effect element being adjacent to the first magnetoresistive effect element in the second direction and being connected to the second bit line and having a second fixed layer, a second recording layer, and a second nonmagnetic layer, the first and second recording layers being formed by a same first layer extending in the second direction.
摘要翻译：磁性随机存取存储器包括沿第一方向延伸的第一和第二位线，第二位线在第二方向上与第一位线相邻，第一磁阻效应元件连接到第一位线并具有第一固定层，第一记录层和第一非磁性层，以及第二磁阻效应元件，其在第二方向上与第一磁阻效应元件相邻并且连接到第二位线并具有第二固定层，第二记录层和第二非磁性层，所述第一和第二记录层由沿所述第二方向延伸的相同的第一层形成。

6. 发明申请

US20090109728A1 RESISTANCE CHANGE MEMORY DEVICE 有权
标题翻译：电阻变化存储器件
公开(公告)号：US20090109728A1
公开(公告)日：2009-04-30
申请号：US12252675
申请日：2008-10-16
申请人： Hiroshi MAEJIMA , Katsuaki Isobe , Naoya Tokiwa , Satoru Takase , Yasuyuki Fukuda , Hideo Mukai , Tsuneo Inaba
发明人： Hiroshi MAEJIMA , Katsuaki Isobe , Naoya Tokiwa , Satoru Takase , Yasuyuki Fukuda , Hideo Mukai , Tsuneo Inaba
IPC分类号： G11C11/00 , G11C11/416
CPC分类号： G11C13/0009 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/004 , G11C13/0064 , G11C13/0069 , G11C2211/5642 , G11C2213/11 , G11C2213/34 , G11C2213/56 , G11C2213/72
摘要： A resistance change memory device including memory cells arranged, the memory cell having a stable state with a high resistance value and storing in a non-volatile manner such multi-level data that at least three resistance values, R0, R1 and R2 (R0 ΔR2.
摘要翻译：一种包括存储单元的电阻变化存储器件，所述存储器单元具有具有高电阻值的稳定状态并且以非易失性方式存储这样的多电平数据：至少三个电阻值R0，R1和R2（R0 < R1 DeltaR2的关系。

7. 发明授权

US07359234B2 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US07359234B2
公开(公告)日：2008-04-15
申请号：US11384501
申请日：2006-03-21
申请人： Tsuneo Inaba
发明人： Tsuneo Inaba
IPC分类号： G11C7/00
CPC分类号： G11C11/16 , G11C5/063 , G11C11/15 , G11C29/72 , G11C29/816
摘要： A semiconductor memory device includes a plurality of memory cells using a current flowing through a wiring. A plurality of first write lines are electrically or magnetically or electrically and magnetically connected to the memory cells and provided along a first direction. A first connection line electrically connects at least two of the first write lines each other.
摘要翻译：半导体存储器件包括使用流过布线的电流的多个存储单元。多个第一写入线被电或磁或电或磁连接到存储器单元并沿第一方向提供。第一连接线将至少两条第一写入线彼此电连接。

8. 发明授权

US07269060B2 Magnetic random access memory 有权
公开(公告)号：US07269060B2
公开(公告)日：2007-09-11
申请号：US11298597
申请日：2005-12-12
申请人： Ryousuke Takizawa , Kenji Tsuchida , Tsuneo Inaba
发明人： Ryousuke Takizawa , Kenji Tsuchida , Tsuneo Inaba
IPC分类号： G11C11/00
CPC分类号： G11C11/15
摘要： A magnetic random access memory includes first write lines separated from one another and extending along a first direction. Second write lines extend in a direction different from the first direction. The MTJ elements are provided between the first write lines and the second write lines. Connection lines connect the first write lines. Sinkers are connected to ends of the first write lines and to the first write lines at between the connection lines and extract currents from the first write lines. Drivers are connected to ends of the first write lines and supply currents to the first write lines.

9. 发明申请

US20070206406A1 SPIN INJECTION WRITE TYPE MAGNETIC MEMORY DEVICE 有权
标题翻译：旋转注射式磁性记忆装置
公开(公告)号：US20070206406A1
公开(公告)日：2007-09-06
申请号：US11673241
申请日：2007-02-09
申请人： Yoshihiro Ueda , Kenji Tsuchida , Tsuneo Inaba , Kiyotaro Itagaki
发明人： Yoshihiro Ueda , Kenji Tsuchida , Tsuneo Inaba , Kiyotaro Itagaki
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , Y10S977/935
摘要： A spin injection write type magnetic memory device includes memory cells which have a magnetoresistance effect element and a select transistor. The magnetoresistance effect element has one end connected to a first node. The select transistor has a first diffusion area connected to another end of the magnetoresistance effect element and a second diffusion area connected to a second node. A select line extends along a first direction and is connected to a gate electrode of the select transistor. A first interconnect extends along a second direction and is connected to the first node. A second interconnect extends along the second direction and is connected to the second node. Two of the memory cells adjacent along the first direction share the first node. Two of the memory cells adjacent along the second direction share the second node.
摘要翻译：自旋注入写入型磁存储器件包括具有磁阻效应元件和选择晶体管的存储单元。磁阻效应元件的一端连接到第一节点。选择晶体管具有连接到磁阻效应元件的另一端的第一扩散区域和连接到第二节点的第二扩散区域。选择线沿着第一方向延伸并连接到选择晶体管的栅电极。第一互连沿着第二方向延伸并连接到第一节点。第二互连沿着第二方向延伸并且连接到第二节点。沿着第一方向相邻的两个存储单元共享第一节点。沿着第二方向相邻的两个存储单元共享第二节点。

10. 发明申请

US20070030726A1 Magnetic random access memory 有权
标题翻译：磁性随机存取存储器
公开(公告)号：US20070030726A1
公开(公告)日：2007-02-08
申请号：US11298597
申请日：2005-12-12
申请人： Ryousuke Takizawa , Kenji Tsuchida , Tsuneo Inaba
发明人： Ryousuke Takizawa , Kenji Tsuchida , Tsuneo Inaba
IPC分类号： G11C11/14
CPC分类号： G11C11/15
摘要： A magnetic random access memory includes first write lines separated from one another and extending along a first direction. Second write lines extend in a direction different from the first direction. The MTJ elements are provided between the first write lines and the second write lines. Connection lines connect the first write lines. Sinkers are connected to ends of the first write lines and to the first write lines at between the connection lines and extract currents from the first write lines. Drivers are connected to ends of the first write lines and supply currents to the first write lines.
摘要翻译：磁性随机存取存储器包括彼此分离并沿着第一方向延伸的第一写入线。第二写入线沿与第一方向不同的方向延伸。 MTJ元件设置在第一写入线和第二写入线之间。连接线连接第一条写入线。下沉器连接到第一写入线的端部和连接线之间的第一写入线，并从第一写入线提取电流。驱动器连接到第一写入线的端部并且将电流提供给第一写入线。

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