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1. 发明授权

US07919760B2 Operation stage for wafer edge inspection and review 失效
标题翻译：晶圆边缘检查和检查的操作阶段
公开(公告)号：US07919760B2
公开(公告)日：2011-04-05
申请号：US12331336
申请日：2008-12-09
申请人： Jack Jau , Hong Xiao , Joe Wang , Zhongwei Chen , Yi Xiang Wang , Edward Tseng
发明人： Jack Jau , Hong Xiao , Joe Wang , Zhongwei Chen , Yi Xiang Wang , Edward Tseng
IPC分类号： G21K5/10
CPC分类号： H01J37/28 , H01J37/20 , H01J2237/202 , H01J2237/2817 , H01L21/67288 , H01L21/6831
摘要： The present invention relates to an operation stage of a charged particle beam apparatus which is employed in a scanning electron microscope for substrate (wafer) edge and backside defect inspection or defect review. However, it would be recognized that the invention has a much broader range of applicability. A system and method in accordance with the present invention provides an operation stage for substrate edge inspection or review. The inspection region includes top near edge, to bevel, apex, and bottom bevel. The operation stage includes a supporting stand, a z-stage, an X-Y stage, an electrostatic chuck, a pendulum stage and a rotation track. The pendulum stage mount with the electrostatic chuck has the ability to swing from 0° to 180° while performing substrate top bevel, apex and bottom bevel inspection or review. In order to keep the substrate in focus and avoid a large position shift during altering the substrate observation angle by rotation the pendulum stage, one embodiment of the present invention discloses a method such that the rotation axis of the pendulum stage consist of the tangent of upper edge of the substrate to be inspected. The electrostatic chuck of the present invention has a diameter smaller than which of the substrate to be inspected. During the inspection process the substrate on the electrostatic chuck may be rotated about the central axis on the electrostatic chuck to a desired position, this design insures all position on the bevel and apex are able to be inspected.
摘要翻译：本发明涉及用于基板（晶片）边缘和背面缺陷检查或缺陷检查的扫描电子显微镜中的带电粒子束装置的操作阶段。然而，应当认识到，本发明具有更广泛的应用范围。根据本发明的系统和方法提供了用于衬底边缘检查或审查的操作阶段。检查区域包括顶部近边缘，斜面，顶点和底部斜面。操作台包括支撑台，z台，X-Y台，静电卡盘，摆台和旋转轨道。具有静电卡盘的摆台安装具有从0°摆动到180°的能力，同时执行基板顶部斜面，顶部和底部斜面检查或检查。为了将基板保持在对焦状态，并且通过旋转摆锤台来改变基板观察角度而避免大的位置偏移，本发明的一个实施例公开了一种方法，使得摆台的旋转轴线由上部的切线要检查的基板的边缘。本发明的静电卡盘的直径小于要检查的基板的直径。在检查过程中，静电卡盘上的基板可以围绕静电卡盘上的中心轴线旋转到期望的位置，该设计确保能够检查斜面上的所有位置和顶点。

2. 发明授权

US08809779B2 Method and system for heating substrate in vacuum environment and method and system for identifying defects on substrate 有权
标题翻译：在真空环境中加热基材的方法和系统以及用于识别基材上的缺陷的方法和系统
公开(公告)号：US08809779B2
公开(公告)日：2014-08-19
申请号：US12339558
申请日：2008-12-19
申请人： Hong Xiao , Yi-Xiang Wang
发明人： Hong Xiao , Yi-Xiang Wang
IPC分类号： G01N23/00 , G01N23/22 , H05B3/00
CPC分类号： H05B3/0047 , G01N23/2202
摘要： A method for heating a substrate in a vacuum environment and a system therefor is provided. The system includes a chamber capable of holding the substrate located in the vacuum environment and a light source capable of projecting a light beam only on a portion of the substrate. The method includes the following steps. First, the substrate is placed in the vacuumed chamber. Thereafter, the light beam emitted from the light source is projected on the portion of the substrate, such that the portion is significantly heated before whole the substrate is heated. When the light beam is a charged particle beam projected by a charged particle beam assembly and projected on defects located on the substrate, the defects are capable of being identified by an examination result provided by an examination assembly after termination of light beam projection.
摘要翻译：提供一种在真空环境中加热基板的方法及其系统。该系统包括能够保持位于真空环境中的衬底的腔室和能够仅将光束投射到衬底的一部分上的光源。该方法包括以下步骤。首先，将基板放置在真空室中。此后，从光源发射的光束被投射在基板的部分上，使得该部分在整个基板被加热之前被显着地加热。当光束是由带电粒子束组件投射并投影在基板上的缺陷上的带电粒子束时，能够通过在光束投影终止之后由检查组件提供的检查结果来识别缺陷。

3. 发明申请

US20100278416A1 Method for Inspecting Overlay Shift Defect during Semiconductor Manufacturing and Apparatus Thereof 有权
标题翻译：半导体制造过程中检查覆盖偏移缺陷的方法及其设备
公开(公告)号：US20100278416A1
公开(公告)日：2010-11-04
申请号：US12433762
申请日：2009-04-30
申请人： Hong Xiao , Wei Fang , Jack Jau
发明人： Hong Xiao , Wei Fang , Jack Jau
IPC分类号： G06K9/00 , G01N23/00
CPC分类号： H01L21/67242 , G03F7/70633
摘要： A method of inspecting for overlay shift defects during semiconductor manufacturing is disclosed. The method can include the steps of providing a charged particle microscopic image of a sample, identifying an inspection pattern period in the charged particle microscopic image, averaging the charged particle microscopic image by using the inspection pattern period to form an averaged inspection pattern period, estimating an average width from the averaged inspection pattern period, and comparing the average width with a predefined threshold value to determine the presence of an overlay shift defect.
摘要翻译：公开了一种在半导体制造期间检查覆盖偏移缺陷的方法。该方法可以包括以下步骤：提供样品的带电粒子显微镜图像，识别带电粒子显微镜图像中的检查图案周期，通过使用检查图案周期平均化带电粒子显微镜图像以形成平均检查图案周期，估计从平均检查图案周期的平均宽度，以及将平均宽度与预定义的阈值进行比较，以确定覆盖位移缺陷的存在。

4. 发明授权

US08923601B2 Method for inspecting overlay shift defect during semiconductor manufacturing and apparatus thereof 有权
标题翻译：在半导体制造期间检查重叠移位缺陷的方法及其装置
公开(公告)号：US08923601B2
公开(公告)日：2014-12-30
申请号：US13240721
申请日：2011-09-22
申请人： Wei Fang , Hong Xiao , Jack Jau
发明人： Wei Fang , Hong Xiao , Jack Jau
IPC分类号： G06K9/00 , G01N23/00 , G03F7/20
CPC分类号： G03F7/70633
摘要： A method for inspecting overlay shift defect during semiconductor manufacturing is disclosed herein and includes a step for providing a charged particle microscopic image of a sample, a step for identifying an inspection pattern measure in the charged particle microscopic image, a step for averaging the charged particle microscopic image by using the inspection pattern measure to form an averaged inspection pattern measure, a step for estimating an average width from the averaged inspection pattern measure, and a step for comparing the average width with a predefined threshold value to determine the presence of the overlay shift defect.
摘要翻译：本文公开了一种用于在半导体制造期间检查覆盖偏移缺陷的方法，并且包括用于提供样品的带电粒子显微镜图像的步骤，用于识别带电粒子显微镜图像中的检查图案测量的步骤，用于使带电粒子平均的步骤通过使用检查图案测量形成平均检查图案测量的微观图像，从平均检查图案度量估计平均宽度的步骤，以及将平均宽度与预定阈值进行比较以确定覆盖层的存在的步骤移位缺陷。

5. 发明授权

US08432441B2 Method and system for measuring critical dimension and monitoring fabrication uniformity 有权
公开(公告)号：US08432441B2
公开(公告)日：2013-04-30
申请号：US13032105
申请日：2011-02-22
申请人： Wei Fang , Hong Xiao , Jack Jau
发明人： Wei Fang , Hong Xiao , Jack Jau
IPC分类号： H04N7/18
CPC分类号： H04N7/18 , G06T7/0004 , G06T7/001 , G06T2207/10061 , G06T2207/20016 , G06T2207/30148 , H04N7/183
摘要： A method for measuring critical dimension (CD) includes steps of: scanning at least one area of interest of a die to obtain at least one scanned image; aligning the scanned image to at least one designed layout pattern to identify a plurality of borders within the scanned image; and averaging distances each measured from the border or the plurality of borders of a pattern associated with a specific type of CD corresponding to the designed layout pattern to obtain a value of CD of the die. The value of critical dimensions of dies can be obtained from the scanned image with lower resolution which is obtained by relatively higher scanning speed, so the above-mentioned method can obtain value of CD for every die within entire wafer to monitor the uniformity of the semiconductor manufacturing process within an acceptable inspection time.

6. 发明申请

US20080267489A1 METHOD FOR DETERMINING ABNORMAL CHARACTERISTICS IN INTEGRATED CIRCUIT MANUFACTURING PROCESS 审中-公开
标题翻译：确定集成电路制造工艺中异常特性的方法
公开(公告)号：US20080267489A1
公开(公告)日：2008-10-30
申请号：US12109243
申请日：2008-04-24
申请人： Hong Xiao , Jack Jau
发明人： Hong Xiao , Jack Jau
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/10056 , G06T2207/30148
摘要： A method for determining abnormal characteristics in integrated circuit manufacturing process is disclosed. The method comprises obtaining a charged particle microscope image of a sample test structure, wherein the sample including a reference pattern and a test pattern; measuring gray levels of the reference pattern and the test pattern; calculating a standard deviation from a distribution of the gray levels of the reference pattern measured; and determining the abnormal characteristics of the test pattern based on the gray levels measured and the standard deviation.
摘要翻译：公开了一种用于确定集成电路制造工艺中的异常特性的方法。该方法包括获得样品测试结构的带电粒子显微镜图像，其中样品包括参考图案和测试图案; 测量参考图案和测试图案的灰度级; 计算与测量的参考图案的灰度分布的标准偏差; 并基于所测量的灰度级和标准偏差确定测试图案的异常特性。

7. 发明授权

US08089297B2 Structure and method for determining a defect in integrated circuit manufacturing process 有权
标题翻译：用于确定集成电路制造过程中的缺陷的结构和方法
公开(公告)号：US08089297B2
公开(公告)日：2012-01-03
申请号：US12110147
申请日：2008-04-25
申请人： Hong Xiao , Jack Jau , Chang Chun Yeh
发明人： Hong Xiao , Jack Jau , Chang Chun Yeh
IPC分类号： G01R31/02 , G01R31/26
CPC分类号： H01L22/12 , H01L22/24
摘要： The present invention discloses a structure and method for determining a defect in integrated circuit manufacturing process, wherein the structure comprises a plurality of normal active areas formed in a plurality of first arrays and a plurality of defective active areas formed in a plurality of second arrays. The first arrays and second arrays are interlaced, and the defect is determined by monitoring a voltage contrast from a charged particle microscope image of the active areas.
摘要翻译：本发明公开了一种用于确定集成电路制造过程中的缺陷的结构和方法，其中该结构包括形成在多个第一阵列中的多个正常有源区和形成在多个第二阵列中的多个有缺陷的有源区。第一阵列和第二阵列是交错的，并且通过监视来自有源区域的带电粒子显微镜图像的电压对比来确定缺陷。

8. 发明授权

US08050490B2 Method for inspecting overlay shift defect during semiconductor manufacturing and apparatus thereof 有权
标题翻译：在半导体制造期间检查重叠移位缺陷的方法及其装置
公开(公告)号：US08050490B2
公开(公告)日：2011-11-01
申请号：US12433762
申请日：2009-04-30
申请人： Hong Xiao , Wei Fang , Jack Jau
发明人： Hong Xiao , Wei Fang , Jack Jau
IPC分类号： G06K9/00
CPC分类号： H01L21/67242 , G03F7/70633
摘要： A method of inspecting for overlay shift defects during semiconductor manufacturing is disclosed. The method can include the steps of providing a charged particle microscopic image of a sample, identifying an inspection pattern period in the charged particle microscopic image, averaging the charged particle microscopic image by using the inspection pattern period to form an averaged inspection pattern period, estimating an average width from the averaged inspection pattern period, and comparing the average width with a predefined threshold value to determine the presence of an overlay shift defect.
摘要翻译：公开了一种在半导体制造期间检查覆盖偏移缺陷的方法。该方法可以包括以下步骤：提供样品的带电粒子显微镜图像，识别带电粒子显微镜图像中的检查图案周期，通过使用检查图案周期平均化带电粒子显微镜图像以形成平均检查图案周期，估计从平均检查图案周期的平均宽度，以及将平均宽度与预定义的阈值进行比较，以确定覆盖位移缺陷的存在。

9. 发明授权

US09035674B2 Structure and method for determining a defect in integrated circuit manufacturing process 有权
标题翻译：用于确定集成电路制造过程中的缺陷的结构和方法
公开(公告)号：US09035674B2
公开(公告)日：2015-05-19
申请号：US13323634
申请日：2011-12-12
申请人： Hong Xiao , Jack Y. Jau , Chang Chun Yeh
发明人： Hong Xiao , Jack Y. Jau , Chang Chun Yeh
IPC分类号： H01L21/66
CPC分类号： H01L22/12 , H01L22/24
摘要： The present invention discloses a structure and method for determining a defect in integrated circuit manufacturing process, wherein the structure comprises a plurality of normal active areas formed in a plurality of first arrays and a plurality of defective active areas formed in a plurality of second arrays. The first arrays and second arrays are interlaced, and the defect is determined by monitoring a voltage contrast from a charged particle microscope image of the active areas.
摘要翻译：本发明公开了一种用于确定集成电路制造过程中的缺陷的结构和方法，其中该结构包括形成在多个第一阵列中的多个正常有源区和形成在多个第二阵列中的多个有缺陷的有源区。第一阵列和第二阵列是交错的，并且通过监视来自有源区域的带电粒子显微镜图像的电压对比来确定缺陷。

10. 发明授权

US08759762B2 Method and apparatus for identifying plug-to-plug short from a charged particle microscopic image 有权
标题翻译：用于从带电粒子显微镜图像识别插头插头的方法和装置
公开(公告)号：US08759762B2
公开(公告)日：2014-06-24
申请号：US12483220
申请日：2009-06-11
申请人： Hong Xiao , Wei Fang
发明人： Hong Xiao , Wei Fang
IPC分类号： H01J37/26 , H01J37/28 , H01J37/147
CPC分类号： H01J37/26 , H01J37/1474 , H01J37/263 , H01J37/28 , H01L22/12
摘要： A method of inspecting for plug-to-plug short (short circuit) defects on a sample is disclosed. A charged particle beam for imaging the sample is repeatedly line-scanned over the sample with a line-to-line advancement direction perpendicular to the line-scan direction. The method includes scanning the sample with a line-to-line advancement along a first and a second direction, to obtain a first and a second image of the sample, respectively. Then, the method includes identifying plug patterns, represented in the obtained images with abnormal grey levels, as abnormal plug patterns. Next, the method compares the locations of the abnormal plug patterns to determine the presence of plug-to-plug short defects on the sample.
摘要翻译：公开了一种检查样品上插头短插（短路）缺陷的方法。用于对样品进行成像的带电粒子束在垂直于线扫描方向的线对线前进方向上在样品上重复线扫描。该方法包括沿着第一和第二方向以线对线前进扫描样品，以分别获得样品的第一和第二图像。然后，该方法包括将获得的具有异常灰度级的图像表示的插头图案识别为异常插头图案。接下来，该方法比较异常插头图案的位置，以确定样品上插头到插头短缺陷的存在。

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