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1. 发明申请

US20120117374A1 CENTRAL MANAGEMENT COMPUTING SYSTEM 审中-公开
标题翻译：中央管理计算系统
公开(公告)号：US20120117374A1
公开(公告)日：2012-05-10
申请号：US13384034
申请日：2009-10-08
申请人： Won Ok Kwon , Jae Sung Lee , Seong Woon Kim
发明人： Won Ok Kwon , Jae Sung Lee , Seong Woon Kim
IPC分类号： G06F1/26
CPC分类号： G06F3/0227 , G06F1/189 , G06F1/26 , H02J1/00
摘要： Provided is a central management computing system. The central management computing system includes a plurality of terminals, and a rack system. The rack system is connected to the plurality of terminals. The rack system includes a rack power supply unit, a plurality of computers, and a switch. The rack power supply unit is mounted in a rack and converts an AC power into a plurality of DC powers to output to a plurality of DC output ports. The plurality of computers are mounted in the rack and receive the DC powers from the DC output ports. The switch is mounted in the rack and dynamically connects the computers to the terminals, respectively.
摘要翻译：提供了一个中央管理计算系统。中央管理计算系统包括多个终端和机架系统。机架系统连接到多个终端。机架系统包括机架电源单元，多个计算机和开关。机架电源单元安装在机架中，并将AC电力转换成多个DC电力，以输出到多个DC输出端口。多个计算机安装在机架中并从DC输出端口接收直流电力。交换机安装在机架中，并分别动态地将计算机连接到终端。

2. 发明授权

US08166219B2 Method and apparatus for encoding/decoding bus signal 有权
标题翻译：总线信号编码/解码的方法和装置
公开(公告)号：US08166219B2
公开(公告)日：2012-04-24
申请号：US12566496
申请日：2009-09-24
申请人： Jae Sung Lee , Sung Nam Kim , Seong Woon Kim
发明人： Jae Sung Lee , Sung Nam Kim , Seong Woon Kim
IPC分类号： G06F13/38 , H03M9/00
CPC分类号： G06F13/4217 , Y02D10/14 , Y02D10/151
摘要： Provided is a bus signal encoding/decoding method and apparatus. The bus signal encoding method includes receiving a bus signal, XOR-operating all but the first byte sequence of the bus signal in a bitwise manner, inverting the even-numbered byte sequences of the XOR-operated bus signal in a bitwise manner, and serializing the inverted bus signal.
摘要翻译：提供一种总线信号编码/解码方法和装置。总线信号编码方法包括以比特的方式接收总线信号XOR-除了总线信号的第一字节序列以外的所有运算，将按异或运算的总线信号的偶数字节序列按顺序反转，并串行化反向总线信号。

3. 发明授权

US08055823B2 Bus data transmission apparatus, method for transmitting bus data and bus data communication apparatus 失效
标题翻译：总线数据传输装置，总线数据传输方法和总线数据通信装置
公开(公告)号：US08055823B2
公开(公告)日：2011-11-08
申请号：US12541846
申请日：2009-08-14
申请人： Jae Sung Lee , Seong Woon Kim
发明人： Jae Sung Lee , Seong Woon Kim
IPC分类号： G06F13/38
CPC分类号： G06F13/4217 , Y02D10/14 , Y02D10/151
摘要： Provided are a method and an apparatus for compression transmission of bus data including a plurality of bytes including upper bits and lower bits. The apparatus includes a comparator and an aligner. The comparator compares upper bits of a previous byte with upper bits of a current byte among the plurality of bytes. If the upper bits of the previous byte are identical to the upper bits of the current byte, the aligner compresses the bus data in a combination of a full-byte and a half-byte, by allowing the previous byte to be constituted with the full-byte having bits corresponding to the number of bits of the previous byte and allowing the current byte to be constituted with the half-byte excluding the upper bits of the current byte. Then, the aligner arrays the compressed bus data in a preset bus bandwidth to transmit to a slave device.
摘要翻译：提供了一种用于压缩传输包括高位和低位的多个字节的总线数据的方法和装置。该装置包括比较器和对准器。比较器将先前字节的高位与多个字节中的当前字节的高位进行比较。如果前一个字节的高位与当前字节的高位相同，则对齐器以全字节和半字节的组合来压缩总线数据，通过允许前一个字节由完整字节组成字节具有与先前字节的比特数相对应的比特，并允许当前字节由不包括当前字节的高位的半字节构成。然后，对准器将预设总线带宽中的压缩总线数据排列成从属设备。

4. 发明申请

US20100146364A1 METHOD AND APPARATUS FOR ENCODING/DECODING BUS SIGNAL 有权
标题翻译：编码/解码总线信号的方法和装置
公开(公告)号：US20100146364A1
公开(公告)日：2010-06-10
申请号：US12566496
申请日：2009-09-24
申请人： Jae Sung LEE , Sung Nam Kim , Seong Woon Kim
发明人： Jae Sung LEE , Sung Nam Kim , Seong Woon Kim
IPC分类号： H03M13/05 , G06F13/14 , G06F11/10
CPC分类号： G06F13/4217 , Y02D10/14 , Y02D10/151
摘要： Provided is a bus signal encoding/decoding method and apparatus. The bus signal encoding method includes receiving a bus signal, XOR-operating all but the first byte sequence of the bus signal in a bitwise manner, inverting the even-numbered byte sequences of the XOR-operated bus signal in a bitwise manner, and serializing the inverted bus signal.
摘要翻译：提供一种总线信号编码/解码方法和装置。总线信号编码方法包括以比特的方式接收总线信号XOR-除了总线信号的第一字节序列以外的所有运算，将按异或运算的总线信号的偶数字节序列按顺序反转，并串行化反向总线信号。

5. 发明申请

US20100161861A1 BUS DATA TRANSMISSION APPARATUS, METHOD FOR TRANSMITTING BUS DATA AND BUS DATA COMMUNICATION APPARATUS 失效
标题翻译：总线数据传输装置，用于发送总线数据和总线数据通信装置的方法
公开(公告)号：US20100161861A1
公开(公告)日：2010-06-24
申请号：US12541846
申请日：2009-08-14
申请人： Jae Sung Lee , Seong Woon Kim
发明人： Jae Sung Lee , Seong Woon Kim
IPC分类号： G06F13/42 , G06F13/00
CPC分类号： G06F13/4217 , Y02D10/14 , Y02D10/151
摘要： Provided are a method and an apparatus for compression transmission of bus data including a plurality of bytes including upper bits and lower bits. The apparatus includes a comparator and an aligner. The comparator compares upper bits of a previous byte with upper bits of a current byte among the plurality of bytes. If the upper bits of the previous byte are identical to the upper bits of the current byte, the aligner compresses the bus data in a combination of a full-byte and a half-byte, by allowing the previous byte to be constituted with the full-byte having bits corresponding to the number of bits of the previous byte and allowing the current byte to be constituted with the half-byte excluding the upper bits of the current byte. Then, the aligner arrays the compressed bus data in a preset bus bandwidth to transmit to a slave device.
摘要翻译：提供了一种用于压缩传输包括高位和低位的多个字节的总线数据的方法和装置。该装置包括比较器和对准器。比较器将先前字节的高位与多个字节中的当前字节的高位进行比较。如果前一个字节的高位是相同的当前字节的高位，对准器通过允许前一个字节压缩在一个完整的字节和一个半字节的组合的总线数据到与完整构成字节具有对应于前一个字节的比特的数量，并允许当前字节与不包括当前字节的高位的半字节来构成比特。然后，对准器将预设总线带宽中的压缩总线数据排列成从属设备。

6. 发明授权

US09317295B2 Asynchronous pipeline system, stage, and data transfer mechanism 有权
标题翻译：异步管道系统，阶段和数据传输机制
公开(公告)号：US09317295B2
公开(公告)日：2016-04-19
申请号：US13278385
申请日：2011-10-21
申请人： Myeong Hoon Oh , Young Woo Kim , Sung Nam Kim , Seong Woon Kim
发明人： Myeong Hoon Oh , Young Woo Kim , Sung Nam Kim , Seong Woon Kim
IPC分类号： G06F9/38
CPC分类号： G06F9/3871 , G06F9/3869
摘要： Disclosed are an asynchronous pipeline system, a stage, and a data transfer mechanism. The asynchronous pipeline system having a plurality of stages based on a 4-phase protocol, includes: a first stage among the plurality of stages; and a second stage among the plurality of stages connected next to the first stage, wherein the first stage transmits and the second receives bundled data and control data through an always bundled data channel and on-demand data through an on-demand data channel according to need of the second stage.
摘要翻译：公开了异步管线系统，阶段和数据传输机制。具有基于四相协议的多级的异步管线系统包括：多级中的第一级; 以及与第一级相邻的多级中的第二级，其中第一级发送，第二级通过始终捆绑的数据信道和按需数据信道通过按需数据信道来接收捆绑数据和控制数据，根据需要第二阶段

7. 发明授权

US07849214B2 Packet receiving hardware apparatus for TCP offload engine and receiving system and method using the same 失效
标题翻译：用于TCP卸载引擎和接收系统的分组接收硬件设备及使用其的方法
公开(公告)号：US07849214B2
公开(公告)日：2010-12-07
申请号：US11949738
申请日：2007-12-03
申请人： Chan Ho Park , Seong Woon Kim , Myung Joon Kim
发明人： Chan Ho Park , Seong Woon Kim , Myung Joon Kim
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L47/193 , H04L47/2441 , H04L49/90 , H04L49/901 , H04L49/9073 , H04L69/161 , H04L69/163 , H04L69/22
摘要： A hardware apparatus for receiving a packet for a TCP offload engine (TOE), and receiving system and method using the same are provided. Specifically, information required to protocol processing by a processor is stored in the internal queue included in the packet receiving hardware. Data to be stored in a host memory is transmitted to the host memory after the data is stored in an external memory and protocol processing is performed by the processor. With these techniques, it is possible that a processor can operate asynchronously with a receiving time of a practical packet and it is possible to reduce an overhead that processor deals with unnecessary information.
摘要翻译：提供了一种用于接收用于TCP卸载引擎（TOE）的分组的硬件装置，以及使用其的接收系统和方法。具体地，由处理器进行协议处理所需的信息被存储在分组接收硬件中包括的内部队列中。在将数据存储在外部存储器中并且由处理器执行协议处理之后，要存储在主机存储器中的数据被发送到主机存储器。利用这些技术，处理器可以与实际分组的接收时间异步地操作，并且可以减少处理器处理不必要的信息的开销。

8. 发明申请

US20100150572A1 USB Compatible Apparatus for Connecting Between Optical USB Device and Electrical USB Device 有权
标题翻译： USB兼容设备，用于连接光USB设备和电USB设备
公开(公告)号：US20100150572A1
公开(公告)日：2010-06-17
申请号：US12635036
申请日：2009-12-10
申请人： Min Hyuk Lee , Dong Min Im , Hyo Hoon Park , Tae Woo Lee , Mu Hee Cho , Seong Woon Kim
发明人： Min Hyuk Lee , Dong Min Im , Hyo Hoon Park , Tae Woo Lee , Mu Hee Cho , Seong Woon Kim
IPC分类号： H04B10/12
CPC分类号： G06F13/409
摘要： A USB compatible apparatus for connecting an optical universal serial bus (USB) (or an optical serial bus; OSB) device and an electrical USB device, and a structure of the apparatus are provided. More particularly, a USB compatible apparatus for guaranteeing a connection between an optical USB device for inputting/outputting an optical signal and an electrical USB device for inputting/outputting an electrical signal, for example, signal transmission and reception between an electrical USB device (e.g., an electrical USB memory) and an optical USB device (e.g., a computer) having an optical USB port, and a structure of the USB compatible apparatus (a first exemplary embodiment), and a USB compatible apparatus for guaranteeing signal transmission and reception between an optical USB device (e.g., an optical USB memory) and an electrical USB device (e.g., a portable telephone) having an electrical USB port, and a structure of the USB compatible apparatus (a second exemplary embodiment) are provided.
摘要翻译：提供了用于连接光通用串行总线（USB）（或光串行总线，OSB）设备和电USB设备的USB兼容设备以及该设备的结构。更具体地说，一种用于保证用于输入/输出光信号的光学USB设备与用于输入/输出电信号的电USB设备之间的连接的USB兼容设备，例如电USB设备之间的信号传输和接收（例如，，USB电子USB存储器）和具有光学USB端口的光学USB设备（例如，计算机），以及USB兼容设备（第一示例性实施例）的结构，以及用于保证在USB兼容设备之间的信号发送和接收的USB兼容设备提供具有电USB端口的光学USB设备（例如，光学USB存储器）和具有USB的USB设备（例如，便携式电话），以及USB兼容设备（第二示例性实施例）的结构。

9. 发明授权

US08495393B2 Remote power management system and method for cluster system 有权
标题翻译：集群系统的远程电源管理系统和方法
公开(公告)号：US08495393B2
公开(公告)日：2013-07-23
申请号：US12507403
申请日：2009-07-22
申请人： Soo Cheol Oh , Seong Woon Kim , Han Namgoong
发明人： Soo Cheol Oh , Seong Woon Kim , Han Namgoong
IPC分类号： G06F9/50
CPC分类号： G06F1/3203 , G06F11/3006 , G06F11/3055 , G06F11/3062
摘要： A remote power management technology for a cluster system of the present invention can monitor and control the power status of multiple hosts of the cluster system individually, thereby decreasing power consumption of the cluster system. A remote power management system includes a plurality of management nodes, a power proxy server, and a power management server. The management nodes, which manage power of the hosts of the cluster system respectively, are divided into groups. The power proxy server manages each group, monitors the power status of each management node of the group to generate proxy monitoring information, and transmits a power setting command to the management node of the specific host requiring power setting. The power management server monitors the power status of the hosts using the proxy monitoring information and transmits the power setting command to the power proxy server of the group including the management node of the specific host.
摘要翻译：本发明的集群系统的远程电源管理技术可以单独监视和控制集群系统的多台主机的电源状态，从而降低集群系统的功耗。远程电力管理系统包括多个管理节点，电力代理服务器和电力管理服务器。分别管理集群系统主机功率的管理节点分为几组。电力代理服务器管理每个组，监视组中每个管理节点的电源状态以生成代理监视信息，并将功率设置命令发送到需要电源设置的特定主机的管理节点。电源管理服务器使用代理监视信息监视主机的电源状态，并将功率设置命令发送到包括特定主机的管理节点的组的电源代理服务器。

10. 发明授权

US07941650B2 Microprocessor based on event-processing instruction set and event-processing method using the same 有权
标题翻译：基于事件处理指令集的微处理器和使用它的事件处理方法
公开(公告)号：US07941650B2
公开(公告)日：2011-05-10
申请号：US12155833
申请日：2008-06-10
申请人： Young Woo Kim , Myeong Hoon Oh , Chi Hoon Shin , Sung Nam Kim , Seong Woon Kim , Myung Joon Kim
发明人： Young Woo Kim , Myeong Hoon Oh , Chi Hoon Shin , Sung Nam Kim , Seong Woon Kim , Myung Joon Kim
IPC分类号： G06F9/30 , G06F9/46
CPC分类号： G06F9/30003
摘要： Provided are a microprocessor based on event-processing instruction set and an event-processing method using the same. The microprocessor includes an event register controlling an event according to an event-processing instruction set provided in an instruction set architecture (ISA) and an event controller transmitting externally generated events into the microprocessor. Therefore, the microprocessor may be useful to reduce its unnecessary power consumption by suspending the execution of its program when an instruction decoded to execute the program is an event-processing instruction, and also to cut off its unnecessary power consumption that is caused for an interrupt delay period since the program of the microprocessor may be executed again by immediately re-running the microprocessor with the operation of the event register and the event controller when external events are generated.
摘要翻译：提供了一种基于事件处理指令集的微处理器和使用其的事件处理方法。微处理器包括根据在指令集架构（ISA）中提供的事件处理指令集来控制事件的事件寄存器，以及将外部生成的事件发送到微处理器中的事件控制器。因此，当执行程序解码的指令是事件处理指令时，微处理器可能有助于通过暂停其程序的执行来减少其不必要的功耗，并且还可以切断其对于中断引起的不必要的功耗延迟时间，因为可以通过在产生外部事件时通过事件寄存器和事件控制器的操作立即重新运行微处理器来再次执行微处理器的程序。

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