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1. 发明申请

US20130280731A1 RATIONAL ENZYME MINING 有权
标题翻译：合理的采食
公开(公告)号：US20130280731A1
公开(公告)日：2013-10-24
申请号：US13989513
申请日：2011-11-29
申请人： Martin Karlsson , Bengt-Harald Jonsson , Uno Carlsson
发明人： Martin Karlsson , Bengt-Harald Jonsson , Uno Carlsson
IPC分类号： C12Q1/25
CPC分类号： C12Q1/25 , C12N1/36 , C12Q1/02
摘要： A method for rational mining for induced enzymes in microbial communities is described. The method is characterized in that a community of microorganisms is provided and that the microbial populations of the community are cultivated in a container under conditions of choice, where the microorganisms are given a defined culturing medium, to eliminate matter deriving from the natural habitat and to allow the microbial community to reach a metabolic steady-state. The method is further characterized in that at least one fraction of microorganisms is taken from the container and transferred into at least two separate containers, where at least one of the fractions of microorganisms is provided with a defined medium which includes an inducing substance and/or a substance against which enzyme/enzymes is/are desired, to induce regulation of expression of the desired enzyme/enzymes, and at least one fraction is provided with a defined medium without said inducing substance and without said substance against which enzyme/enzymes is/are desired, for the purpose of comparison, and the fractions are maintained and/or cultivated. Samples of the two fractions are then withdrawn and analyzed for identification of the induced enzyme/enzymes.
摘要翻译：描述了微生物群落中诱导酶合理开采的方法。该方法的特征在于提供微生物群落，并且在选择的条件下将容器中的微生物种群培养在容器中，其中微生物被赋予限定的培养基，以消除源于自然栖息地的物质，并且使微生物群落达到代谢稳态。该方法的特征还在于至少一部分微生物从容器中取出并转移到至少两个分开的容器中，其中至少一个微生物部分具有限定的培养基，其包括诱导物质和/或提供酶/酶所需的物质以诱导所需酶/酶的表达的调节，并且至少一个级分具有没有所述诱导物质的限定的培养基，并且没有所述酶/酶是/ 为了比较的目的，并且维持和/或培养级分。然后取出两个级分的样品并分析以鉴定诱导的酶/酶。

2. 发明授权

US09365887B2 Rational enzyme mining 有权
标题翻译：合理的酶开采
公开(公告)号：US09365887B2
公开(公告)日：2016-06-14
申请号：US13989513
申请日：2011-11-29
申请人： Martin Karlsson , Bengt-Harald Jonsson , Uno Carlsson
发明人： Martin Karlsson , Bengt-Harald Jonsson , Uno Carlsson
IPC分类号： C12Q1/25 , C12N1/36 , C12Q1/02
CPC分类号： C12Q1/25 , C12N1/36 , C12Q1/02
摘要： A method for rational mining for induced enzymes in microbial communities is described. The method is characterized in that a community of microorganisms is provided and that the microbial populations of the community are cultivated in a container under conditions of choice, where the microorganisms are given a defined culturing medium, to eliminate matter deriving from the natural habitat and to allow the microbial community to reach a metabolic steady-state. The method is further characterized in that at least one fraction of microorganisms is taken from the container and transferred into at least two separate containers, where at least one of the fractions of microorganisms is provided with a defined medium which includes an inducing substance and/or a substance against which enzyme/enzymes is/are desired, to induce regulation of expression of the desired enzyme/enzymes, and at least one fraction is provided with a defined medium without said inducing substance and without said substance against which enzyme/enzymes is/are desired, for the purpose of comparison, and the fractions are maintained and/or cultivated. Samples of the two fractions are then withdrawn and analyzed for identification of the induced enzyme/enzymes.
摘要翻译：描述了微生物群落中诱导酶合理开采的方法。该方法的特征在于提供微生物群落，并且在选择的条件下将容器中的微生物种群培养在容器中，其中微生物被赋予限定的培养基，以消除源于自然栖息地的物质，并且使微生物群落达到代谢稳态。该方法的特征还在于至少一部分微生物从容器中取出并转移到至少两个分开的容器中，其中至少一个微生物部分具有限定的培养基，其包括诱导物质和/或提供酶/酶所需的物质以诱导所需酶/酶的表达的调节，并且至少一个级分具有没有所述诱导物质的限定的培养基，并且没有所述酶/酶是/ 为了比较的目的，并且维持和/或培养级分。然后取出两个级分的样品并分析以鉴定诱导的酶/酶。

3. 发明授权

US08418099B2 Performance counters for integrated circuits 有权
标题翻译：集成电路性能计数器
公开(公告)号：US08418099B2
公开(公告)日：2013-04-09
申请号：US13042646
申请日：2011-03-08
申请人： Martin Karlsson
发明人： Martin Karlsson
IPC分类号： G06F17/50 , G06F9/455 , G06F9/45
CPC分类号： G06F17/5027 , G06F17/505 , G06F2217/14
摘要： Systems, methods, and other embodiments associated with performance counters are described. In one embodiment, a method includes generating a first register transfer level (RTL) description of an integrated circuit that includes a performance counter. The integrated circuit is emulated in hardware and statistical data is collected with the performance counter. The performance counter is then removed from the integrated circuit.
摘要翻译：描述与性能计数器相关联的系统，方法和其他实施例。在一个实施例中，一种方法包括生成包括性能计数器的集成电路的第一寄存器传送电平（RTL）描述。集成电路用硬件仿真，统计数据与性能计数器一起收集。然后，性能计数器从集成电路中移除。

4. 发明授权

US07979640B2 Cache line duplication in response to a way prediction conflict 有权
标题翻译：缓存线重复响应方式预测冲突
公开(公告)号：US07979640B2
公开(公告)日：2011-07-12
申请号：US12181266
申请日：2008-07-28
申请人： Shailender Chaudhry , Robert E. Cypher , Martin Karlsson
发明人： Shailender Chaudhry , Robert E. Cypher , Martin Karlsson
IPC分类号： G06F12/08
CPC分类号： G06F12/0864 , G06F2212/1016 , G06F2212/6082
摘要： Embodiments of the present invention provide a system that handles way mispredictions in a multi-way cache. The system starts by receiving requests to access cache lines in the multi-way cache. For each request, the system makes a prediction of a way in which the cache line resides based on a corresponding entry in the way prediction table. The system then checks for the presence of the cache line in the predicted way. Upon determining that the cache line is not present in the predicted way, but is present in a different way, and hence the way was mispredicted, the system increments a corresponding record in a conflict detection table. Upon detecting that a record in the conflict detection table indicates that a number of mispredictions equals a predetermined value, the system copies the corresponding cache line from the way where the cache line actually resides into the predicted way.
摘要翻译：本发明的实施例提供了一种在多路缓存中处理方式错误预测的系统。系统通过接收访问多路缓存中的高速缓存行的请求来启动。对于每个请求，系统基于方式预测表中的相应条目来预测高速缓存行驻留的方式。然后，系统以预测的方式检查高速缓存行的存在。在确定高速缓存行不以预测的方式存在但是以不同的方式存在，并且因此错误地预测方式时，系统在冲突检测表中增加对应的记录。当检测到冲突检测表中的记录指示许多误预测值等于预定值时，系统将高速缓存行实际驻留的方式的相应高速缓存行复制到预测的方式。

5. 发明授权

US07934080B2 Aggressive store merging in a processor that supports checkpointing 有权
标题翻译：积极的商店合并在支持检查点的处理器中
公开(公告)号：US07934080B2
公开(公告)日：2011-04-26
申请号：US12128332
申请日：2008-05-28
申请人： Paul Caprioli , Martin Karlsson , Gideon N. Levinsky , Khondakar A. Mujtaba , Shailender Chaudhry , Murali K. Inaganti
发明人： Paul Caprioli , Martin Karlsson , Gideon N. Levinsky , Khondakar A. Mujtaba , Shailender Chaudhry , Murali K. Inaganti
IPC分类号： G06F9/312
CPC分类号： G06F9/3842 , G06F9/3834 , G06F9/3863
摘要： Embodiments of the present invention provide a processor that merges stores in an N-entry first-in-first-out (FIFO) store queue. In these embodiments, the processor starts by executing instructions before a checkpoint is generated. When executing instructions before the checkpoint is generated, the processor is configured to perform limited or no merging of stores into existing entries in the store queue. Then, upon detecting a predetermined condition, the processor is configured to generate a checkpoint. After generating the checkpoint, the processor is configured to continue to execute instructions. When executing instructions after the checkpoint is generated, the processor is configured to freely merge subsequent stores into post-checkpoint entries in the store queue.
摘要翻译：本发明的实施例提供了一种处理器，其将存储结合在N入口先进先出（FIFO）存储队列中。在这些实施例中，处理器通过在生成检查点之前执行指令来开始。在生成检查点之前执行指令时，处理器被配置为对存储队列中的现有条目执行有限或不合并存储。然后，在检测到预定条件时，处理器被配置为产生检查点。生成检查点后，处理器配置为继续执行指令。在检查点生成后执行指令时，处理器被配置为将后续存储自由合并到存储队列中的后检查点条目中。

6. 发明授权

US07774531B1 Allocating processor resources during speculative execution using a temporal ordering policy 有权
标题翻译：使用时间排序策略在投机执行期间分配处理器资源
公开(公告)号：US07774531B1
公开(公告)日：2010-08-10
申请号：US11226614
申请日：2005-09-13
申请人： Martin Karlsson
发明人： Martin Karlsson
IPC分类号： G06F13/22 , G06F13/28 , G06F3/00 , G06F5/00 , G06F13/00
CPC分类号： G06F12/0862 , G06F9/383 , G06F9/3842 , G06F9/3863 , G06F9/5011 , G06F12/1027 , G06F2209/507 , G06F2212/6028
摘要： One embodiment provides a system which uses a temporal ordering policy for allocation of limited processor resources. The system starts by executing instructions for a program during a normal-execution mode. Upon encountering a condition which causes the processor to enter a speculative-execution mode, the processor performs a checkpoint and commences execution of instructions in the speculative-execution mode. Upon encountering an instruction which requires the allocation of an instance of a limited processor resource during the execution of instructions in the speculative-execution mode, the processor checks a speculative-use indicator associated with each instance of the limited processor resource. Upon finding the speculative-use indicators asserted for all instances of the limited processor resource which are available to be allocated for the instruction, the processor aborts the instruction. On the other hand, upon finding the speculative-use indicator is deasserted for an instance of the limited processor resource which is available to be allocated for the instruction, the processor asserts the speculative-use indicator associated with the instance and executes the instruction.
摘要翻译：一个实施例提供了一种使用时间排序策略来分配有限的处理器资源的系统。系统通过在正常执行模式期间执行程序的指令而开始。当遇到使处理器进入推测执行模式的状况时，处理器执行检查点并开始以推测执行模式执行指令。在执行在推测执行模式中的指令期间遇到需要分配有限的处理器资源的实例的指令时，处理器检查与受限处理器资源的每个实例相关联的推测使用指示符。在找到可用于指令分配的有限处理器资源的所有实例断言的推测使用指示符时，处理器中止该指令。另一方面，当对于可用于指令分配的有限处理器资源的实例，发现推测使用指示符被断言时，处理器断言与该实例相关联的推测使用指示符并执行该指令。

7. 发明申请

US20090187727A1 INDEX GENERATION FOR CACHE MEMORIES 有权
标题翻译：高速缓存记录的索引生成
公开(公告)号：US20090187727A1
公开(公告)日：2009-07-23
申请号：US12018407
申请日：2008-01-23
申请人： Paul Caprioli , Martin Karlsson , Shailender Chaudhry
发明人： Paul Caprioli , Martin Karlsson , Shailender Chaudhry
IPC分类号： G06F12/08 , G06F12/10
CPC分类号： G06F12/0864 , G06F2212/6082
摘要： Embodiments of the present invention provide a system that generates an index for a cache memory. The system starts by receiving a request to access the cache memory, wherein the request includes address information. The system then obtains non-address information associated with the request. Next, the system generates the index using the address information and the non-address information. The system then uses the index to fulfill access the cache memory.
摘要翻译：本发明的实施例提供一种生成高速缓冲存储器的索引的系统。系统通过接收访问高速缓冲存储器的请求开始，其中请求包括地址信息。然后系统获得与请求相关联的非地址信息。接下来，系统使用地址信息和非地址信息来生成索引。然后，系统使用索引来实现对高速缓存的访问。

8. 发明申请

US20090182956A1 METHOD AND APPARATUS FOR IMPROVING TRANSACTIONAL MEMORY COMMIT LATENCY 有权
标题翻译：用于改进交易记忆提交延迟的方法和装置
公开(公告)号：US20090182956A1
公开(公告)日：2009-07-16
申请号：US12014217
申请日：2008-01-15
申请人： Paul Caprioli , Martin Karlsson , Sherman H. Yip
发明人： Paul Caprioli , Martin Karlsson , Sherman H. Yip
IPC分类号： G06F9/46 , G06F12/08
CPC分类号： G06F12/084 , G06F9/30087 , G06F9/3834 , G06F9/3857 , G06F9/467 , G06F12/126 , G06F2212/1016
摘要： Embodiments of the present invention provide a system that executes transactions on a processor that supports transactional memory. The system starts by executing the transaction on the processor. During execution of the transactions, the system places stores in a store buffer. In addition, the system sets a stores_encountered indicator when a first store is placed in the store buffer during the transaction. Upon completing the transaction, the system determines if the stores_encountered indicator is set. If so, the system signals a cache to commit the stores placed in the store buffer during the transaction to the cache and then resumes execution of program code following the transaction when the stores have been committed. Otherwise, the system resumes execution of program code following the transaction without signaling the cache.
摘要翻译：本发明的实施例提供一种在支持事务存储器的处理器上执行事务的系统。系统通过在处理器上执行事务来启动。在执行事务期间，系统将存储放在存储缓冲区中。此外，当事务期间第一个存储被放置在存储缓冲区中时，系统设置stores_en遇到的指示符。完成交易后，系统确定是否设置了stores_en遭遇指示符。如果是这样，系统就会发出一个缓存，将事务期间放置在存储缓冲区中的存储提交到高速缓存，然后在存储已提交后，在事务之后恢复执行程序代码。否则，系统将在事务之后恢复执行程序代码，而不发出缓存信号。

9. 发明授权

US09146744B2 Store queue having restricted and unrestricted entries 有权
标题翻译：存储队列具有受限和不受限制的条目
公开(公告)号：US09146744B2
公开(公告)日：2015-09-29
申请号：US12116009
申请日：2008-05-06
申请人： Paul Caprioli , Martin Karlsson , Shailender Chaudhry , Gideon N. Levinsky
发明人： Paul Caprioli , Martin Karlsson , Shailender Chaudhry , Gideon N. Levinsky
IPC分类号： G06F15/00 , G06F7/38 , G06F9/00 , G06F9/44 , G06F9/38
CPC分类号： G06F9/3826 , G06F9/383 , G06F9/3842 , G06F9/3855
摘要： Embodiments of the present invention provide a system which executes a load instruction or a store instruction. During operation the system receives a load instruction. The system then determines if an unrestricted entry or a restricted entry in a store queue contains data that satisfies the load instruction. If not, the system retrieves data for the load instruction from a cache. If so, the system conditionally forwards data from the unrestricted entry or the restricted entry by: (1) forwarding data from an unrestricted entry that contains the youngest store that satisfies the load instruction when any number of unrestricted or restricted entries contain data that satisfies the load instruction; (2) forwarding data from an unrestricted entry when only one restricted entry and no unrestricted entries contain data that satisfies the load instruction; and (3) deferring the load instruction by placing the load instruction in a deferred queue when two or more restricted entries and no unrestricted entries contain data that satisfies the load instruction.
摘要翻译：本发明的实施例提供一种执行加载指令或存储指令的系统。在运行过程中，系统接收到一个加载指令。然后，系统确定存储队列中的无限制条目或限制条目是否包含满足加载指令的数据。如果没有，系统将从缓存中检索加载指令的数据。如果是这样，系统通过以下方式有条件地转发来自非限制条目或限制条目的数据：（1）当任何数量的无限制或限制条目包含满足条件的数据时，从包含满足加载指令的最小存储的无限制条目转发数据加载指令; （2）当只有一个限制条目和不限制条目包含满足加载指令的数据时，从非限制条目转发数据; 和（3）通过在两个或多个限制条目和不受限制的条目包含满足加载指令的数据的情况下将加载指令放置在延迟队列中来推迟加载指令。

10. 发明授权

US09005160B2 Medicament delivery device 有权
标题翻译：药物输送装置
公开(公告)号：US09005160B2
公开(公告)日：2015-04-14
申请号：US13511295
申请日：2010-10-15
申请人： Martin Karlsson , Nils Ronquist
发明人： Martin Karlsson , Nils Ronquist
IPC分类号： A61M37/00 , A61M5/24 , A61M5/20 , A61M5/315
CPC分类号： A61M5/2448 , A61M5/2033 , A61M5/3155 , A61M5/31553 , A61M5/3156 , A61M5/31583
摘要： A medicament delivery device includes a distal housing part; a proximal housing part in which a multi-chamber medicament container is arranged, with the proximal housing part movable relative to the distal housing part for mixing substances in the container; a plunger rod arranged to act on a stopper in the container, where movement of the housing parts toward each other forces the stopper against the plunger rod for mixing the substances in the container; a drive force unit for forcing the plunger rod for subsequent delivery of medicament; an activation member slidable through the distal housing part and releasably connected to the drive force unit; and a guide shell one-way rotatable in the distal housing part with threads that cooperate with threads on the proximal housing part. The guide shell and plunger rod have guide members such that they are rotationally locked but slidable in relation to each other.
摘要翻译：药物输送装置包括远端壳体部分; 近端壳体部分，其中布置有多腔药物容器，其中近侧壳体部分可相对于远端壳体部分移动，用于将物质混合在容器中; 柱塞杆，其布置成作用在容器中的止动件上，其中壳体部件相对于彼此的移动迫使止动件抵靠柱塞杆以混合容器中的物质; 用于迫使所述柱塞杆随后输送药物的驱动力单元; 激活构件，其可滑动地穿过所述远侧壳体部分并且可释放地连接到所述驱动力单元; 以及在所述远侧壳体部分中可旋转的导向壳，所述导向壳具有与近侧壳体部分上的螺纹配合的螺纹。导向壳和柱塞杆具有引导构件，使得它们被旋转地锁定，但可相对于彼此滑动。

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