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1. 发明授权

US08166375B2 Radio communications device and reception method 有权
标题翻译：无线电通信设备和接收方式
公开(公告)号：US08166375B2
公开(公告)日：2012-04-24
申请号：US12407552
申请日：2009-03-19
申请人： Miyoshi Saito , Koichi Suzuki
发明人： Miyoshi Saito , Koichi Suzuki
IPC分类号： H03M13/00
CPC分类号： H04L9/00 , H03M13/09 , H04L1/0047 , H04L1/0061 , H04L2209/34
摘要： A radio communications device includes a first error detection part configured to perform error detection on a header included in a packet; a determination part configured to determine whether there is consistency with respect to the length of the packet based on the header in response to the first error detection part detecting no error in the header; a decryption part configured to decrypt the packet in response to the determination part determining that there is consistency with respect to the length of the packet; and a second error detection part configured to perform error detection on the packet in response to the determination part determining that there is consistency with respect to the length of the packet, wherein the decryption part is configured to start to decrypt the packet before completion of the error detection by the second error detection part.
摘要翻译：无线通信装置包括：第一错误检测部，被配置为对分组中包含的标题执行错误检测; 确定部件，被配置为响应于所述第一错误检测部件检测到所述报头中没有错误，基于所述报头来确定相对于所述分组的长度是否一致; 解密部，被配置为响应于所述确定部确定相对于所述分组的长度存在一致性来解密所述分组; 以及第二错误检测部件，被配置为响应于所述确定部分确定对于所述分组的长度存在一致性而对所述分组执行错误检测，其中所述解密部分被配置为在完成所述分组之前开始对所述分组进行解密由第二错误检测部分进行错误检测。

2. 发明申请

US20090276677A1 Radio Communications Device And Reception Method 有权
标题翻译：无线电通信设备和接收方法
公开(公告)号：US20090276677A1
公开(公告)日：2009-11-05
申请号：US12407552
申请日：2009-03-19
申请人： Miyoshi Saito , Koichi Suzuki
发明人： Miyoshi Saito , Koichi Suzuki
IPC分类号： H03M13/00 , H04K1/00 , G08C25/00 , G06F11/08 , H04L1/14
CPC分类号： H04L9/00 , H03M13/09 , H04L1/0047 , H04L1/0061 , H04L2209/34
摘要： A radio communications device includes a first error detection part configured to perform error detection on a header included in a packet; a determination part configured to determine whether there is consistency with respect to the length of the packet based on the header in response to the first error detection part detecting no error in the header; a decryption part configured to decrypt the packet in response to the determination part determining that there is consistency with respect to the length of the packet; and a second error detection part configured to perform error detection on the packet in response to the determination part determining that there is consistency with respect to the length of the packet, wherein the decryption part is configured to start to decrypt the packet before completion of the error detection by the second error detection part.
摘要翻译：无线通信装置包括：第一错误检测部，被配置为对分组中包含的标题执行错误检测; 确定部件，被配置为响应于所述第一错误检测部件检测到所述报头中没有错误，基于所述报头来确定相对于所述分组的长度是否一致; 解密部，被配置为响应于所述确定部确定相对于所述分组的长度存在一致性来解密所述分组; 以及第二错误检测部件，被配置为响应于所述确定部分确定对于所述分组的长度存在一致性而对所述分组执行错误检测，其中所述解密部分被配置为在完成所述分组之前开始对所述分组进行解密由第二错误检测部分进行错误检测。

3. 发明申请

US20120219045A1 COMMUNICATION APPARATUS AND METHOD FOR COMMUNICATION 有权
标题翻译：通信装置和通信方法
公开(公告)号：US20120219045A1
公开(公告)日：2012-08-30
申请号：US13330043
申请日：2011-12-19
申请人： Yuki Sakai , Miyoshi Saito
发明人： Yuki Sakai , Miyoshi Saito
IPC分类号： H04L27/00 , H04B1/38
CPC分类号： H04J3/0682 , H04L5/0007 , H04L5/0053 , H04L5/0055 , H04L5/0057
摘要： An RC generating unit generates a first ranging code by performing a logical operation to first seed data, repeats a process for generating a second ranging code by performing the logical operation to second seed data generated when generating the first ranging code until generation of a Nth ranging code, stores the 1st through Nth seed data corresponding to the 1st through Nth ranging codes in the memory. And the RC generating unit generates a transmission ranging code, in response to a reception of specification data of a transmission ranging code transmitted from a base station, by performing the logical operation to the seed data corresponding to the specification data.
摘要翻译： RC产生单元通过对第一种子数据执行逻辑运算来生成第一测距码，通过对产生第一测距码产生的第二种子数据执行逻辑运算来重复生成第二测距码的处理，直到产生第N测距代码，存储与存储器中的第1到第N测距码对应的第1到第N种子数据。 RC发生单元通过对与规格数据对应的种子数据进行逻辑运算，响应于从基站发送的发送测距码的指定数据的接收，生成发送测距码。

4. 发明授权

US07694108B2 Reconfigurable semiconductor device capable of controlling output timing of data 有权
标题翻译：能够控制数据的输出定时的可重构半导体器件
公开(公告)号：US07694108B2
公开(公告)日：2010-04-06
申请号：US11504763
申请日：2006-08-16
申请人： Miyoshi Saito , Hisanori Fujisawa
发明人： Miyoshi Saito , Hisanori Fujisawa
IPC分类号： G06F15/76 , H04B1/69
CPC分类号： G06F15/7867
摘要： An arithmetic unit capable of reconfiguring circuitry in accordance with configuration data supplied includes a data processing unit performing a processing using input data; an output data maintenance unit maintaining the result of the processing to output it as an output data; and an output valid signal control unit outputting an output valid signal indicating whether or not the output data is valid, in which an output timing of a valid data to outside the arithmetic unit can be controlled optionally by controlling the output timing of the output valid signal.
摘要翻译：能够根据提供的配置数据重新配置电路的算术单元包括使用输入数据执行处理的数据处理单元; 输出数据维护单元，保持处理结果以将其输出为输出数据; 以及输出有效信号控制单元，输出表示输出数据是否有效的输出有效信号，其中可以通过控制输出有效信号的输出定时来控制有效数据到运算单元外部的输出定时。

5. 发明授权

US07114061B2 Information processing apparatus with configurable processor 有权
标题翻译：具有可配置处理器的信息处理设备
公开(公告)号：US07114061B2
公开(公告)日：2006-09-26
申请号：US10627709
申请日：2003-07-28
申请人： Yoshio Hirose , Miyoshi Saito , Wouter Couzijn
发明人： Yoshio Hirose , Miyoshi Saito , Wouter Couzijn
IPC分类号： G06F9/30
CPC分类号： G06F9/30181 , G06F9/3885 , G06F9/3897 , G06F17/5045
摘要： In a processor, an operating unit executes an instruction within an instruction set, and a second operating unit executes other custom instructions. The second operating unit consists of a plurality of AND circuits, OR circuits, adders, selectors, and multiplexers. The information about which circuit should be combined with which circuit when the instruction is input is held in advance as structure information in a configuration memory. One piece of structure information corresponds to one custom instruction. The second operating unit in an optimum circuit structure determined based on this structure information executes the instruction. With this arrangement, it is possible to increase the processing speed than when the operating unit executes the processing.
摘要翻译：在处理器中，操作单元执行指令集内的指令，第二操作单元执行其他定制指令。第二操作单元由多个AND电路，OR电路，加法器，选择器和多路复用器组成。在配置存储器中作为结构信息预先保存关于哪个电路与输入指令时的电路组合的信息。一条结构信息对应于一条定制指令。基于该结构信息确定的最佳电路结构中的第二操作单元执行该指令。通过这种布置，与操作单元执行处理相比，可以提高处理速度。

6. 发明授权

US06377638B1 SIGNAL TRANSMISSION SYSTEM FOR TRANSMITTING SIGNALS BETWEEN LSI CHIPS, RECEIVER CIRCUIT FOR USE IN THE SIGNAL TRANSMISSION SYSTEM, AND SEMICONDUCTOR MEMORY DEVICE APPLYING THE SIGNAL TRANSMISSION SYSTEM 有权
标题翻译：用于在信号传输系统中使用的LSI芯片，接收器电路之间发送信号的信号传输系统和应用信号传输系统的半导体存储器件
公开(公告)号：US06377638B1
公开(公告)日：2002-04-23
申请号：US09688389
申请日：2000-10-12
申请人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
发明人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
IPC分类号： H03D106
CPC分类号： H04L25/0276 , G06F13/4243 , H04L25/0278 , H04L25/0282 , H04L25/0288 , H04L25/497 , Y02D10/14 , Y02D10/151
摘要： A signal transmission system has a response time of a signal transmission line which is set approximately equal to or longer than the length of a transmitted symbol. More specifically, terminal resistance is set larger than the characteristic impedance of the signal transmission line, driver output resistance is set to a large value, or a damping resistor is provided in series with the signal transmission line. With this configuration, signal power can be reduced drastically.
摘要翻译：信号传输系统具有被设置为大致等于或长于发送符号的长度的信号传输线的响应时间。更具体地，将端子电阻设定为大于信号传输线的特性阻抗，驱动器输出电阻设定为大值，或者与信号传输线串联设置阻尼电阻。通过这种配置，可以显着降低信号功率。

7. 发明授权

US5280181A Quantum semiconductor device that uses a quantum point contact for producing a quantum mechanical carrier wave with directivity 失效
标题翻译：量子点接触器用于产生具有方向性的量子力学载波的量子半导体器件
公开(公告)号：US5280181A
公开(公告)日：1994-01-18
申请号：US892377
申请日：1992-06-03
申请人： Miyoshi Saito , Toshihiko Mori
发明人： Miyoshi Saito , Toshihiko Mori
IPC分类号： H01L29/772 , H01L27/12 , H01L45/00
CPC分类号： H01L29/772
摘要： A quantum semiconductor device comprises a channel region formed with a two-dimensional carrier gas, a Schottky electrode structure provided on the channel region for creating a depletion region in the channel region to extend in a lateral direction such that the two-dimensional carrier gas is divided into a first region and a second region, a quantum point contact formed in the depletion region to connect the first and second regions of the two-dimensional carrier gas in a longitudinal direction, an emitter electrode provided on the channel region in correspondence to the first region of the two-dimensional carrier gas, one or more collector electrodes provided on the channel region in correspondence to the second region of the two-dimensional carrier gas, and another Schottky electrode structure provided in correspondence to the first region for creating a depletion region therein such that a path of the carriers entering into the quantum point contact is controlled asymmetrical with respect to a hypothetical longitudinal axis that passes through the quantum point contact in the longitudinal direction.
摘要翻译：量子半导体器件包括形成有二维载气的沟道区，设置在沟道区上的肖特基电极结构，用于在沟道区中产生耗尽区，以沿横向方向延伸，使得二维载气为分为第一区域和第二区域，形成在耗尽区域中以在纵向方向连接二维载气的第一和第二区域的量子点接触，设置在通道区域上的发射极电极对应于二维载气的第一区域，设置在与二维载气的第二区域对应的沟道区域上的一个或多个集电极，以及与第一区域相对应地设置的另一肖特基电极结构，用于产生耗尽区域，使得进入量子点接触器的载流子的路径被控制为不对称的相对于在纵向方向上穿过量子点接触的假想纵轴。

8. 发明授权

US08792541B2 Communication apparatus and method for communication 有权
标题翻译：通信装置和通信方法
公开(公告)号：US08792541B2
公开(公告)日：2014-07-29
申请号：US13330043
申请日：2011-12-19
申请人： Yuki Sakai , Miyoshi Saito
发明人： Yuki Sakai , Miyoshi Saito
IPC分类号： H04L5/16
CPC分类号： H04J3/0682 , H04L5/0007 , H04L5/0053 , H04L5/0055 , H04L5/0057
摘要： An RC generating unit generates a first ranging code by performing a logical operation to first seed data, repeats a process for generating a second ranging code by performing the logical operation to second seed data generated when generating the first ranging code until generation of a Nth ranging code, stores the 1st through Nth seed data corresponding to the 1st through Nth ranging codes in the memory. And the RC generating unit generates a transmission ranging code, in response to a reception of specification data of a transmission ranging code transmitted from a base station, by performing the logical operation to the seed data corresponding to the specification data.
摘要翻译： RC产生单元通过对第一种子数据执行逻辑运算来生成第一测距码，通过对产生第一测距码产生的第二种子数据执行逻辑运算来重复生成第二测距码的处理，直到产生第N测距代码，存储与存储器中的第1到第N测距码对应的第1到第N种子数据。 RC发生单元通过对与规格数据对应的种子数据进行逻辑运算，响应于从基站发送的发送测距码的指定数据的接收，生成发送测距码。

9. 发明授权

US07849288B2 Alternately selecting memory units to store and retrieve configuration information in respective areas for a plurality of processing elements to perform pipelined processes 有权
标题翻译：替代地选择存储器单元以存储和检索用于多个处理元件的各个区域中的配置信息以执行流水线处理
公开(公告)号：US07849288B2
公开(公告)日：2010-12-07
申请号：US11546284
申请日：2006-10-12
申请人： Hisanori Fujisawa , Miyoshi Saito , Toshihiro Ozawa
发明人： Hisanori Fujisawa , Miyoshi Saito , Toshihiro Ozawa
IPC分类号： G06F15/80
CPC分类号： G06F15/7867
摘要： A reconfigurable circuit and control method therefor, capable of enhancing efficiency of implementation of a pipeline process in processing elements and improve processing performance. Processing elements are reconfigured to form a circuit based on configuration information and execute a prescribed process. Memory units store configuration information for the processing elements. A memory switching unit switches the plurality of memory units to store therein the configuration information on the stages of a pipeline process to be performed by the processing elements. A configuration information output unit switches the memory units to output therefrom the configuration information to the plurality of processing elements.
摘要翻译：一种可重构电路及其控制方法，能够提高处理元件中流水线处理的效率，提高处理性能。重新配置处理元件以形成基于配置信息的电路并执行规定的处理。存储单元存储处理元件的配置信息。存储器切换单元切换多个存储单元以在其中存储由处理元件执行的流水线处理的阶段的配置信息。配置信息输出单元切换存储单元以从其输出配置信息到多个处理元件。

10. 发明授权

US07774580B2 Array processor having reconfigurable data transfer capabilities 有权
标题翻译：阵列处理器具有可重新配置的数据传输能力
公开(公告)号：US07774580B2
公开(公告)日：2010-08-10
申请号：US11077561
申请日：2005-03-11
申请人： Miyoshi Saito , Hisanori Fujisawa , Hideki Yoshizawa , Tetsu Tanizawa , Ichiro Kasama , Tetsuo Kawano , Kazuaki Imafuku , Hiroshi Furukawa , Shiro Uriu , Mitsuharu Wakayoshi
发明人： Miyoshi Saito , Hisanori Fujisawa , Hideki Yoshizawa , Tetsu Tanizawa , Ichiro Kasama , Tetsuo Kawano , Kazuaki Imafuku , Hiroshi Furukawa , Shiro Uriu , Mitsuharu Wakayoshi
IPC分类号： G06F15/00 , G06F15/76
CPC分类号： G06F15/8007
摘要： A reconfigurable operation apparatus consists of a plurality of operation units capable of reconfiguring themselves by using a piece of given first configuration data and of operating simultaneously with one another; RAMs; diverse processor elements required for constituting an operation apparatus; an inter-resource network interconnecting the operation units, the RAMs and the diverse processor elements, performing data transfers between resources connected thereto in a uniform transfer time independent of positions and kinds of the resources, and being reconfigurable by using a given second configuration data; and a configuration memory storing the first and the second configuration data. Configuration data is loaded from an external storage apparatus onto the configuration memory, and the first and the second configuration data are supplied to the reconfigurable processor resources in appropriate sequence and timing based on data available from a plurality of operation units.
摘要翻译：可重构操作装置由能够通过使用一段给定的第一配置数据并且彼此同时操作的多个操作单元组成，能够重新配置自身; RAMs 构成操作装置所需的各种处理器元件; 互连所述操作单元，所述RAM和所述不同处理器元件的资源间网络，以与所述资源的位置和种类无关的统一传送时间在连接到其之间的资源之间执行数据传输，并且可通过使用给定的第二配置数据来重新配置; 以及存储第一和第二配置数据的配置存储器。配置数据从外部存储装置加载到配置存储器上，并且基于从多个操作单元可获得的数据，将第一和第二配置数据以适当的顺序和定时提供给可重构处理器资源。

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